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41. 发明专利

JP3501648B2 1/2 double-ready devices 失效
公开(公告)号：JP3501648B2
公开(公告)日：2004-03-02
申请号：JP6491898
申请日：1998-03-16
申请人：富士通株式会社
发明人：直宮下 , 正貴酒井
IPC分类号： H04J3/00 , H04L5/14 , H04Q11/04 , H04Q11/08
CPC分类号： H04L5/14 , H04Q11/08 , H04Q2213/13174 , H04Q2213/13216 , H04Q2213/13393

42. 发明授权

EP0939575B1 Subrate voice switching in telecommunication networks 有权
标题翻译：在电信网络的子速率语音交换
公开(公告)号：EP0939575B1
公开(公告)日：2007-04-11
申请号：EP99301135.2
申请日：1999-02-16
申请人： LUCENT TECHNOLOGIES INC.
发明人： Deutsch, Douglas Anthony , Smith, David B.
IPC分类号： H04Q11/04
CPC分类号： H04Q11/04 , H04Q2213/1302 , H04Q2213/13034 , H04Q2213/1304 , H04Q2213/13166 , H04Q2213/13367 , H04Q2213/13393

43. 发明公开

EP0914019A3 Schaltungsanordnung für blockierungsfreie Koppelfelder 审中-公开
标题翻译：电路，其用于阻止开关矩阵
公开(公告)号：EP0914019A3
公开(公告)日：2005-12-14
申请号：EP98115563.3
申请日：1998-08-19
申请人： DeTeWe - Deutsche Telephonwerke Aktiengesellschaft & Co.
发明人： Kirmse, Wilfried, Dr.
IPC分类号： H04Q11/06
CPC分类号： H04Q11/06 , H04Q2213/13103 , H04Q2213/13216 , H04Q2213/13292 , H04Q2213/1334 , H04Q2213/13367 , H04Q2213/13393
摘要： Eine Schaltungsanordnung zur Steuerung von unterschiedlichen Signal-Bitraten von blockierungsfreien Koppelfeldanordnungen für 2 Mbit/s-Digitalsignale ist dadurch gekennzeichnet, daß das Koppelfeld aus der Hintereinanderschaltung einer herkömmlichen PCM-Koppelanordnung (Time-Space-Switch) und eines Submultiplexers (Sub-Mux) besteht, wobei die Ausgangssignale der PCM-Koppelanordnung (Time-Space-Switch) in einem speziellen Zwischenformat (Z) ausgegeben werden, die es dem Submultiplexer (Sub-Mux) gestatten durch einfache Demulitplexoperationen Durchschaltungen unterschiedlicher Schaltebenen (8k, 64k) zu erzeugen, wobei die Schaltinformationen für die 8k-Ebene auf die PCM-Koppelanordnung und den Submultiplexer aufgeteilt wird.

44. 发明公开

EP1382209A1 VERMITTLUNGSSTELLE ZUM SCHALTEN VON VERBINDUNGEN UND EIN ZUGEHÖRIGES VERFAHREN 审中-公开
标题翻译：交换中心切换化合物及相关方法的
公开(公告)号：EP1382209A1
公开(公告)日：2004-01-21
申请号：EP02764039.0
申请日：2002-04-03
申请人： SIEMENS AKTIENGESELLSCHAFT
发明人： ELTSCHKA, Herwig , LÖBIG, Norbert
IPC分类号： H04Q3/60 , H04Q3/545
CPC分类号： H04Q3/60 , H04Q3/5455 , H04Q2213/1302 , H04Q2213/1304 , H04Q2213/13106 , H04Q2213/13107 , H04Q2213/13167 , H04Q2213/13292 , H04Q2213/13386 , H04Q2213/13393
摘要： The invention relates to an exchange (12) and a method for controlling an exchange (12) for establishing connections. Said exchange (12) is connected to at least one separately arranged connection unit (14) to which n connection groups (40a, 40b) are connected. The connection between the separately arranged connection unit (14) and the exchange (12) is established by means of transmission interface units (16, 18) of the separately arranged connection unit (14) and the exchange (12). The connection between the transmission interface unit (18) of the exchange (12) and the coupling network (32) of the exchange (12) is established by means of x useful data channels, the sum of the transmission capacities of said x useful data channels being smaller than the sum of the transmission capacities of the useful data channels of all n connection groups (40a, 40b).

45. 发明公开

EP0939575A3 Subrate voice switching in telecommunication networks 有权
标题翻译：在Fernmeldenetzen的Unterratensprachvermittlung
公开(公告)号：EP0939575A3
公开(公告)日：2001-03-28
申请号：EP99301135.2
申请日：1999-02-16
申请人： LUCENT TECHNOLOGIES INC.
发明人： Deutsch, Douglas Anthony , Smith, David B.
IPC分类号： H04Q11/04
CPC分类号： H04Q11/04 , H04Q2213/1302 , H04Q2213/13034 , H04Q2213/1304 , H04Q2213/13166 , H04Q2213/13367 , H04Q2213/13393
摘要： Apparatus for switching full rate (e.g., 64 kilobit per second) signals and composite signals comprising a plurality of subrate signals (e.g., 32 kilobit per second subrate signal). The apparatus includes a unit for compressing selected ones of a plurality of full-rate signals into a smaller plurality of full-rate single and composite signals, and apparatus for decompressing composite signals into a plurality of full-rate signals. The main elements of the switching fabric of the switch continue to switch full-rate signals. Advantageously, during periods of heavy load, the switching network fabric of a switching system can carry more calls, and more traffic can be carried between switches equipped for subrate switching.
摘要翻译：用于切换全速率（例如，每秒64千比特）的信号和包括多个子速率信号（例如，每秒32千比特子速率信号）的复合信号的装置。该装置包括用于将多个全速率信号中选定的一个全速率信号压缩成更小的多个全速单个和复合信号的单元，以及用于将复合信号解压缩成多个全速率信号的装置。开关的交换结构的主要元素继续切换全速率信号。有利地，在重负载期间，交换系统的交换网络结构可以承载更多的呼叫，并且可以在配备子速率切换的交换机之间携带更多业务。

46. 发明公开

EP1041855A1 Time-slot interchanger that controls both time-slot access and signal-processing features 审中-公开
标题翻译： Zeitstufe zur Steuerung von Zeitschlitzzugang und Signalverarbeitungsmerkmalen
公开(公告)号：EP1041855A1
公开(公告)日：2000-10-04
申请号：EP00302359.5
申请日：2000-03-22
申请人： LUCENT TECHNOLOGIES INC.
发明人： Petty, Norman W.
IPC分类号： H04Q11/04 , H04M3/56
CPC分类号： H04Q11/0407 , H04Q2213/13034 , H04Q2213/1319 , H04Q2213/13216 , H04Q2213/1324 , H04Q2213/1329 , H04Q2213/13292 , H04Q2213/13299 , H04Q2213/13393 , H04Q2213/13399
摘要： A time-slot interchanger (TSI 100) is used to control both time-slot access and distribution of signals to physical or virtual signal-processing circuits (106-116). The TSI includes a control table (200) with an entry (202) for each time slot, that specifies the source (204, 205) and destination (230, 231) of signals received during the corresponding time-slot interval and the processing (208-228) of those signals. The TSI is coupled to the signal processing circuits, and sends the received signals to the signal processing circuits for processing along with control signals to effect the processing specified by the corresponding control-table entries. For conferencing, the TSI sends all signals for each conference in sequence to the conferencing circuit (108) before starting and sending any signals for any other conference, thereby allowing a single conference accumulator to support any number of conferences of any size.
摘要翻译：时隙交换器（TSI 100）用于控制信号到物理或虚拟信号处理电路（106-116）的时隙接入和分配。 TSI包括具有每个时隙的条目（202）的控制表（200），其指定在对应的时隙间隔期间接收的信号的源（204,205）和目的地（230,231），并且处理（ 208-228）。 TSI耦合到信号处理电路，并将接收到的信号与控制信号一起发送到信号处理电路进行处理，以实现由相应的控制表条目指定的处理。对于会议，TSI在开始和发送任何其他会议的任何信号之前，将每个会议的所有信号顺序发送到会议电路（108），从而允许单个会议累加器支持任何数量的任何大小的会议。

47. 发明公开

EP0969689A1 Switching internet traffic through digital switches having a time slot interchange network 有权
标题翻译：通过具有时隙交换网络的数字交换机交换互联网流量
公开(公告)号：EP0969689A1
公开(公告)日：2000-01-05
申请号：EP99304075.7
申请日：1999-05-26
申请人： LUCENT TECHNOLOGIES INC.
发明人： Bodnar, Bohdan Lew , Herse, Conrad Martin , Dunn, James Patrick , Tammaru, Enn
IPC分类号： H04Q11/04 , H04L12/66
CPC分类号： H04L12/66 , H04Q11/04 , H04Q2213/13034 , H04Q2213/13093 , H04Q2213/13103 , H04Q2213/13106 , H04Q2213/13176 , H04Q2213/13199 , H04Q2213/1329 , H04Q2213/13292 , H04Q2213/13349 , H04Q2213/13389 , H04Q2213/13393
摘要： Apparatus and a method for interfacing between the Internet and the Telephone Network. A time slot interchange (TSI) is enhanced by the addition of a supplementary memory (211) for storing data for accumulating Internet packets. When a packet has been accumulated, the appropriate header is inserted into the packet under the control of a routing processor (213), and the packet can then be sent as a group of adjacent PCM samples over a connection to the Internet. In other embodiments, information is sent to the Internet over a direct data pipe for transmitting ATM cells or Ethernet packets. A Vocoder signal processor (301) can be inserted between the TSI memory (103), and the supplementary memory to convert PCM voice samples into vocoded voice samples for transmission over the Internet. A modem signal processor (201) can be interposed between the TSI memory and the supplementary memory to convert between analog data (representing for example, shift key analog signals) and binary data for transmission within packets over the Internet. Advantageously, existing TSI units can be used to interface with both the telephone plant and the Internet.
摘要翻译：在因特网和电话网络之间连接的设备和方法。时隙交换（TSI）通过添加用于存储用于累积因特网分组的数据的辅助存储器（211）而被增强。当一个分组已经被累积时，在路由选择处理器（213）的控制下，将适当的报头插入到分组中，然后该分组可以作为一组相邻PCM样本通过连接发送到因特网。在其他实施例中，通过用于传输ATM信元或以太网分组的直接数据管道将信息发送到因特网。可以在TSI存储器（103）和辅助存储器之间插入声码器信号处理器（301），以将PCM语音采样转换为声码声音样本以通过因特网传输。调制解调器信号处理器（201）可以插入在TSI存储器和辅助存储器之间，以便在模拟数据（表示例如移位键模拟信号）和二进制数据之间转换，以通过因特网在分组内传输。有利地，现有的TSI单元可以用于与电话设备和因特网两者进行接口连接。

48. 发明公开

EP0954913A2 METHOD TO CONTROL A SWITCHING UNIT AND AN ARRANGEMENT WORKING ACCORDING TO THE METHOD 失效
标题翻译：控制方法调停部和工作布置之后，
公开(公告)号：EP0954913A2
公开(公告)日：1999-11-10
申请号：EP98901660.0
申请日：1998-01-27
申请人： TELEFONAKTIEBOLAGET LM ERICSSON (publ)
发明人： KARLSSON, Carl, Michael
IPC分类号： H04L1 , H04J3 , H04Q11
CPC分类号： H04Q11/06 , H04L1/24 , H04Q11/04 , H04Q2213/1302 , H04Q2213/1304 , H04Q2213/1316 , H04Q2213/13166 , H04Q2213/13208 , H04Q2213/13213 , H04Q2213/13216 , H04Q2213/1334 , H04Q2213/13392 , H04Q2213/13393
摘要： The present invention relates to a method to control an established wideband connection through a switching unit regarding frame integrity of the time slots. The invention also relates to an arrangement adapted to work according to the method. The invention is suitable to be used in a switching unit of TST-structure. A first counter (41), related to respective input selector stage (1), counts incoming data frames. This first counter (41) cycles through a predetermined number of states, where one state is a control-state. Each time slot belonging to the wideband connection to be tested is given a control mark during one of the control-states. A second counter (42), related to respective output selector stage (2), counts outgoing data frames. The second counter (42) cycles through the same number of states as the first counter (41). Marked time slots are detectable by respective output selector stage (2). The state of the second counter and the output channel number of the control marked time slot is stored as a marked time slot is detected. The wideband connection to be tested is regarded correctly established through the switching unit if the time slots belonging to the wideband connection are all detected during a mutually same state of the second counter (42).

49. 发明公开

EP0777343A3 Synchronization of wireless base stations by a service circuit in a telecommunication switching system 失效
标题翻译：通过交换通信网络的业务信道的装置的无线基站的同步
公开(公告)号：EP0777343A3
公开(公告)日：1998-12-16
申请号：EP96308551
申请日：1996-11-27
申请人： AT & T CORP
发明人： ROSS MICHAEL RAY
IPC分类号： H04L7/00 , H04B7/26 , H04J3/06 , H04M3/00 , H04Q7/24 , H04Q7/30 , H04Q11/04 , H04J3/00
CPC分类号： H04J3/0647 , H04B7/2693 , H04J3/0602 , H04J3/0691 , H04L7/06 , H04Q11/0464 , H04Q2213/13098 , H04Q2213/13107 , H04Q2213/13205 , H04Q2213/13209 , H04Q2213/13242 , H04Q2213/13292 , H04Q2213/13299 , H04Q2213/1336 , H04Q2213/13393 , H04Q2213/13396
摘要： Synchronizing wireless base stations by reception of a synchronization signal that is transmitted in an unused B channel of an ISDN link interconnecting a switching network and the base stations. The synchronization signals are generated by the tone circuit of the switching network which advantageously is a digital signalling processor (DSP). Each base station is interconnected to the switching network via two basic rate interface (BRI) links. Each base station can handle a maximum of three wireless handsets thus leaving one of the four B channels present in the two BRI links unused. It is this unused link that is utilized to transmit the synchronization signals from the switching network to the base stations. Furthermore, the switching network is configured in such a manner that all base stations receive the synchronization signals at the same time over the unused B channels.
摘要翻译：由同步信号的接收同步无线基站并为反式上的ISDN链路互连交换网络和基站的未使用的B通道mitted英寸同步信号由电路交换网络，其有利地是一个数字信号处理器（DSP）的音调生成。每个基站通过两个基本速率接口（BRI）链路互连到交换网。每个基站可以处理最多三个无线手持机从而留下存在于两个BRI四个B信道中的一个的闲置。正是这种未使用的链路也被利用来从开关网络同步信号发送到基站。进一步，开关网络以寻找所做的所有基站在同一时间在未使用的B信道接收同步信号的方式来配置。

50. 发明授权

US08582597B2 Time slot interchanger 有权
标题翻译：时隙交换器
公开(公告)号：US08582597B2
公开(公告)日：2013-11-12
申请号：US12155402
申请日：2008-06-03
申请人： Mitsuhiro Kawaguchi , Shosaku Yamasaki , Shigeo Tani , Hideki Matsui
发明人： Mitsuhiro Kawaguchi , Shosaku Yamasaki , Shigeo Tani , Hideki Matsui
IPC分类号： H04L12/43
CPC分类号： H04Q11/08 , H04Q2213/13103 , H04Q2213/13163 , H04Q2213/13393
摘要： There is provided a time slot interchanger for processing channel setting data functioning as control data for interchanging time slots of multiplexed transmission data. In the time slot interchanger, processing of the channel setting data based on alarm data is performed in accordance with a preset first transmission capacity, and with respect to the channel setting data in accordance with a preset second transmission capacity, processing of the channel setting data in accordance with the first transmission capacity is dispersedly performed in a time series manner.
摘要翻译：提供了一种时隙交换器，用于处理作为用于交换多路传输数据的时隙的控制数据的信道设置数据。在时隙交换器中，根据预设的第一传输容量来执行基于告警数据的频道设置数据的处理，并且根据预设的第二传输容量对频道设置数据进行处理，根据第一传输容量以时间序列方式分散执行。

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