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    • 43. 发明申请
    • FFT-BASED CHANNELIZER AND COMBINER EMPLOYING RESIDUE-ADDER-IMPLEMENTED PHASE ADVANCE
    • 基于FFT的通道器和组合器采用残留加法器实现的相位提前
    • WO1997028610A1
    • 1997-08-07
    • PCT/US1997001826
    • 1997-02-03
    • AIRNET COMMUNICATIONS CORPORATION
    • AIRNET COMMUNICATIONS CORPORATIONWILLIAMS, Terry, Lee
    • H04B01/38
    • H04J1/05H04B1/38H04L5/06H04L27/0004H04L27/2628H04L27/264H04L27/2652H04W88/08
    • In a cellular-telephone-system base-station receiver's channelizer (111), frequency translation of the outputs of a filter bank (fig. 5) implemented in fast-Fourier-transform circuitry (453, 455, 460) is achieved by rotating the correspondence between FFT input elements and the filter coefficients by which multipliers (437) multiply incoming samples to produce them. Specifically, a storage-address generator (482) directs that corresponding FFT input elements of successive FFT operations be stored in the same locations in an input-data memory (451). To retrieve those values for use in the DFT operation, however, a fetch-address generator (484) employs a modulo-K adder (488) to impose a changing offset so that the starting address for retrieval of each FFT operation's input record changes between FFT operations by the filter bank's decimation rate M. An FFT-implemented combiner (131) similarly rotates computation values to phase align successive wavelets that it adds together to generate modulated carriers in a multi-channel output signal.
    • 在蜂窝电话系统基站接收机的信道化器(111)中,通过在快速傅里叶变换电路(453,455,460)中实现的滤波器组(图5)的输出的频率转换是通过旋转 FFT输入元件之间的对应关系和乘法器(437)乘以输入采样以产生它们的滤波器系数。 具体地说,存储地址发生器(482)指示连续FFT操作的相应FFT输入元件被存储在输入数据存储器(451)中的相同位置。 然而,为了检索用于DFT操作的这些值,取指地址生成器(484)使用模K加法器(488)来施加改变的偏移量,使得每个FFT操作的输入记录的检索的起始地址在 FFT操作通过滤波器组的抽取速率M.FFT实现的组合器(131)类似地将计算值旋转到将其相加在一起的相位对齐,以便在多通道输出信号中产生调制载波。
    • 49. 发明公开
    • WIDEBAND FFT CHANNELIZER
    • BREITBANDIGER FFT通道形成
    • EP0726000A1
    • 1996-08-14
    • EP94930807.0
    • 1994-10-18
    • AIRNET COMMUNICATIONS CORP.
    • CARNEY, Ronald, R.WILLIAMS, Terry, L.
    • H03H17H04B1H04B7H04J1H04J11H04L5H04L27H04W88
    • H04L5/06H04B1/38H04J1/05H04L27/0004H04L27/2631H04L27/2652H04W88/08
    • A physically compact, multichannel wireless communication transceiver architecture employs overlap and add or polyphase signal processing functionality, previously applied to narrowband speech analysis research, for wideband signal processing. A receiver section receives a plurality of multiple frequency communication channels and outputs digital signals representative of the contents of the plurality of multiple frequency communication channels. The receiver section contains an FFT-based channelizer that processes the digital signals output by a wideband digital receiver and couples respective channel outputs to a first plurality of digital signal processor units, which process (e.g. demodulate) respective ones of the digital channel signals and supply processed ones of the digital channel signals at respective output ports for distribution to an attendant voice/data network. On the transmit side, a transmit section contains a plurality of digital signal processors, respectively associated with respective ones of a plurality of incoming (voice/data) communication signals to be transmitted over respectively different frequency channels. Their processed (modulated, encoded) outputs are supplied to an inverse FFT combiner. The FFT combiner supplies a combined multichannel signal to a wideband transmitter which transmits a multiple frequency communication channel signal. Each of the channelizer and combiner may be implemented using overlap and add or polyphase filtering.
    • 50. 发明公开
    • Frequency multiplexing using polyphase filters and fast fourier transforms
    • 频繁多层次的手套Mehrphasenfilter和schnellen四变换
    • EP0695054A2
    • 1996-01-31
    • EP95305004.4
    • 1995-07-17
    • MMS SPACE SYSTEMS LIMITED
    • Wishart, Alexander WalkerCornfield, Paul Simon
    • H04L5/06
    • H04J1/05
    • A digital signal processing apparatus for frequency multiplexing and demultiplexing of narrow band FDM signals has a first block fine processing stage (11) connected in series to a first block coarse processing stage (16, 17) and in parallel therewith a second block fine processing stage (11a) connected in series to a second block coarse processing stage (16, 17). The two stages 11 and 11a are coupled together at one side remote from the two coarse processing stages (16, 17) to provide a first port (14) and the stages (16 and 17) at the side remote from the port (14) provide a plurality of ports (15). Each stage (11, 11a) is a FIR lowpass filter and each stage (16, 17) incorporates a polyphase filter (16) in connection with a Fast Fourier Transform Unit (17).
    • 用于频带复用和解复用窄带FDM信号的数字信号处理装置具有与第一块粗处理级(16,17)串联连接的第一块精细处理级(11),并且与第二块精细处理级 (11a),其串联连接到第二块粗加工台(16,17)。 两级11和11a在远离两个粗加工级(16,17)的一侧耦合在一起,以便在远离端口(14)的一侧提供第一端口(14)和级(16和17) 提供多个端口(15)。 每个级(11,11a)是FIR低通滤波器,并且每个级(16,17)包括与快速傅立叶变换单元(17)相关联的多相滤波器(16)。