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41. 发明公开

EP2896993A1 System and method for converting digital data into an analogue intensity-modulated optical signal 有权
标题翻译：系统和Verfahren zur Umwandlung数码相机数据在ein类比增强模式
公开(公告)号：EP2896993A1
公开(公告)日：2015-07-22
申请号：EP15157901.8
申请日：2008-06-12
申请人： Ramot at Tel Aviv University Ltd.
发明人： Ehrlichman, Yossef , Amrani, Ofer , Ruschin, Shlomo
IPC分类号： G02F7/00 , G02F1/01 , G02F1/225
CPC分类号： H04B10/516 , G02F1/0121 , G02F1/015 , G02F1/225 , G02F7/00 , G02F2001/212 , G02F2203/19 , H03M1/002 , H03M1/70 , H04B10/2504 , H04B10/2575 , H04B10/505 , H04B10/5055 , H04B10/541 , H04B10/556
摘要： There is provided a system (10) for converting digital data into an analogue, intensity-modulated optical signal, the system comprising an electrically controllable modulator (14), preferably of the MAch-Zehnder type, having M actuating electrodes (18) for actuating the modulator (14), the modulator providing an optical signal output modulated in response to voltages applied to the M actuating electrodes (18), and an electrode actuator having an electronic input (12) for receiving an input data word (D) of N bits and including a digital-to-digital converter (20), said electrode actuator providing a mapping of the input data word (D) to a binary actuating vector (B) of M bits that are supplied as a digital output to the M actuating electrodes (18), wherein M ≥N. The system can carry out digital-to-analogue conversion having a high degree of linearity and a large dynamic range.
摘要翻译：提供了一种用于将数字数据转换为模拟强度调制光信号的系统（10），该系统包括优选为MAch-Zehnder型的电可调制器（14），具有M个致动电极（18），用于致动所述调制器（14）提供响应于施加到所述M个致动电极（18）的电压调制的光信号输出，以及具有用于接收N的输入数据字（D）的电子输入端（12）的电极致动器位，并且包括数字 - 数字转换器（20），所述电极致动器提供输入数据字（D）到作为数字输出提供给M致动器的M位的二进制驱动矢量（B）的映射电极（18），其中M‰¥N。该系统可以进行具有高线性度和大动态范围的数模转换。

42. 发明公开

EP2733852A1 TRANSMISSION APPARATUS, TRANSMISSION METHOD, AND TRANSMISSION SYSTEM 审中-公开
标题翻译： SENDEVORRICHTUNG，SENDEVERFAHREN UND SENDESYSTEM
公开(公告)号：EP2733852A1
公开(公告)日：2014-05-21
申请号：EP12812131.6
申请日：2012-07-05
申请人： NEC Corporation
发明人： ABE, Junichi
IPC分类号： H03M1/66 , H04B10/00 , H04B10/03 , H04B10/2507
CPC分类号： H04B10/516 , H03M1/70 , H04B10/07 , H04B10/25137 , H04B10/5053 , H04B10/548 , H04B10/612 , H04B2210/254 , H04L27/2627
摘要： In order to provide a transmission device which can resolve the deterioration in transmission characteristics due to lack of the resolution of a D/A converter in a high speed and large capacity digital communication, a transmission device according to an exemplary aspect of the present invention includes an encoding unit encoding input data; an unequal-interval quantization unit quantizing an output signal from the encoding unit by a quantization level number based on a resolution of a subsequent digital-to-analog conversion unit by using an unequally spaced quantization level interval based on the output signal; the digital-to-analog conversion unit converting an output signal from the unequal-interval quantization unit into an analog signal; an output level adjustment unit adjusting an output level of the digital-to-analog conversion unit so as to compensate a difference between a predetermined initial transfer function and a transfer function of the unequal-interval quantization unit; and a modulation unit generating a transmission signal based on an output signal of the digital-to-analog conversion unit adjusted by the output level adjustment unit.
摘要翻译：为了提供一种传输装置，其可以解决由于在高速和大容量数字通信中D / A转换器的分辨率不足导致的传输特性的恶化，根据本发明的示例性方面的传输装置包括：编码单元，编码输入数据; 不等间隔量化单元，基于所述输出信号，通过使用不等间隔的量化级别间隔，基于所述后续数模转换单元的分辨率，量化来自所述编码单元的输出信号的量化级数; 所述数模转换单元将来自所述不等间隔量化单元的输出信号转换为模拟信号; 输出电平调整单元，调整数模转换单元的输出电平，以补偿预定的初始传递函数与不等间隔量化单元的传递函数之间的差; 以及调制单元，其基于由所述输出电平调整单元调整的所述数模转换单元的输出信号来生成发送信号。

43. 发明公开

EP2320573A2 Method of improving a bit resolution digitization of numeric data 审中-公开
标题翻译： Verfahren zur Verbesserung einerBitauflösungsdigitalisierungvon numerischen Daten
公开(公告)号：EP2320573A2
公开(公告)日：2011-05-11
申请号：EP10013880.9
申请日：2010-10-22
申请人： Bosch Corporation
发明人： Takayanagi, Rika
IPC分类号： H03M1/70 , H03M1/82
CPC分类号： H03M1/70 , H03M1/822 , H03M1/84
摘要： Errors of the cycle of PWM signal obtained based on digital data can be suppressed as much as possible without varying greatly according to vehicle speed.
It is determined which of categories a cycle of PWM signal computed and calculated based on an output from a vehicle speed sensor 4 falls into (S102 to S114). When the applicable category is determined, the data are made into signed 16-bit digital data with a resolution that has been determined in advance corresponding to the applicable category (S104, S108, S112, and S116). A fixed duty PWM signal having the cycle corresponding to the digital data is generated and is supplied to a navigation device.
摘要翻译：可以尽可能地抑制基于数字数据获得的PWM信号周期的错误，而不会根据车速大幅度变化。确定基于车速传感器4的输出计算和计算的PWM信号的周期的哪个类别落入（S102至S114）。当确定适用的类别时，将数据制成具有已经根据适用类别预先确定的分辨率的有符号的16位数字数据（S104，S108，S112和S116）。产生具有对应于数字数据的周期的固定工作PWM信号并将其提供给导航装置。

44. 发明公开

EP1691487A1 Enhancement of the dynamic range of a multibit digital-to-analog converter 有权转让
标题翻译： Dynamikbereichsverbesserung eines Multibit-Analog-Digital-Wandlers
公开(公告)号：EP1691487A1
公开(公告)日：2006-08-16
申请号：EP05425062.6
申请日：2005-02-10
申请人： STMicroelectronics S.r.l.
发明人： Grosso, Antonio , Meroni, Cristiano , Botti, Edoardo
IPC分类号： H03M1/18
CPC分类号： H03M1/70
摘要： The dynamic range of operation of a digital-to-analog converter of an audio system, including at least first and second subsets of individually selectable elementary current sources for delivering analog output current contributions, a code conversion circuit for selecting elementary current sources of said subsets first and second in function of the value of each sampled code of a pulse code modulated input signal, is embedded by multiplying by a certain factor incoming digital codes of said pulse code modulated input signal after their value has remained lower than a predefined threshold value for a certain period of time and for as long as their value equals or surpasses than said threshold value and correspondingly scaling and de-scaling by the same factor the amplitude of said analog output current contributions produced by the elementary current sources of said two subsets.
摘要翻译：音频系统的数模转换器的动态动态范围，包括用于传送模拟输出电流贡献的单独可选择的基本电流源的至少第一和第二子集;代码转换电路，用于选择所述子集的基本电流源在脉冲编码调制输入信号的每个采样码的值的函数中的第一和第二功能通过将所述脉冲编码调制输入信号的输入数字代码的值固定低于预定义的阈值只要它们的值等于或超过所述阈值，并且通过相同的因子相应地缩放和缩小由所述两个子集的基本电流源产生的所述模拟输出电流贡献的幅度。

45. 发明申请

WO2016118674A1 MULTI-PATH, SERIES-SWITCHED, PASSIVELY-SUMMED DIGITAL-TO-ANALOG CONVERTER 审中-公开
标题翻译：多通道，系列开关，通用数字模拟转换器
公开(公告)号：WO2016118674A1
公开(公告)日：2016-07-28
申请号：PCT/US2016/014199
申请日：2016-01-21
申请人： LA GROU, John, Howard
发明人： LA GROU, John, Howard
IPC分类号： H03M1/66 , H03M1/68
CPC分类号： H03M1/08 , H03M1/68 , H03M1/70
摘要： A digital-to-analog converter which minimizes noise and optimizes dynamic range by apportioning a least significant bits portion of an incoming digital signal to a low-path circuit and a most significant bits portion of the incoming digital signal to a high-path circuit. The low-path circuit has a low-path digital-to-analog converter, which feeds a low-path amplifier, which feeds a low-path resistive element, which feeds an output node. The high-path circuit has a high-path digital-to-analog converter, which feeds a high-path amplifier, which feeds a high-path resistive element when a high-path switching element is closed, which feeds an output node. The output node is a simple electrical connection of the outputs of the low-path and high-path resistive elements. The high-path switching element is closed when the incoming digital signal has an amplitude above a switching threshold level. Parameters of the circuit, including the sizes of the least significant bits portion and most significant bits portion of the incoming digital signal, are selected such that the switching threshold level is significantly above the noise level produced by the high-path circuit thereby providing psychoacoustic masking of noise produced by the high-path circuit.
摘要翻译：一种数模转换器，其通过将输入数字信号的最低有效位部分分配给输入数字信号的低通路电路和最高有效位部分到高路径电路来最小化噪声并优化动态范围。低通路电路具有低通道数模转换器，其馈送低通路放大器，该低通路放大器馈送输入节点的低通路电阻元件。高路径电路具有高通道数模转换器，其馈送高通路放大器，当高通道开关元件闭合时，高通路放大器馈送高通路电阻元件，馈送输出节点。输出节点是低通路和高通路电阻元件的输出的简单电连接。当输入数字信号具有高于开关阈值电平的幅度时，高通道开关元件闭合。选择电路的参数，包括输入数字信号的最低有效位部分和最高有效位部分的大小，使得开关阈值电平明显高于由高通路电路产生的噪声电平，由此提供心理声学屏蔽的高通路电路产生的噪声。

46. 发明申请

WO2013008871A1 送信装置、送信方法、および通信システム审中-公开
标题翻译：传输装置，传输方法和传输系统
公开(公告)号：WO2013008871A1
公开(公告)日：2013-01-17
申请号：PCT/JP2012/067764
申请日：2012-07-05
申请人：日本電気株式会社 , 安部淳一
发明人：安部　淳一
IPC分类号： H03M1/66 , H04B10/00 , H04B10/02 , H04B10/18
CPC分类号： H04B10/516 , H03M1/70 , H04B10/07 , H04B10/25137 , H04B10/5053 , H04B10/548 , H04B10/612 , H04B2210/254 , H04L27/2627
摘要：　高速で大容量なデジタル通信におけるＤ／Ａ変換器の分解能不足による伝送特性の劣化を解消する送信装置を提供するため、本発明の送信装置は、入力データを符号化する符号化部１１と、符号化部１１からの出力信号を、この出力信号に基づく不等間隔な量子化レベル間隔を用いて、デジタルーアナログ変換部１３の分解能に基づく量子化レベル数で量子化する不等間隔量子化部１２と、不等間隔量子化部１２からの出力信号をアナログ信号に変換するデジタルーアナログ変換部１３と、あらかじめ設定された初期伝達関数と不等間隔量子化部１２の伝達関数とのズレを相殺するように、デジタルーアナログ変換部１３の出力レベルを調整する出力レベル調整部１４と、出力レベル調整部１４によって調整されたデジタルーアナログ変換部の出力信号に基づいて送信信号を生成する変調部１５と、を備える。
摘要翻译：为了提供一种发送装置，用于解决在高速，大容量数字通信期间由于D / A转换器的分辨率不足导致的传输特性的劣化，该发送装置具有：编码单元（11），用于对输入数据; 一个不等间隔量化器（12），用于基于基于数字模拟转换器（13）的分辨率的量化级数来量化来自编码单元（11）的输出信号，该数字模拟转换器基于不等间隔量化级间隔，基于输出信号; 用于将来自不等间隔量化器（12）的输出信号转换为模拟信号的数模转换器（13）输出电平调节器（14），用于调整数模转换器（13）的输出电平，以抵消预置的初始传递函数与不等间隔量化器（12）的传递函数之间的任何差异; 以及用于基于由所述输出电平调整器（14）调节的来自所述数模转换器的输出信号来产生发送信号的调制器（15）。

47. 发明申请

WO2005055428A8 READ-ONLY SERIAL INTERFACE WITH VERSATILE MODE PROGRAMMING 审中-公开
标题翻译：具有独立模式编程的只读串行接口
公开(公告)号：WO2005055428A8
公开(公告)日：2005-08-25
申请号：PCT/US2004037402
申请日：2004-11-10
申请人： ANALOG DEVICES INC , BYRNE MICHAEL , O'BYRNE NICOLA , PRICE COLIN , HUMMERSTON DEREK
发明人： BYRNE MICHAEL , O'BYRNE NICOLA , PRICE COLIN , HUMMERSTON DEREK
IPC分类号： G06F1/32 , H03M1/00 , H03M1/12 , H03M1/42 , H03M1/46 , H03M1/70 , H04M1/73
CPC分类号： H03M1/004 , G06F1/3209 , H03M1/002 , H03M1/46 , H03M1/462 , H03M1/70 , H04W52/0287 , Y02D70/00 , Y02D70/12 , Y02D70/122
摘要： A method for placing a device in a selected mode of operation. The method comprises the steps of initializing a device select signal (307) into a first logic state, asserting the device select signal in a second logic state, and returning the device select signal to the first logic state within a first user-controlled time window. A device is also described that includes means for detecting logic state transitions at a device select input and a clock input (306), and means for changing operating mode of the device in response to a predetermined number of logic state transitions at the clock input, occurring between logic state transitions at the device select input. The selected operating mode may be a reduced power consumption mode, for example, or another operating mode of the device, such as a daisy-chain mode of operation, or a mode that accommodates programming of analog input range.
摘要翻译：一种用于将设备放置在所选择的操作模式中的方法。该方法包括以下步骤：将设备选择信号（307）初始化为第一逻辑状态，在第二逻辑状态中断言设备选择信号，并在第一用户控制的时间窗口内将设备选择信号返回到第一逻辑状态。还描述了一种装置，其包括用于检测设备选择输入和时钟输入（306）处的逻辑状态转换的装置，以及用于响应于时钟输入处的预定数量的逻辑状态转换来改变设备的工作模式的装置，发生在设备选择输入的逻辑状态转换之间。所选择的操作模式可以是诸如菊花链操作模式的降低的功耗模式，例如或设备的另一操作模式，或者适应模拟输入范围的编程的模式。

48. 发明申请

WO1991003105A1 DIGITAL-TO-ANALOG CONVERTER 审中-公开
标题翻译：数字到模拟转换器
公开(公告)号：WO1991003105A1
公开(公告)日：1991-03-07
申请号：PCT/JP1990001055
申请日：1990-08-20
申请人： FUJITSU LIMITED , TOKUHIRO, Noriyuki
发明人： FUJITSU LIMITED
IPC分类号： H03M01/70
CPC分类号： H03M1/70 , H03M1/808
摘要： A digital-to-analog converter of the current addition type using weighting resistors has an input resistance network (4) that produces a resistance corresponding to an input digital signal that consists of predetermined bits, and an adder (3) that has a first input terminal connected to the input resistance network and a second input terminal set to a reference potential to add signals on the first and second input terminals. The adder has an output terminal that outputs the result of addition which corresponds to an analog signal that is corresponded to said input digital signal. The digital-to-analog converter is placed between the first input terminal and the output terminal of the adder. This converter further includes a feedback resistance network (5) for producing a feedback resistance corresponding to a control signal indicative of the magnitude of said input digital signal, and a feedback resistance network control circuit (7) responsive to said input signal for producing said control signal indicative of the magnitude of said input digital signal.

49. 发明申请

WO2015160655A1 SWITCHABLE SECONDARY PLAYBACK PATH 审中-公开
标题翻译：可切换二级回放路径
公开(公告)号：WO2015160655A1
公开(公告)日：2015-10-22
申请号：PCT/US2015/025329
申请日：2015-04-10
申请人： CIRRUS LOGIC, INC.
发明人： DAS, Tejasvi , MELANSON, John L. , TUCKER, John, C. , FEI, Xiaofan
IPC分类号： H03M1/00 , H03M1/66 , H03M1/68 , H03M1/70
CPC分类号： H03M1/002 , H03M1/0845 , H03M1/66 , H03M1/662 , H03M1/68 , H03M1/70 , H03M1/785 , H03M3/32 , H03M3/392 , H03M3/414 , H03M3/416 , H03M3/50
摘要： In accordance with embodiments of the present disclosure, a processing system may include a plurality of processing paths including a first processing path and a second processing path, a digital-to-analog stage output, and a controller. The first processing path may include a first digital-to-analog converter for converting the digital input signal into a first intermediate analog signal, the first digital-to-analog converter configured to operate in a high-power state and a low-power state. The second processing path may include a second digital-to-analog converter for converting a digital input signal into a second intermediate analog signal. The digital-to-analog stage output may be configured to generate an analog signal comprising a sum of the first intermediate analog signal and the second intermediate analog signal. The controller may be configured to operate the first digital-to-analog converter in the lower-power state when a magnitude of the digital input signal is below a threshold magnitude.
摘要翻译：根据本公开的实施例，处理系统可以包括多个处理路径，包括第一处理路径和第二处理路径，数模转换阶段输出和控制器。第一处理路径可以包括用于将数字输入信号转换成第一中间模拟信号的第一数模转换器，第一数模转换器被配置为在大功率状态和低功率状态。第二处理路径可以包括用于将数字输入信号转换成第二中间模拟信号的第二数模转换器。数模转换级输出可以被配置为产生包括第一中间模拟信号和第二中间模拟信号之和的模拟信号。控制器可以被配置为当数字输入信号的幅度低于阈值大小时，在较低功率状态下操作第一数模转换器。

50. 发明申请

WO2008152642A1 LINEARISED OPTICAL DIGITAL MODULATOR 审中-公开
标题翻译：线性光学数字调制器
公开(公告)号：WO2008152642A1
公开(公告)日：2008-12-18
申请号：PCT/IL2008/000805
申请日：2008-06-12
申请人： RAMOT AT TEL AVIV UNIVERSITY LTD. , EHRLICHMAN, Yossef , AMRANI, Ofer , RUSCHIN, Shlomo
发明人： EHRLICHMAN, Yossef , AMRANI, Ofer , RUSCHIN, Shlomo
IPC分类号： G02F7/00 , G02F1/01
CPC分类号： H03M1/70 , G02F1/0121 , G02F1/015 , G02F1/225 , G02F7/00 , G02F2001/212 , G02F2203/19 , H03M1/002 , H04B10/2504 , H04B10/2575 , H04B10/505 , H04B10/5055 , H04B10/516 , H04B10/541 , H04B10/556
摘要： A modulator device (10) for converting digital data into analog modulation of an optical signal (16) includes an electronic input (12) for receiving an input data word (D) of N bits and an electrically controllable modulator (14) for modulating the intensity of the optical signal (16), the modulator including M actuating electrodes (18) where M>=N. An electrode actuating device (20), most preferably a digital-to-digital converter (DDC), is responsive to the input data word to supply an actuating voltage to the actuating electrodes (18). According to an alternative, or supplementary, aspect of the invention, the set of electrodes (18) includes at least one electrode having an effective area which is not interrelated to others of the set by factors of two. One preferred implementation employs a Mach-Zehnder modulator. Another employs a semiconductor laser.
摘要翻译：用于将数字数据转换成光信号（16）的模拟调制的调制器装置（10）包括用于接收N位输入数据字（D）的电子输入端（12）和用于调制光信号强度（16），调制器包括M个致动电极（18），其中M> = N。电极致动装置（20），最优选数字 - 数字转换器（DDC）响应于输入数据字来向致动电极（18）提供致动电压。根据本发明的替代或补充方面，所述电极组（18）包括至少一个电极，所述电极具有与所述组中的其它因素不相关的有效面积。一个优选的实施方案采用马赫 - 曾德尔调制器。另一个采用半导体激光器。

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