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41. 发明公开

KR1020140121347A 신호 처리 장치 审中-实审
标题翻译：信号处理装置
公开(公告)号：KR1020140121347A
公开(公告)日：2014-10-15
申请号：KR1020140037470
申请日：2014-03-31
申请人： 가부시키가이샤 한도오따이 에네루기 켄큐쇼
发明人： 오카모토유키 , 이케다타카유키 , 쿠로카와요시유키 , 타케무라야스히코
IPC分类号： H03K19/0185 , H03K19/00
CPC分类号： H03F3/45076 , H03F1/223 , H03F3/45179 , H03F3/45183 , H03F3/45237 , H03F2203/45394 , H03F2203/45518 , H03F2203/45674 , H03K19/018528
摘要： 본 발명은 레벨 시프터를 제공하는 것을 과제로 한다.
일례에서는, 제 1 전위와 제 2 전위로 이루어지는 바이너리 신호를, 제 1 전위와 제 3 전위로 이루어지는 신호로 변환하는 레벨 시프터 및 그것을 이용한 신호 처리 회로이다. 또한, 제 1 전위는 제 2 전위보다 높고, 제 2 전위는 제 3 전위보다 높다. 제 1 전위와 제 3 전위의 차이는 3V 이상 4V 미만이어도 좋다. 여기서, 레벨 시프터는 증폭 회로에 입력되는 제 1 신호의 전위의 변화에 따라, 일정한 시간만 증폭 회로를 가동시키기 위한 제 2 신호를 생성하는 전류 제어 회로를 가진다. 또한, 레벨 시프터의 출력은 문턱값이 0V 미만인 N형 트랜지스터의 게이트에 입력된다. 그 외의 실시형태도 클레임된다.
摘要翻译：本发明的目的是提供一种电平转换器。作为一个例子，提供了一种电平移位器，其将具有第一电位和第二电位的二进制信号转换为具有第一电位和第三电位的信号，以及使用其的信号处理电路。此外，第一电位高于第二电位，第二电位高于第三电位。第一电位和第三电位之间的差可以等于或高于3V并低于4V。此时，电平移位器包括电流控制电路，其产生仅用于操作放大电路的第二信号根据输入到放大电路的第一信号的电位变化，预定时间。此外，电平移位器的输出被输入到阈值电压为0V或更小的N型晶体管的栅极。要求保护其他实施例。

42. 发明申请

WO2019133474A1 DIFFERENTIAL AMPLIFIER WITH COMPLEMENTARY UNIT STRUCTURE 审中-公开
公开(公告)号：WO2019133474A1
公开(公告)日：2019-07-04
申请号：PCT/US2018/067063
申请日：2018-12-21
申请人： QUALCOMM INCORPORATED
发明人： KARMAKER, Rahul , FAN, Bin
IPC分类号： H03F3/45
CPC分类号： H03F1/0205 , H03F3/193 , H03F3/4521 , H03F3/45237 , H03F3/4565 , H03F2200/36 , H03F2200/411 , H03F2200/451 , H03F2200/453 , H03F2200/456 , H03F2200/555 , H03F2203/45022 , H03F2203/45026 , H03F2203/45082 , H03F2203/45172 , H03F2203/45188 , H03F2203/45288 , H03F2203/45418 , H03F2203/45424 , H03F2203/45494 , H03F2203/45508
摘要： Certain aspects of the present disclosure generally relate to a differential amplifier implemented using a complementary metal-oxide-semiconductor (CMOS) structure. The differential amplifier generally includes a first pair of transistors and a second pair of transistors coupled to the first pair of transistors. The gates of the first pair of transistors and gates of the second pair of transistors may be coupled to respective differential input nodes of the differential amplifier, and drains of the first pair of transistors and drains of the second pair of transistors may be coupled to respective differential output nodes of the differential amplifier. In certain aspects, the differential amplifier may include a biasing transistor having a drain coupled to a source of a transistor of the first pair of transistors and having a gate coupled to a common-mode feedback (CMFB) path of the differential amplifier.

43. 发明申请

WO2013066752A1 DIFFERENTIAL AMPLIFIER 审中-公开
标题翻译：差分放大器
公开(公告)号：WO2013066752A1
公开(公告)日：2013-05-10
申请号：PCT/US2012/062144
申请日：2012-10-26
申请人： MARVELL WORLD TRADE, LTD. , CYRUSIAN, Sasan , UEHARA, Gregory T.
发明人： CYRUSIAN, Sasan , UEHARA, Gregory T.
IPC分类号： H03F3/45
CPC分类号： H03F3/45237 , H03F3/45 , H03F3/4565
摘要： Aspects of the disclosure provide a differential amplifier. The differential amplifier includes a first pair of complementary transistors, a second pair of complementary transistors, and a current source. First control terminals of the first pair of complementary transistors are coupled to a first input node of the differential amplifier and first driving terminals of the first pair of complementary transistors are coupled to a first output node of the differential amplifier for driving a load. Second control terminals of the second pair of complementary transistors are coupled to a second input node of the differential amplifier and second driving terminals of the second pair of complementary transistors coupled to a second output node of the differential amplifier for driving the load. The current source is configured to maintain a substantially constant total current flow through the first pair of complementary transistors and the second pair of complementary transistors.
摘要翻译：本公开的方面提供了差分放大器。差分放大器包括第一对互补晶体管，第二对互补晶体管和电流源。第一对互补晶体管的第一控制端子耦合到差分放大器的第一输入节点，第一对互补晶体管的第一驱动端耦合到差分放大器的第一输出节点，用于驱动负载。第二对互补晶体管的第二控制端子耦合到差分放大器的第二输入节点，并且耦合到差分放大器的第二输出节点的第二对互补晶体管的第二驱动端子用于驱动负载。电流源被配置为保持通过第一对互补晶体管和第二对互补晶体管的基本恒定的总电流。

44. 发明申请

WO2011072028A1 LOW OUTPUT IMPEDANCE RF AMPLIFIER 审中-公开
标题翻译：低输出阻抗RF放大器
公开(公告)号：WO2011072028A1
公开(公告)日：2011-06-16
申请号：PCT/US2010/059488
申请日：2010-12-08
申请人： BLACK SAND TECHNOLOGIES, INC. , PAUL, Susanne, A. , GOLDENBERG, Marius
发明人： PAUL, Susanne, A. , GOLDENBERG, Marius
IPC分类号： H03F1/08 , H03F1/56 , H03F3/45 , H03F3/50
CPC分类号： H03F3/45179 , H03F1/086 , H03F1/565 , H03F3/21 , H03F3/45237 , H03F3/505 , H03F2200/411 , H03F2200/492 , H03F2200/495 , H03F2200/69 , H03F2203/45394 , H03F2203/45612 , H03F2203/5042
摘要： A radio frequency (RF) power amplifier includes a low impedance pre- driver (513) driving the input of a common- source output amplifier stage (514). The preamplifier (513) includes a first transistor (502) that has a first terminal coupled to a preamplifier RF input node (501), a second terminal coupled to a preamplifier RF output node (503), and a third terminal coupled to a supply voltage node (515). A first inductor (504) is coupled between the RF output node (503) and a bias voltage node (505). A voltage difference between respective first and second voltages on the RF input node (501) and the RF output node (503) that are substantially in phase, determines current through the first transistor (502).
摘要翻译：射频（RF）功率放大器包括驱动共源极输出放大器级（514）的输入的低阻抗预驱动器（513）。前置放大器（513）包括第一晶体管（502），其具有耦合到前置放大器RF输入节点（501）的第一端子，耦合到前置放大器RF输出节点（503）的第二端子，以及耦合到电源电压节点（515）。第一电感器（504）耦合在RF输出节点（503）和偏置电压节点（505）之间。基本上同相的RF输入节点（501）和RF输出节点（503）上的相应的第一和第二电压之间的电压差确定通过第一晶体管（502）的电流。

45. 发明申请

WO2005104357A1 HIGH SPEED RAIL TO RAIL PHASE SPLITTER FOR PROVIDING A SYMMETRICAL DIFFERENTIAL OUTPUT SIGNAL HAVING LOW SKEW 审中-公开
标题翻译：高速铁路到轨道相位分离器，用于提供具有低轴距的对称差分输出信号
公开(公告)号：WO2005104357A1
公开(公告)日：2005-11-03
申请号：PCT/IB2005/051279
申请日：2005-04-19
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , KHOURY, Elie, G. , SESSIONS, DC
发明人： KHOURY, Elie, G. , SESSIONS, DC
IPC分类号： H03F3/26
CPC分类号： H03F3/265 , H03F3/3061 , H03F3/45237 , H03F2203/45166 , H03F2203/45221 , H03F2203/45611 , H03F2203/45666
摘要： A novel high-speed phase splitter circuit (100) and method of operation are disclosed. This high-speed phase splitter (100) creates a differential rail-to-rail output signal from a single ended input signal, with an inherent low skew and symmetrical output. The circuit (100) uses a phase splitting input stage (110, 130) followed by several amplification stages (150, 170) that are symmetrical and balanced in nature.
摘要翻译：公开了一种新颖的高速相分离器电路（100）和操作方法。该高速分相器（100）从单端输入信号产生差分轨至轨输出信号，具有固有的低偏移和对称输出。电路（100）使用相分离输入级（110,130），随后是几个在本质上是对称和平衡的放大级（150,170）。

46. 发明申请

WO2012101467A1 EFFICIENT LOW NOISE DIFFERENTIAL AMPLIFIER, REUTILIZING THE BIAS CURRENT 审中-公开
标题翻译：有效的低噪声差分放大器，消除偏置电流
公开(公告)号：WO2012101467A1
公开(公告)日：2012-08-02
申请号：PCT/IB2011/000231
申请日：2011-01-24
申请人： TREDEFIN S.A. , MIGUEZ DE MORI, Matias , ARNAUD MACEIRA, Alfredo
发明人： ARNAUD MACEIRA, Alfredo
IPC分类号： H03F1/02 , H03F3/45 , H03F3/21 , H03F3/195
CPC分类号： H03F3/45237 , H03F1/0283 , H03F3/195 , H03F3/211 , H03F3/4508 , H03F3/45085 , H03F3/45139 , H03F3/45179 , H03F3/45183 , H03F3/45502 , H03F3/45605 , H03F3/4565 , H03F3/45753 , H03F2200/261 , H03F2200/375 , H03F2200/456 , H03F2203/21106 , H03F2203/21142 , H03F2203/45212 , H03F2203/45244 , H03F2203/45292 , H03F2203/45352 , H03F2203/45362 , H03F2203/45418 , H03F2203/45424 , H03F2203/45544 , H03F2203/45588 , H03F2203/45616 , H03F2203/45618 , H03F2203/45646 , H03F2203/45681
摘要： According to some aspects, a device comprising a plurality of cameras arranged in an array, each of the plurality of cameras producing a signal indicative of radiation impinging on the respective camera, the plurality of cameras arranged such that the field of view of each of the plurality of cameras at least partially overlaps the field of view of at least one adjacent camera of the plurality of cameras, to form a respective plurality of overlap regions, an energy conversion component for converting first radiation impinging on a surface of the energy conversion component to second radiation at a lower energy that is detectable by the plurality of cameras, and at least one computer for processing the signals from each of the plurality cameras to generate at least one image, the at least one processor configured to combine signals in the plurality of overlap regions to form the at least one image is provided.
摘要翻译：根据一些方面，一种包括以阵列布置的多个摄像机的设备，所述多个照相机中的每一个产生指示照射在相应摄像机上的辐射的信号，所述多个照相机布置成使得每个摄像机的视场多个相机至少部分地与多个相机的至少一个相邻相机的视场重叠，以形成相应的多个重叠区域，用于将能量转换部件的表面上的第一辐射转换成能量转换部件的能量转换部件能够被多个摄像机检测到的较低能量的第二辐射，以及至少一个计算机，用于处理来自多个摄像机中的每一个的信号以产生至少一个图像，所述至少一个处理器被配置为组合多个摄像机中的信号提供重叠区域以形成至少一个图像。

47. 发明申请

WO2009058803A1 LOW POWER LOW VOLTAGE DIFFERENTIAL SIGNALING (LVDS) OUTPUT DRIVERS 审中-公开
标题翻译：低功耗低电压差分信号（LVDS）输出驱动器
公开(公告)号：WO2009058803A1
公开(公告)日：2009-05-07
申请号：PCT/US2008/081503
申请日：2008-10-29
申请人： TEXAS INSTRUMENTS INCORPORATED , FATTARUSO, John
发明人： FATTARUSO, John
IPC分类号： H03K19/0185 , H03K19/0175
CPC分类号： H03F3/45237 , H03F3/3071 , H03F3/45085 , H03F3/45112 , H03F3/45506 , H03F3/4565 , H03F2203/30048 , H03F2203/45418 , H03F2203/45424 , H03F2203/45431 , H03F2203/45434 , H03K19/017527
摘要： A method and apparatus for providing a low power low voltage differential signaling driver are disclosed. In an example, a low voltage differential signaling driver circuit (500) is described, comprising a first current source Q6 to provide current to a first differential pair (204) of PNP transistors Q3 and Q4, a pair of transresistance amplifiers (206) and (208) driven by a corresponding pair of transconductance stages (212) and (214), a second current source Q5 to provide current to a second differential pair (210) of PNP transistors Q7 and Q8, and an output port having a common mode output voltage and a differential output voltage based on a state of the first differential pair of PNP transistors Q3 and Q4 and the second differential pair of PNP transistors Q7 and Q8.
摘要翻译：公开了一种用于提供低功率低压差分信号驱动器的方法和装置。在一个示例中，描述了低电压差分信号驱动器电路（500），其包括用于向PNP晶体管Q3和Q4的第一差分对（204）提供电流的第一电流源Q6，一对跨阻放大器（206）和（208）由相应的一对跨导级（212）和（214）驱动，第二电流源Q5向PNP晶体管Q7和Q8的第二差分对（210）提供电流，以及具有共模的输出端输出电压和基于PNP晶体管Q3和Q4的第一差分对的状态和PNP晶体管Q7和Q8的第二差分对的状态的差分输出电压。

48. 发明申请

WO2005104356A1 HIGH SPEED DIFFERENTIAL RECEIVER WITH RAIL TO RAIL COMMON MODE OPERATION HAVING A SYMMETRICAL DIFFERENTIAL OUTPUT SIGNAL WITH LOW SKEW 审中-公开
标题翻译：具有轨道的高速差分接收器具有低轴的对称差分输出信号的共同模式操作
公开(公告)号：WO2005104356A1
公开(公告)日：2005-11-03
申请号：PCT/IB2005/051278
申请日：2005-04-19
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , KHOURY, Elie, G. , SESSIONS, DC
发明人： KHOURY, Elie, G. , SESSIONS, DC
IPC分类号： H03F3/26
CPC分类号： H03F3/265 , H03F3/3061 , H03F3/45237 , H03F3/45704 , H03F2203/45401
摘要： A novel high-speed differential receiver (100) is disclosed that provides a new method and apparatus receiving and amplifying a small differential voltage with a rail-to-rail common mode voltage. The receiver output signals are differential signals with low skew and high symmetry. This high-speed differential receiver (100) is based on a common mode voltage normalization, which is based on a differential phase splitting methodology, before the resulting signal is recombined, normalized and amplified. The method involves using a differential signal splitting stage (110) followed by a common mode voltage normalization stage (130), then a controlled gain transimpedance amplification stage (150), and then amplification using one or two rail to rail amplification stages (170) that are symmetrical and balanced in nature.
摘要翻译：公开了一种新颖的高速差动接收器（100），其提供了一种以轨至轨共模电压接收和放大小差分电压的新方法和装置。接收机输出信号是具有低偏移和高对称性的差分信号。该高速差分接收器（100）基于基于差分相位分割方法的共模电压归一化，在所得信号被重组，归一化和放大之前。该方法包括使用差分信号分离级（110），随后是共模电压归一化级（130），然后使用受控增益跨阻抗放大级（150），然后使用一个或两个轨到轨放大级（170）进行放大，本质上是对称和平衡的。

49. 发明申请

WO2000026907A1 SENSE AMPLIFIER 审中-公开
标题翻译：感应放大器
公开(公告)号：WO2000026907A1
公开(公告)日：2000-05-11
申请号：PCT/US1999025628
申请日：1999-11-01
申请人： INTEL CORPORATION , KURD, Nasser, A.
发明人： INTEL CORPORATION
IPC分类号： G11B19/00
CPC分类号： H03F3/45237 , H03F2203/45454 , H03K19/018528
摘要： A sense amplifier (500) comprising first (518, 520) and second (522, 524) CMOS inverters, an pMOS current mirror (502, 504), an nMOS current mirror (506, 508), a source pMOSFET (510) to source current, and a sink nMOSFET (512) to sink current. The gate voltage of the first CMOS inverter (518, 520) is the input voltage and the gate voltage of the second CMOS inverter (522, 524) is at the reference voltage. The output voltage (516) is at the drains of the first CMOS inverter. The pMOS and nMOS current mirrors provide active loads to the first and second CMOS inverters. The sense amplifier is self-biasing by connecting the gate of the source pMOSFET to the gates of the pMOS current mirror and by connecting the gate of the sink nMOSFET to the gates of the nMOS current mirror.
摘要翻译：包括第一（518,520）和第二（522,524）CMOS反相器的读出放大器（500），pMOS电流镜（502,504），nMOS电流镜（506,508），源pMOSFET（510）源电流和用于吸收电流的sink nMOSFET（512）。第一CMOS反相器（518,520）的栅极电压是第二CMOS反相器（522,524）的输入电压，栅极电压处于参考电压。输出电压（516）位于第一CMOS反相器的漏极处。 pMOS和nMOS电流镜向第一和第二CMOS反相器提供有源负载。读出放大器通过将源极pMOSFET的栅极连接到pMOS电流镜的栅极并通过将sink nMOSFET的栅极连接到nMOS电流镜的栅极来进行自偏置。

50. 发明公开

EP3113359A1 AMPLIFIER ARRANGEMENT 有权
标题翻译： VERSTÄRKERANORDNUNG
公开(公告)号：EP3113359A1
公开(公告)日：2017-01-04
申请号：EP16183231.6
申请日：2013-11-28
申请人： ams AG
发明人： Fitzi, Andreas
IPC分类号： H03F1/26 , H03F3/45
CPC分类号： H03F1/26 , H03F3/21 , H03F3/45183 , H03F3/45237 , H03F3/45273 , H03F2203/45352 , H03F2203/45366
摘要： An amplifier arrangement is presented, comprising a first differential stage (DS1) comprising at least two transistors (M1, M1'), at least a second differential stage (DS2) comprising at least two transistors (M3, M3'), at least one of the transistors of the first and second differential stage (DS1, DS2), respectively, has a control input commonly coupled to an input of the amplifier arrangement, at least one transistor (M1) of the first differential stage and one transistor (M3) of the second differential stage are arranged in a common current path, which is coupled to an output of the amplifier arrangement. The transistors of one of the first and the second differential stages (DS1, DS2) are of a field effect transistor type having a first threshold voltage (Vth1). The transistors of another one of the first and the second differential stages (DS1, DS2) are of a bipolar transistor type having functionality of a second threshold voltage (Vth3) different from the first threshold voltage (Vth1).
摘要翻译：提供一种放大器装置，包括：包括至少两个晶体管（M1，M1'）的第一差分级（DS1），至少包括至少两个晶体管（M3，M3'）的第二差分级（DS2），至少一个第一差分级和第二差分级（DS1，DS2）的晶体管分别具有控制输入，共同耦合到放大器装置的输入，第一差分级的至少一个晶体管（M1）和一个晶体管（M3）的第二差分级被布置在公共电流路径中，该公共电流路径耦合到放大器装置的输出端。第一和第二差分级（DS1，DS2）之一的晶体管是具有第一阈值电压（Vth1）的场效应晶体管类型。第一和第二差分级（DS1，DS2）中的另一个的晶体管是具有与第一阈值电压（Vth1）不同的第二阈值电压（Vth3）的功能的双极型晶体管。

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