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41. 发明申请

US20170141079A1 SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THE SAME 有权
公开(公告)号：US20170141079A1
公开(公告)日：2017-05-18
申请号：US14939253
申请日：2015-11-12
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
发明人： CHIN-FU KAO , TSEI-CHUNG FU , JING-CHENG LIN
IPC分类号： H01L25/065 , H01L25/00
CPC分类号： H01L25/0657 , H01L21/76898 , H01L24/05 , H01L24/08 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/80 , H01L24/81 , H01L24/83 , H01L24/92 , H01L25/50 , H01L2224/04 , H01L2224/0401 , H01L2224/05557 , H01L2224/05638 , H01L2224/05647 , H01L2224/05687 , H01L2224/0569 , H01L2224/08145 , H01L2224/1161 , H01L2224/11616 , H01L2224/11831 , H01L2224/13009 , H01L2224/13019 , H01L2224/13124 , H01L2224/13147 , H01L2224/13184 , H01L2224/1601 , H01L2224/16012 , H01L2224/16145 , H01L2224/16146 , H01L2224/2919 , H01L2224/32145 , H01L2224/73201 , H01L2224/73204 , H01L2224/80075 , H01L2224/80203 , H01L2224/80896 , H01L2224/8101 , H01L2224/81011 , H01L2224/81012 , H01L2224/81022 , H01L2224/81075 , H01L2224/81203 , H01L2224/81895 , H01L2224/83075 , H01L2224/83104 , H01L2224/83191 , H01L2224/83203 , H01L2224/9211 , H01L2224/94 , H01L2225/06513 , H01L2225/06544 , H01L2225/06565 , H01L2924/1434 , H01L2924/3511 , H01L2224/81 , H01L2924/01014 , H01L2924/05442 , H01L2924/05042 , H01L2924/00014 , H01L2924/07025 , H01L2224/83 , H01L2224/80 , H01L2924/00012 , H01L2224/08 , H01L2224/16 , H01L2924/01029 , H01L2924/00
摘要： The present disclosure provides a semiconductor package, including a first device having a first joining surface, a first conductive component at least partially protruding from the first joining surface, a second device having a second joining surface facing the first joining surface, and a second conductive component at least exposing from the second joining surface. The first conductive component and the second conductive component form a joint having a first beak. The first beak points to either the first joining surface or the second joining surface.

42. 发明授权

US09640509B1 Advanced metal-to-metal direct bonding 有权
公开(公告)号：US09640509B1
公开(公告)日：2017-05-02
申请号：US15280524
申请日：2016-09-29
申请人： International Business Machines Corporation
发明人： Chih-Chao Yang
IPC分类号： H01L23/00
CPC分类号： H01L24/26 , H01L24/03 , H01L24/05 , H01L24/08 , H01L24/27 , H01L24/32 , H01L24/80 , H01L24/94 , H01L25/50 , H01L2224/0341 , H01L2224/0345 , H01L2224/03452 , H01L2224/0346 , H01L2224/0361 , H01L2224/03616 , H01L2224/039 , H01L2224/04 , H01L2224/05026 , H01L2224/05073 , H01L2224/05082 , H01L2224/05157 , H01L2224/05166 , H01L2224/05176 , H01L2224/05181 , H01L2224/05184 , H01L2224/05187 , H01L2224/05557 , H01L2224/05571 , H01L2224/05572 , H01L2224/05624 , H01L2224/05647 , H01L2224/05657 , H01L2224/05673 , H01L2224/05676 , H01L2224/05681 , H01L2224/05684 , H01L2224/08145 , H01L2224/08147 , H01L2224/08148 , H01L2224/80075 , H01L2224/80201 , H01L2224/80365 , H01L2224/80385 , H01L2224/80895 , H01L2224/80948 , H01L2224/94 , H01L2224/08 , H01L2224/80 , H01L2924/00014 , H01L2924/00012 , H01L2924/04953 , H01L2924/01022 , H01L2924/0498 , H01L2924/01044 , H01L2924/01073 , H01L2924/0509 , H01L2924/0496 , H01L2924/01074
摘要： A first semiconductor structure having a first metallic structure that has a convex outermost surface and a second semiconductor structure having a second metallic structure that has a concave outermost surface are first provided. The first and second metallic structures are provided utilizing liner systems that have an opposite galvanic reaction to the metal or metal alloy that constitutes the first and second metallic structures such that during a planarization process the metal liners have a different removal rate than the metal or metal alloy that constitutes the first and second metallic structures. The first semiconductor structure and the second semiconductor structure are then bonded together such that the convex outermost surface of the first metallic structure is in direct contact with the concave outermost surface of the second metallic structure.

43. 发明申请

US20170047260A1 Apparatus And Method For Verification Of Bonding Alignment 审中-公开
标题翻译：用于验证接合对准的装置和方法
公开(公告)号：US20170047260A1
公开(公告)日：2017-02-16
申请号：US15333098
申请日：2016-10-24
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Xin-Hua Huang , Ping-Yin Liu , Lan-Lin Chao
IPC分类号： H01L21/66 , H01L23/00
CPC分类号： H01L22/34 , H01L21/768 , H01L22/20 , H01L22/30 , H01L23/492 , H01L24/05 , H01L24/08 , H01L24/80 , H01L24/89 , H01L24/94 , H01L2224/0237 , H01L2224/05647 , H01L2224/08145 , H01L2224/80011 , H01L2224/80013 , H01L2224/80075 , H01L2224/80121 , H01L2224/802 , H01L2224/80203 , H01L2224/80894 , H01L2224/80895 , H01L2224/80896 , H01L2224/94 , H01L2224/80 , H01L2924/00012 , H01L2924/00014
摘要： Presented herein is a device comprising a common node disposed in a first wafer a test node disposed in a first wafer and having a plurality of test pads exposed at a first surface of the first wafer. The test node also has test node lines connected to the test pads and that are separated by a first spacing and extend to a second surface of the first wafer. A comb is disposed in a second wafer and has a plurality of comb lines having a second spacing different from the first spacing. Each of the comb lines has a first surface exposed at a first side of the second wafer. The comb lines provide an indication of an alignment of the first wafer and second wafer by a number or arrangement of connections made by the plurality of comb lines between the test node lines and the common node.
摘要翻译：本文提出了一种装置，其包括设置在第一晶片中的公共节点，设置在第一晶片中的测试节点并且具有暴露在第一晶片的第一表面处的多个测试焊盘。测试节点还具有连接到测试焊盘并且被第一间隔分开并延伸到第一晶片的第二表面的测试节点线。梳子设置在第二晶片中，并且具有多个具有不同于第一间隔的第二间距的梳状线。每个梳状线具有在第二晶片的第一侧露出的第一表面。梳线通过由测试节点线和公共节点之间的多条梳线形成的多个或多个连接布置提供第一晶片和第二晶片的对准的指示。

44. 发明申请

US20150287694A1 Hybrid Bonding Systems and Methods for Semiconductor Wafers 审中-公开
标题翻译：半导体晶片的混合键合系统和方法
公开(公告)号：US20150287694A1
公开(公告)日：2015-10-08
申请号：US14725266
申请日：2015-05-29
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Ping-Yin Liu , Shih-Wei Lin , Xin-Hua Huang , Lan-Lin Chao , Chia-Shiung Tsai
IPC分类号： H01L23/00
CPC分类号： H01L24/80 , H01L24/03 , H01L24/05 , H01L24/08 , H01L24/27 , H01L24/74 , H01L24/94 , H01L2224/02215 , H01L2224/0361 , H01L2224/03616 , H01L2224/0381 , H01L2224/05647 , H01L2224/05687 , H01L2224/08145 , H01L2224/74 , H01L2224/7501 , H01L2224/75101 , H01L2224/7565 , H01L2224/75753 , H01L2224/75824 , H01L2224/80004 , H01L2224/80007 , H01L2224/8001 , H01L2224/80011 , H01L2224/80013 , H01L2224/80014 , H01L2224/80065 , H01L2224/80075 , H01L2224/80097 , H01L2224/80121 , H01L2224/80136 , H01L2224/80203 , H01L2224/80895 , H01L2224/80896 , H01L2224/83889 , H01L2224/94 , H01L2924/00014 , H01L2924/1461 , H01L2924/351 , Y10T156/15 , Y10T156/1744 , H01L2924/00012 , H01L2224/80 , H01L2924/05442 , H01L2924/00
摘要： Hybrid bonding systems and methods for semiconductor wafers are disclosed. In one embodiment, a hybrid bonding system for semiconductor wafers includes a chamber and a plurality of sub-chambers disposed within the chamber. A robotics handler is disposed within the chamber that is adapted to move a plurality of semiconductor wafers within the chamber between the plurality of sub-chambers. The plurality of sub-chambers includes a first sub-chamber adapted to remove a protection layer from the plurality of semiconductor wafers, and a second sub-chamber adapted to activate top surfaces of the plurality of semiconductor wafers prior to hybrid bonding the plurality of semiconductor wafers together. The plurality of sub-chambers also includes a third sub-chamber adapted to align the plurality of semiconductor wafers and hybrid bond the plurality of semiconductor wafers together.
摘要翻译：公开了用于半导体晶片的混合键合系统和方法。在一个实施例中，用于半导体晶片的混合键合系统包括腔室和设置在腔室内的多个子腔室。机器人处理器设置在腔室内，其适于移动多个子室内的室内的多个半导体晶片。多个子室包括适于从多个半导体晶片去除保护层的第一子室，以及适于在混合结合多个半导体之前激活多个半导体晶片的顶表面的第二子室晶圆在一起多个子室还包括适于对准多个半导体晶片并将多个半导体晶片混合地结合在一起的第三子室。

45. 发明申请

US20150021784A1 FRONT-TO-BACK BONDING WITH THROUGH-SUBSTRATE VIA (TSV) 有权
标题翻译：通过基板通过（TSV）进行正向连接
公开(公告)号：US20150021784A1
公开(公告)日：2015-01-22
申请号：US13943157
申请日：2013-07-16
申请人： Taiwan Semiconductor Manufacturing Co., Ltd.
发明人： Jing-Cheng LIN
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L23/481 , H01L21/76224 , H01L21/76898 , H01L24/80 , H01L24/92 , H01L24/94 , H01L25/0657 , H01L25/50 , H01L27/0688 , H01L2224/0401 , H01L2224/05025 , H01L2224/05124 , H01L2224/05147 , H01L2224/05563 , H01L2224/05564 , H01L2224/05572 , H01L2224/05573 , H01L2224/05582 , H01L2224/05647 , H01L2224/05666 , H01L2224/05681 , H01L2224/08147 , H01L2224/13 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2224/80013 , H01L2224/80075 , H01L2224/80091 , H01L2224/80095 , H01L2224/80896 , H01L2224/9202 , H01L2224/9212 , H01L2224/94 , H01L2225/06524 , H01L2225/06541 , H01L2225/06544 , H01L2225/06565 , H01L2924/10252 , H01L2924/10253 , H01L2924/10271 , H01L2924/10272 , H01L2924/10329 , H01L2924/10333 , H01L2924/10335 , H01L2924/10338 , H01L2924/10342 , H01L2224/80 , H01L2224/8203 , H01L2224/821 , H01L2224/80001 , H01L2224/82
摘要： Embodiments of mechanisms of forming a semiconductor device structure are provided. The semiconductor device structure includes a first semiconductor wafer and a second semiconductor wafer. The first semiconductor wafer includes a first transistor formed in a front-side of the first semiconductor wafer, and the second semiconductor wafer includes a second transistor formed in a front-side of the second semiconductor wafer. A backside of the second semiconductor wafer is bonded to the front-side of the first semiconductor wafer. The semiconductor device structure further includes an interconnect structure formed over the front-side of the second semiconductor wafer, and at least one first through substrate via (TSV) directly contacts a conductive feature of the first semiconductor wafer and the interconnect structure.
摘要翻译：提供了形成半导体器件结构的机构的实施例。半导体器件结构包括第一半导体晶片和第二半导体晶片。第一半导体晶片包括形成在第一半导体晶片的前侧的第一晶体管，第二半导体晶片包括形成在第二半导体晶片的前侧的第二晶体管。第二半导体晶片的背面接合到第一半导体晶片的正面。半导体器件结构还包括形成在第二半导体晶片的前侧上的互连结构，并且至少一个第一贯穿衬底通孔（TSV）直接接触第一半导体晶片的导电特征和互连结构。

46. 发明申请

US20140131874A1 SEMICONDUCTOR APPARATUS, ELECTRONIC DEVICE, AND METHOD OF MANUFACTURING SEMICONDUCTOR APPARATUS 有权
标题翻译：半导体装置，电子装置及制造半导体装置的方法
公开(公告)号：US20140131874A1
公开(公告)日：2014-05-15
申请号：US14162140
申请日：2014-01-23
申请人： Sony Corporation
发明人： Yoshihisa Kagawa , Naoki Komai
IPC分类号： H01L21/768 , H01L23/532
CPC分类号： H01L21/76838 , H01L23/53209 , H01L24/03 , H01L24/05 , H01L24/08 , H01L24/80 , H01L24/94 , H01L2224/0345 , H01L2224/03462 , H01L2224/03505 , H01L2224/03616 , H01L2224/05166 , H01L2224/05181 , H01L2224/05186 , H01L2224/05546 , H01L2224/05547 , H01L2224/05571 , H01L2224/05647 , H01L2224/08147 , H01L2224/0903 , H01L2224/45147 , H01L2224/48847 , H01L2224/80004 , H01L2224/80011 , H01L2224/80075 , H01L2224/8009 , H01L2224/80092 , H01L2224/80357 , H01L2224/80895 , H01L2224/80896 , H01L2225/06541 , H01L2924/00011 , H01L2924/00014 , H01L2924/01012 , H01L2924/01015 , H01L2924/01029 , H01L2924/12043 , H01L2924/13091 , H01L2924/1434 , H01L2924/00012 , H01L2924/00 , H01L2224/48 , H01L2924/04941 , H01L2924/04953 , H01L2224/05552 , H01L2924/01005 , H01L2924/01004 , H01L2924/01033
摘要： A semiconductor apparatus, electronic device, and method of manufacturing the semiconductor apparatus are disclosed. In one example, the semiconductor apparatus comprises a first semiconductor part that includes a first wiring, and a second semiconductor part that is adhered to the first semiconductor part and which includes a second wiring electrically connected to the first wiring. A metallic oxide is formed in at least one of the first wiring and the second wiring.
摘要翻译：公开了一种半导体装置，电子装置和半导体装置的制造方法。在一个示例中，半导体装置包括第一半导体部分，其包括第一布线，第二半导体部分粘附到第一半导体部分，并且包括电连接到第一布线的第二布线。金属氧化物形成在第一布线和第二布线中的至少一个中。

47. 发明专利

JP2013098541A Three-dimensional (3d) integrated circuit with enhanced copper-to-copper bonding, and method of forming the same 审中-公开
标题翻译：具有增强铜箔结合的三维（3D）集成电路及其形成方法
公开(公告)号：JP2013098541A
公开(公告)日：2013-05-20
申请号：JP2012197293
申请日：2012-09-07
申请人： Internatl Business Mach Corp , インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Machines Corporation
发明人： NGUYEN SON VAN
IPC分类号： H01L25/065 , H01L25/07 , H01L25/18
CPC分类号： H01L23/488 , H01L23/481 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/81 , H01L24/83 , H01L25/0657 , H01L25/50 , H01L2224/13025 , H01L2224/13147 , H01L2224/13562 , H01L2224/1357 , H01L2224/1358 , H01L2224/13649 , H01L2224/13655 , H01L2224/13657 , H01L2224/13666 , H01L2224/13676 , H01L2224/13681 , H01L2224/13684 , H01L2224/16145 , H01L2224/16501 , H01L2224/29147 , H01L2224/29564 , H01L2224/2957 , H01L2224/2958 , H01L2224/29649 , H01L2224/29655 , H01L2224/29657 , H01L2224/29666 , H01L2224/29676 , H01L2224/29681 , H01L2224/29684 , H01L2224/32501 , H01L2224/80075 , H01L2224/80097 , H01L2224/80895 , H01L2224/80896 , H01L2224/81005 , H01L2224/81193 , H01L2224/8183 , H01L2224/81895 , H01L2224/83005 , H01L2224/83193 , H01L2224/8383 , H01L2225/06513 , H01L2225/06541 , H01L2924/12042 , H01L2924/1306 , H01L2924/00014 , H01L2924/013 , H01L2924/00012 , H01L2924/053 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a three-dimensional (3D) integrated circuit which realizes improved Cu-Cu bonding.SOLUTION: At least one metal adhesion layer is formed on at least a Cu surface of a first device wafer. A second device wafer having another Cu surface is positioned atop the Cu surface of the first device wafer and on the at least one metal adhesion layer. The first and second device wafers are then bonded together. The step of bonding includes heating the device wafers to a temperature less than 400°C, with or without application of an external applied pressure. During the process of heating, the two Cu surfaces are bonded together, and the at least one metal adhesion layer gets oxygen atoms from the two Cu surfaces and forms at least one metal oxide bonding layer between the Cu surfaces.
摘要翻译：要解决的问题：提供实现改进的Cu-Cu键合的三维（3D）集成电路。解决方案：在第一器件晶片的至少Cu表面上形成至少一个金属粘附层。具有另一Cu表面的第二器件晶片被定位在第一器件晶片的Cu表面的顶部和至少一个金属粘附层上。然后将第一和第二器件晶片结合在一起。粘合步骤包括在施加或不施加外部施加的压力的情况下将器件晶片加热到低于400℃的温度。在加热过程中，两个Cu表面结合在一起，并且至少一个金属粘附层从两个Cu表面获得氧原子，并在Cu表面之间形成至少一个金属氧化物结合层。版权所有（C）2013，JPO＆INPIT

48. 发明专利

JP2013505559A How to combine the chips on the wafer 有权
公开(公告)号：JP2013505559A
公开(公告)日：2013-02-14
申请号：JP2012529140
申请日：2010-09-03
申请人：エーファウ・グループ・エー・タルナー・ゲーエムベーハー
发明人：マルクス・ヴィンプリンガー
IPC分类号： H01L25/065 , H01L25/07 , H01L25/18
CPC分类号： H01L21/568 , H01L21/561 , H01L21/563 , H01L21/6835 , H01L21/6836 , H01L23/3128 , H01L24/08 , H01L24/16 , H01L24/32 , H01L24/74 , H01L24/80 , H01L24/81 , H01L24/83 , H01L24/97 , H01L25/50 , H01L2221/68304 , H01L2221/68327 , H01L2221/68331 , H01L2221/68381 , H01L2224/0401 , H01L2224/0557 , H01L2224/08225 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/74 , H01L2224/7598 , H01L2224/80006 , H01L2224/80065 , H01L2224/80075 , H01L2224/80205 , H01L2224/80805 , H01L2224/80815 , H01L2224/8082 , H01L2224/80907 , H01L2224/81 , H01L2224/81005 , H01L2224/81065 , H01L2224/81075 , H01L2224/81205 , H01L2224/81805 , H01L2224/81815 , H01L2224/8182 , H01L2224/81907 , H01L2224/83005 , H01L2224/83065 , H01L2224/83075 , H01L2224/83205 , H01L2224/83805 , H01L2224/83815 , H01L2224/8382 , H01L2224/83907 , H01L2224/97 , H01L2225/06513 , H01L2225/06541 , H01L2225/06568 , H01L2924/00014 , H01L2924/0002 , H01L2924/01322 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/15738 , H01L2224/80 , H01L2224/83 , H01L2924/01014 , H01L2924/00 , H01L2224/05552
摘要：本発明は、前面側にチップ（３'）を含むベースウエハ（１）に複数のチップ（３）を結合する方法であって、前記チップ（３）が、前記ベースウエハ（１）の背面側で少なくとも一層に積層され、導電接続部が垂直に隣接するチップ（３、３'）間に組み立てられる方法に関連する。前記方法は、（ａ）前記ベースウエハ（１）の前面側（２）がキャリア（５）に固定される段階、（ｂ）チップ（３）の少なくとも一層が前記ベースウエハ（１）の背面側（６）の画定された位置に配置される段階、（ｃ）前記キャリア（５）に固定される前記ベースウエハ（１）の前記チップ（３、３'）が熱処理される段階を含む。前記方法は、段階（ｃ）の前に、前記ベースウエハ（１）のチップ（３'）が前記ベースウエハの積層チップ部分（１ｃ）に少なくとも分離されることによって特徴付けられる。

49. 发明授权

KR101377812B1 칩을 웨이퍼에 본딩하기 위한 방법 有权
标题翻译：芯片切割方法
公开(公告)号：KR101377812B1
公开(公告)日：2014-03-25
申请号：KR1020127006928
申请日：2010-09-03
申请人： 이베게 임모빌리엔 운트 베타일리궁스 게엠베하
发明人： 빔프링거,마르커스
IPC分类号： H01L21/58
CPC分类号： H01L21/568 , H01L21/561 , H01L21/563 , H01L21/6835 , H01L21/6836 , H01L23/3128 , H01L24/08 , H01L24/16 , H01L24/32 , H01L24/74 , H01L24/80 , H01L24/81 , H01L24/83 , H01L24/97 , H01L25/50 , H01L2221/68304 , H01L2221/68327 , H01L2221/68331 , H01L2221/68381 , H01L2224/0401 , H01L2224/0557 , H01L2224/08225 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/74 , H01L2224/7598 , H01L2224/80006 , H01L2224/80065 , H01L2224/80075 , H01L2224/80205 , H01L2224/80805 , H01L2224/80815 , H01L2224/8082 , H01L2224/80907 , H01L2224/81 , H01L2224/81005 , H01L2224/81065 , H01L2224/81075 , H01L2224/81205 , H01L2224/81805 , H01L2224/81815 , H01L2224/8182 , H01L2224/81907 , H01L2224/83005 , H01L2224/83065 , H01L2224/83075 , H01L2224/83205 , H01L2224/83805 , H01L2224/83815 , H01L2224/8382 , H01L2224/83907 , H01L2224/97 , H01L2225/06513 , H01L2225/06541 , H01L2225/06568 , H01L2924/00014 , H01L2924/0002 , H01L2924/01322 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/15738 , H01L2224/80 , H01L2224/83 , H01L2924/01014 , H01L2924/00 , H01L2224/05552
摘要： 지지웨이퍼(1)에복수의칩(9)을본딩하는방법에있어서, 지지웨이퍼(1)는지지웨이퍼(1) 상에적어도하나의층으로적층되는칩(3')을포함하고, 수직으로이웃하는칩들을더 연결하기위한전도성연결(7)이존재하고, 상기방법은 a) 지지웨이퍼(1)를캐리어(5)에고정하는단계와, b) 칩(3)의적어도하나의층을상기지지웨이퍼(1) 상의지정된위치로배치하는단계와, c) 캐리어(5)에고정되어있는지지웨이퍼(1) 상의칩(3)을열처리하는단계를포함하고, 단계 c) 이전에지지웨이퍼에서지지웨이퍼(1)의분리된칩 스텍섹션(1c)으로의적어도부분적인분리가발생하는것을특징으로하는지지웨이퍼에복수의칩을본딩하는방법.

50. 发明公开

KR1020090120227A 유기발광소자 및 이의 제작 방법 无效
标题翻译：有机发光装置及其制造方法
公开(公告)号：KR1020090120227A
公开(公告)日：2009-11-24
申请号：KR1020080046162
申请日：2008-05-19
申请人： 에스엔유 프리시젼 주식회사
发明人： 강창호 , 남궁성태 , 이태성
IPC分类号： H01L51/50
CPC分类号： H01L51/525 , H01L51/5246 , H01L51/5237 , H01L2224/80075 , H01L2224/80862
摘要： PURPOSE: An organic light-emitting device and a manufacturing method thereof are provided to alleviate the physical impact applied from the outside by absorbing the physical impact through a filling material. CONSTITUTION: A manufacturing method of an organic light-emitting device comprises the following steps of: forming a plurality of spacers and an organic light-emitting layer(200) on a substrate(100) so as to be separated from each other; injecting the substrate into a chamber of the vacuum condition; filling a filling material so as to coat the organic light-emitting layer and hardening it; and applying a sealant to areas in which the filling material is not filled among spaces between the spacers. A sealing unit is arranged on the spacers, sealant and filling material. The sealant(400) is hardened and sealed.
摘要翻译：目的：提供一种有机发光装置及其制造方法，以通过吸收通过填充材料的物理冲击来减轻从外部施加的物理冲击。构成：有机发光器件的制造方法包括以下步骤：在基板（100）上形成多个间隔物和有机发光层（200）以彼此分离; 将衬底注入真空条件的室中; 填充填充材料以涂覆有机发光层并使其硬化; 以及在间隔件之间的间隔中向填充材料未填充的区域施加密封剂。密封单元设置在间隔件，密封剂和填充材料上。密封剂（400）被硬化和密封。

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