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41. 发明申请

US20110006376A1 SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, AND DISPLAY DEVICE 审中-公开
标题翻译：半导体器件，半导体器件制造方法和显示器件
公开(公告)号：US20110006376A1
公开(公告)日：2011-01-13
申请号：US12922119
申请日：2009-03-03
申请人： Yasumori Fukushima , Yutaka Takafuji , Masao Moriguchi , Kenshi Tada , Steven Roy Droes
发明人： Yasumori Fukushima , Yutaka Takafuji , Masao Moriguchi , Kenshi Tada , Steven Roy Droes
IPC分类号： H01L27/092 , H01L29/78 , H01L21/30 , H01L29/739
CPC分类号： H01L27/124 , H01L27/1214 , H01L27/1225 , H01L27/1266 , H01L29/4908 , H01L29/66772
摘要： The present invention provides a semiconductor device capable of improving subthreshold characteristics of a PMOS transistor that is included in a thinned base layer and bonded to another substrate, a production method of such a semiconductor device, and a display device. The semiconductor device of the present invention is a semiconductor device, including: a substrate; and a device part bonded to the substrate, the device part including a base layer and a PMOS transistor, the PMOS transistor including a first electrical conduction path and a first gate electrode, the first electrical conduction path being provided inside the base layer on a side where the first gate electrode is disposed.
摘要翻译：本发明提供一种半导体器件，其能够改善包括在薄化的基底层中并结合到另一衬底的PMOS晶体管的亚阈值特性，这种半导体器件的制造方法和显示器件。本发明的半导体器件是半导体器件，包括：衬底; 以及与基板接合的器件部件，所述器件部件包括基极层和PMOS晶体管，所述PMOS晶体管包括第一导电路径和第一栅电极，所述第一导电路径设置在所述基极层的侧面其中设置第一栅电极。

42. 发明申请

US20100289037A1 SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE 审中-公开
标题翻译：半导体器件及其制造方法及显示器件
公开(公告)号：US20100289037A1
公开(公告)日：2010-11-18
申请号：US12812162
申请日：2008-10-10
申请人： Shin Matsumoto , Yutaka Takafuji , Yasumori Fukushima , kenshi Tada
发明人： Shin Matsumoto , Yutaka Takafuji , Yasumori Fukushima , kenshi Tada
IPC分类号： H01L33/00 , H01L27/092 , H01L21/336 , H01L29/786
CPC分类号： H01L27/1266 , H01L21/76254 , H01L27/124 , H01L29/78 , H01L29/78654
摘要： The present invention provides a semiconductor device having a plurality of MOS transistors with controllable threshold values in the same face and easy to manufacture, a manufacturing method thereof and a display device. The invention is a semiconductor device having a plurality of MOS transistors in the same face each having a structure formed by stacking a semiconductor active layer, a gate insulator, and a gate electrode, wherein the semiconductor device includes: an insulating layer stacked on a side opposite to a gate electrode side of the semiconductor active layer; and a conductive electrode stacked on a side opposite to a semiconductor active layer side of the insulating layer and extending over at least two of the plurality of MOS transistors.
摘要翻译：本发明提供一种半导体器件，其具有在相同的面上具有可控制的阈值的多个MOS晶体管并且易于制造，其制造方法和显示装置。本发明是一种具有多个MOS晶体管的半导体器件，它们具有通过层叠半导体有源层，栅极绝缘体和栅电极形成的结构，其中半导体器件包括：堆叠在一侧的绝缘层与半导体有源层的栅电极侧相对; 以及在与所述绝缘层的半导体有源层侧相反的一侧层叠的多个MOS晶体管中的至少两个上延伸的导电电极。

43. 发明授权

US07528446B2 Semiconductor substrate, semiconductor device, and manufacturing methods for them 有权
标题翻译：半导体衬底，半导体器件及其制造方法
公开(公告)号：US07528446B2
公开(公告)日：2009-05-05
申请号：US11086680
申请日：2005-03-23
申请人： Yutaka Takafuji , Yasumori Fukushima , Masao Moriguchi
发明人： Yutaka Takafuji , Yasumori Fukushima , Masao Moriguchi
IPC分类号： H01L27/01
CPC分类号： H01L27/1266 , H01L21/76202 , H01L21/76254 , H01L27/1203 , H01L27/1214 , H01L29/78603 , H01L29/78609
摘要： The present invention provides a semiconductor substrate, which comprises a singlecrystalline Si substrate which includes an active layer having a channel region, a source region, and a drain region, the singlecrystalline Si substrate including at least a part of a device structure not containing a well-structure or a channel stop region; a gate insulating film formed on the singlecrystalline Si substrate; a gate electrode formed on the gate insulating film; a LOCOS oxide film whose thickness is more than a thickness of the gate insulating film, the LOCOS oxide film being formed on the singlecrystalline Si substrate by surrounding the active layer; and an insulating film formed over the gate electrode and the LOCOS oxide film. On this account, on fabricating the semiconductor device having a high-performance integration system by forming the non-singlecrystalline Si semiconductor element and the singlecrystalline Si semiconductor element on the large insulating substrate, the process for making the singlecrystalline Si is simplified. Further, the foregoing arrangement provides a semiconductor substrate and a fabrication method thereof, which ensures device isolation of the minute singlecrystalline Si semiconductor element without highly-accurate photolithography, when the singlecrystalline Si semiconductor element is transferred onto the large insulating substrate.
摘要翻译：本发明提供了一种半导体衬底，其包括单晶Si衬底，其包括具有沟道区，源极区和漏极区的有源层，所述单晶Si衬底包括不包含阱的器件结构的至少一部分结构或通道停止区域; 形成在单晶Si衬底上的栅极绝缘膜; 形成在栅极绝缘膜上的栅电极; LOCOS氧化物膜的厚度大于栅极绝缘膜的厚度，LOCOS氧化物膜通过围绕有源层而形成在单晶Si衬底上; 以及形成在栅电极和LOCOS氧化物膜上的绝缘膜。因此，通过在大的绝缘基板上形成非单晶Si半导体元件和单晶Si半导体元件来制造具有高性能的集成系统的半导体器件，简化了制造单晶硅的工艺。此外，上述结构提供半导体衬底及其制造方法，当将单晶硅半导体元件转印到大绝缘衬底上时，确保了微单晶Si半导体元件的器件隔离而没有高精度光刻。

44. 发明授权

US07425475B2 Method for fabricating semiconductor device and semiconductor device 有权
标题翻译：制造半导体器件和半导体器件的方法
公开(公告)号：US07425475B2
公开(公告)日：2008-09-16
申请号：US11199166
申请日：2005-08-09
申请人： Yasumori Fukushima , Masao Moriguchi , Yutaka Takafuji
发明人： Yasumori Fukushima , Masao Moriguchi , Yutaka Takafuji
IPC分类号： H01L21/00
CPC分类号： H01L21/84 , H01L21/32 , H01L21/76254 , H01L27/1203 , H01L29/78654
摘要： A method for fabricating a semiconductor device according to the present invention is a method for fabricating a semiconductor device including a substrate layer including a plurality of first regions each having an active region and a plurality of second regions each being provided between adjacent ones of the first region. The fabrication method includes an isolation insulation film formation step of forming an isolation insulation film in each of the second regions so that a surface of the isolation insulation film becomes at the same height as that of a surface of a gate oxide film covering the active region, a peeling layer formation step of forming a peeling layer by ion-implanting hydrogen into the substrate layer after the isolation insulation film formation step, and a separation step of separating part of the substrate layer along the peeling layer.
摘要翻译：根据本发明的制造半导体器件的方法是一种半导体器件的制造方法，该半导体器件包括：衬底层，该衬底层包括多个第一区域，每个第一区域具有有源区域和多个第二区域，地区。制造方法包括隔离绝缘膜形成步骤，在每个第二区域中形成隔离绝缘膜，使得隔离绝缘膜的表面变得与覆盖有源区域的栅极氧化物膜的表面相同的高度剥离层形成步骤，在隔离绝缘膜形成步骤之后，通过将氢离子注入到衬底层中形成剥离层，以及分离步骤，用于沿剥离层分离衬底层的一部分。

45. 发明申请

US20060043485A1 Method for fabricating semiconductor device and semiconductor device 有权
标题翻译：制造半导体器件和半导体器件的方法
公开(公告)号：US20060043485A1
公开(公告)日：2006-03-02
申请号：US11199166
申请日：2005-08-09
申请人： Yasumori Fukushima , Masao Moriguchi , Yutaka Takafuji
发明人： Yasumori Fukushima , Masao Moriguchi , Yutaka Takafuji
IPC分类号： H01L21/84 , H01L27/12 , H01L21/30
CPC分类号： H01L21/84 , H01L21/32 , H01L21/76254 , H01L27/1203 , H01L29/78654
摘要： A method for fabricating a semiconductor device according to the present invention is a method for fabricating a semiconductor device including a substrate layer including a plurality of first regions each having an active region and a plurality of second regions each being provided between adjacent ones of the first region. The fabrication method includes an isolation insulation film formation step of forming an isolation insulation film in each of the second regions so that a surface of the isolation insulation film becomes at the same height as that of a surface of a gate oxide film covering the active region, a peeling layer formation step of forming a peeling layer by ion-implanting hydrogen into the substrate layer after the isolation insulation film formation step, and a separation step of separating part of the substrate layer along the peeling layer.
摘要翻译：根据本发明的制造半导体器件的方法是一种半导体器件的制造方法，该半导体器件包括：衬底层，该衬底层包括多个第一区域，每个第一区域具有有源区域和多个第二区域，地区。制造方法包括隔离绝缘膜形成步骤，在每个第二区域中形成隔离绝缘膜，使得隔离绝缘膜的表面变得与覆盖有源区域的栅极氧化物膜的表面相同的高度剥离层形成步骤，在隔离绝缘膜形成步骤之后，通过将氢离子注入到衬底层中形成剥离层，以及分离步骤，用于沿剥离层分离衬底层的一部分。

46. 发明授权

US08563406B2 Semiconductor substrate, semiconductor device, and manufacturing methods for them 有权
公开(公告)号：US08563406B2
公开(公告)日：2013-10-22
申请号：US12416240
申请日：2009-04-01
申请人： Yutaka Takafuji , Yasumori Fukushima , Masao Moriguchi
发明人： Yutaka Takafuji , Yasumori Fukushima , Masao Moriguchi
IPC分类号： H01L21/322
CPC分类号： H01L27/1266 , H01L21/76202 , H01L21/76254 , H01L27/1203 , H01L27/1214 , H01L29/78603 , H01L29/78609
摘要： The present invention provides a semiconductor substrate, which comprises a singlecrystalline Si substrate which includes an active layer having a channel region, a source region, and a drain region, the singlecrystalline Si substrate including at least a part of a device structure not containing a well-structure or a channel stop region; a gate insulating film formed on the singlecrystalline Si substrate; a gate electrode formed on the gate insulating film; a LOCOS oxide film whose thickness is more than a thickness of the gate insulating film, the LOCOS oxide film being formed on the singlecrystalline Si substrate by surrounding the active layer; and an insulating film formed over the gate electrode and the LOCOS oxide film. On this account, on fabricating the semiconductor device having a high-performance integration system by forming the non-singlecrystalline Si semiconductor element and the singlecrystalline Si semiconductor element on the large insulating substrate, the process for making the singlecrystalline Si is simplified. Further, the foregoing arrangement provides a semiconductor substrate and a fabrication method thereof, which ensures device isolation of the minute singlecrystalline Si semiconductor element without highly-accurate photolithography, when the singlecrystalline Si semiconductor element is transferred onto the large insulating substrate.

47. 发明授权

US07829400B2 Semiconductor device fabrication method and semiconductor device 有权
标题翻译：半导体器件制造方法和半导体器件
公开(公告)号：US07829400B2
公开(公告)日：2010-11-09
申请号：US11792487
申请日：2005-11-15
申请人： Yasumori Fukushima , Yutaka Takafuji , Masao Moriguchi
发明人： Yasumori Fukushima , Yutaka Takafuji , Masao Moriguchi
IPC分类号： H01L21/8234
CPC分类号： H01L27/1203 , H01L21/02164 , H01L21/02271 , H01L21/265 , H01L21/31662 , H01L21/32 , H01L21/76254 , H01L21/84 , H01L29/7833
摘要： In fabricating a semiconductor device, an element forming surface formation step of forming a plurality of element forming surfaces of different heights on a semiconductor layer to have different levels, a semiconductor element formation step of forming a plurality of semiconductor elements and, one in each of a corresponding number of regions of the semiconductor layer, each region including an associated one of the plurality of element forming surfaces, a level-difference compensation insulating film formation step of forming a level-difference compensation insulating film on the semiconductor layer to cover the semiconductor elements and have a surface with different levels along the element forming surfaces, a release layer formation step of forming a release layer in the semiconductor layer by ion-implanting a peeling material through the level-difference compensation insulating film into the semiconductor layer, and a separation step of separating part of the semiconductor layer along the release layer are performed.
摘要翻译：在制造半导体器件时，在半导体层上形成具有不同高度的多个元件形成表面以形成不同电平的元件形成表面形成步骤，形成多个半导体元件的半导体元件形成步骤和所述半导体层的相应数量的区域，每个区域包括所述多个元件形成表面中的相关联的一个元件形成表面;电平差补偿绝缘膜形成步骤，在所述半导体层上形成电平差补偿绝缘膜以覆盖所述半导体元件，并且具有沿着元件形成表面具有不同水平的表面;剥离层形成步骤，通过将剥离材料通过电位差补偿绝缘膜离子注入到半导体层中而在半导体层中形成剥离层，以及分离半导体层的一部分的分离步骤沿着释放层进行。

48. 发明申请

US20080318390A1 Method for fabricating semiconductor device and semiconductor device 有权
公开(公告)号：US20080318390A1
公开(公告)日：2008-12-25
申请号：US12222598
申请日：2008-08-12
申请人： Yasumori Fukushima , Masao Moriguchi , Yutaka Takafuji
发明人： Yasumori Fukushima , Masao Moriguchi , Yutaka Takafuji
IPC分类号： H01L21/76
CPC分类号： H01L21/84 , H01L21/32 , H01L21/76254 , H01L27/1203 , H01L29/78654
摘要： A method for fabricating a semiconductor device according to the present invention is a method for fabricating a semiconductor device including a substrate layer including a plurality of first regions each having an active region and a plurality of second regions each being provided between adjacent ones of the first region. The fabrication method includes an isolation insulation film formation step of forming an isolation insulation film in each of the second regions so that a surface of the isolation insulation film becomes at the same height as that of a surface of a gate oxide film covering the active region, a peeling layer formation step of forming a peeling layer by ion-implanting hydrogen into the substrate layer after the isolation insulation film formation step, and a separation step of separating part of the substrate layer along the peeling layer.

49. 发明申请

US20050282019A1 Method for manufacturing semiconductor substrate and semiconductor substrate 有权
标题翻译：半导体衬底和半导体衬底的制造方法
公开(公告)号：US20050282019A1
公开(公告)日：2005-12-22
申请号：US11147359
申请日：2005-06-08
申请人： Yasumori Fukushima , Yutaka Takafuji
发明人： Yasumori Fukushima , Yutaka Takafuji
IPC分类号： B32B9/04 , H01L21/68
CPC分类号： H01L21/6835 , H01L24/97 , H01L2221/68363 , H01L2924/01005 , H01L2924/01006 , H01L2924/0101 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01033 , H01L2924/01054 , H01L2924/01057 , H01L2924/01073 , H01L2924/01074 , H01L2924/04953 , H01L2924/12042 , H01L2924/1301 , H01L2924/1305 , H01L2924/13091 , H01L2924/30105 , H01L2924/00
摘要： A method for manufacturing a semiconductor substrate comprises the steps of: forming a gate oxide film as an insulating layer on the surface of a semiconductor substrate; implanting boron ions for inhibiting the migration of a peeling substance in the semiconductor substrate to form an anti-diffusion layer in the semiconductor substrate; activating boron in the anti-diffusion layer by heat treatment; implanting hydrogen ions into the semiconductor substrate to form a peel layer in part of the semiconductor substrate at a side of the anti-diffusion layer opposite to the gate oxide film; bonding a glass substrate to the surface of the semiconductor substrate where the gate oxide film has been formed; and heat-treating the semiconductor substrate to separate part of the semiconductor substrate along the peel layer.
摘要翻译：一种制造半导体衬底的方法包括以下步骤：在半导体衬底的表面上形成作为绝缘层的栅极氧化膜; 注入硼离子以抑制半导体衬底中的剥离物质的迁移，以在半导体衬底中形成抗扩散层; 通过热处理在反扩散层中活化硼; 将氢离子注入到半导体衬底中以在与半导体衬底相反的一侧的反扩散层的一部分半导体衬底中形成剥离层; 将玻璃基板结合到已经形成栅极氧化膜的半导体基板的表面上; 并且对半导体衬底进行热处理以沿着剥离层分离半导体衬底的一部分。

50. 发明申请

US20070066035A1 Cleaved silicon substrate active device 有权
标题翻译：切割硅衬底有源器件
公开(公告)号：US20070066035A1
公开(公告)日：2007-03-22
申请号：US11600699
申请日：2006-11-16
申请人： Steven Droes , Yutaka Takafuji
发明人： Steven Droes , Yutaka Takafuji
IPC分类号： H01L21/322
CPC分类号： H01L21/3221 , H01L21/26506 , H01L21/76254 , H01L27/1266 , H01L29/66772 , H01L29/78603
摘要： A hydrogen (H) exfoliation gettering method is provided for attaching fabricated circuits to receiver substrates. The method comprises: providing a Si substrate; forming a Si active layer overlying the substrate with circuit source/drain (S/D) regions; implanting a p-dopant into the S/D regions; forming gettering regions underling the S/D regions; implanting H in the Si substrate, forming a cleaving plane (peak concentration (Rp) H layer) in the Si substrate about as deep as the gettering regions; bonding the circuit to a receiver substrate; cleaving the Si substrate along the cleaving plane; and binding the implanted H underlying the S/D regions with p-dopant in the gettering regions, as a result of post-bond annealing.
摘要翻译：提供氢（H）剥离吸气方法，用于将制造的电路连接到接收器基板。该方法包括：提供Si衬底; 在电路源极/漏极（S / D）区域上形成覆盖衬底的Si有源层; 将P掺杂剂注入到S / D区域中; 形成S / D区域下游的吸气区域; 在Si衬底中注入H，在Si衬底中形成与吸杂区一样深的切割面（峰值浓度（Rp）H层）; 将电路接合到接收器基板; 沿着切割面切割Si衬底; 并且作为后键合退火的结果，在吸杂区域中将S / D区域下面的注入的H与p掺杂剂结合。

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