专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

41. 发明授权

US06933204B2 Method for improved alignment of magnetic tunnel junction elements 有权
标题翻译：改善磁性隧道结元件对准的方法
公开(公告)号：US06933204B2
公开(公告)日：2005-08-23
申请号：US10605604
申请日：2003-10-13
申请人： Chandrasekhar Sarma , Sivananda K. Kanakasabapathy , Ihar Kasko , Greg Costrini , John P. Hummel , Michael C. Gaidis
发明人： Chandrasekhar Sarma , Sivananda K. Kanakasabapathy , Ihar Kasko , Greg Costrini , John P. Hummel , Michael C. Gaidis
IPC分类号： G03F9/00 , H01L21/76 , H01L23/544 , H01L27/22
CPC分类号： H01L27/222 , G03F9/7076 , G03F9/708 , G03F9/7084 , H01L23/544 , H01L2223/54453 , H01L2924/0002 , H01L2924/00
摘要： A method for aligning an opaque, active device in a semiconductor structure includes forming an opaque layer over an optically transparent layer formed on a lower metallization level, the lower metallization level including one or more alignment marks formed therein. A portion of the opaque layer is patterned and opened corresponding to the location of the one or more alignment marks in the lower metallization level so as to render the one or more alignment marks optically visible. The opaque layer is then patterned with respect to the lower metallization level, using the optically visible one or more alignment marks.
摘要翻译：用于对准半导体结构中的不透明有源器件的方法包括在形成在下金属化层上的光学透明层上形成不透明层，所述下金属化层包括其中形成的一个或多个对准标记。对应于下部金属化水平中的一个或多个对准标记的位置，对不透明层的一部分进行图案化和打开，以便使一个或多个对准标记光学可见。然后使用光学可见的一个或多个对准标记，相对于较低的金属化水平对不透明层进行图案化。

42. 发明授权

US06812141B1 Recessed metal lines for protective enclosure in integrated circuits 失效
标题翻译：集成电路中用于保护外壳的嵌入式金属线
公开(公告)号：US06812141B1
公开(公告)日：2004-11-02
申请号：US10610609
申请日：2003-07-01
申请人： Michael C. Gaidis , Joachim Nuetzel , Walter Glashauser , Eugene O'Sullivan , Gregory Costrini , Stephen L. Brown , Frank Findeis , Chanro Park
发明人： Michael C. Gaidis , Joachim Nuetzel , Walter Glashauser , Eugene O'Sullivan , Gregory Costrini , Stephen L. Brown , Frank Findeis , Chanro Park
IPC分类号： H01L214763
CPC分类号： H01L21/76843 , H01L21/76831 , H01L21/76834 , H01L21/76849 , H01L21/76897 , H01L23/5226 , H01L23/53238 , H01L27/222 , H01L2924/0002 , H01L2924/00
摘要： Encapsulating areas of metallization in a liner material, such as Tantalum, Tantalum Nitride, Silicon Carbide allows aggressive or harsh processing steps to be used. These aggresive processing steps offer the possibility of fabricating new device architectures. In addition, by encapsulating the areas of metallization, metal ion migration and electromigration can be prevented. Further, the encapsulated areas of metallization can serve as a self-aligning etch mask. Thus, vias etched between adjacent areas of metallization allow the area of the substrate allocated to the via to be significantly reduced without increasing the possibility of electrical shorts to the adjacent areas of metallization.
摘要翻译：衬垫材料如钽，氮化钽，碳化硅中的金属化的封装区域允许使用侵蚀性或苛刻的加工步骤。这些突出的处理步骤提供了制造新器件架构的可能性。此外，通过封装金属化区域，可以防止金属离子迁移和电迁移。此外，金属化的封装区域可以用作自对准蚀刻掩模。因此，蚀刻在相邻的金属化区域之间的通孔允许分配给通孔的衬底的面积被显着地减小，而不增加相邻金属化区域的电短路的可能性。

43. 发明申请

US20140038309A1 MAGNETIC RANDOM ACCESS MEMORY WITH SYNTHETIC ANTIFERROMAGNETIC STORAGE LAYERS AND NON-PINNED REFERENCE LAYERS 有权
标题翻译：具有合成抗真菌储存层和非引导参考层的磁性随机存取存储器
公开(公告)号：US20140038309A1
公开(公告)日：2014-02-06
申请号：US13566132
申请日：2012-08-03
申请人： David W. Abraham , Michael C. Gaidis , Janusz J. Nowak , Daniel C. Worledge
发明人： David W. Abraham , Michael C. Gaidis , Janusz J. Nowak , Daniel C. Worledge
IPC分类号： H01L43/10
CPC分类号： G11C11/161 , H01L43/08 , H01L43/12 , Y10T428/31953 , Y10T428/32 , Y10T428/325
摘要： A method for fabricating a synthetic antiferromagnetic device, includes depositing a magnesium oxide spacer layer on a reference layer having a first and second ruthenium layer, depositing a cobalt iron boron layer on the magnesium oxide spacer layer; and depositing a third ruthenium layer on the cobalt iron boron layer, the third ruthenium layer having a thickness of approximately 0-18 angstroms.
摘要翻译：一种制造合成反铁磁装置的方法，包括在具有第一和第二钌层的参考层上沉积氧化镁间隔层，在氧化镁间隔层上沉积钴铁硼层; 以及在所述钴铁硼层上沉积第三钌层，所述第三钌层的厚度约为0-18埃。

44. 发明申请

US20140037991A1 MAGNETIC RANDOM ACCESS MEMORY WITH SYNTHETIC ANTIFERROMAGNETIC STORAGE LAYERS 审中-公开
标题翻译：具有合成抗真菌储存层的磁性随机存取存储器
公开(公告)号：US20140037991A1
公开(公告)日：2014-02-06
申请号：US13562873
申请日：2012-07-31
申请人： David W. Abraham , Michael C. Gaidis
发明人： David W. Abraham , Michael C. Gaidis
IPC分类号： G11B5/66
CPC分类号： G11C11/161 , H01L43/08 , H01L43/12 , Y10T29/49021 , Y10T29/49043 , Y10T29/49044 , Y10T29/49048 , Y10T29/49052
摘要： A synthetic antiferromagnetic device includes a first tantalum layer, a reference layer disposed on the first tantalum layer and including a first cobalt iron boron layer, a second cobalt iron boron layer disposed on the first cobalt iron boron layer, a third cobalt iron boron layer and a second tantalum layer disposed between the second and third cobalt iron boron layers, a magnesium oxide spacer layer disposed on the reference layer and a cap layer disposed on the magnesium oxide spacer layer.
摘要翻译：合成反铁磁装置包括第一钽层，设置在第一钽层上的参考层，并且包括第一钴铁硼层，设置在第一钴铁硼层上的第二钴铁硼层，第三钴铁硼层和设置在第二和第三钴铁硼层之间的第二钽层，设置在参考层上的氧化镁间隔层和设置在氧化镁隔离层上的盖层。

45. 发明申请

US20140037990A1 MAGNETIC RANDOM ACCESS MEMORY WITH SYNTHETIC ANTIFERROMAGNETIC STORAGE LAYERS AND NON-PINNED REFERENCE LAYERS 有权
标题翻译：具有合成抗真菌储存层和非引导参考层的磁性随机存取存储器
公开(公告)号：US20140037990A1
公开(公告)日：2014-02-06
申请号：US13562868
申请日：2012-07-31
申请人： David W. Abraham , Michael C. Gaidis , Janusz J. Nowak , Daniel C. Worledge
发明人： David W. Abraham , Michael C. Gaidis , Janusz J. Nowak , Daniel C. Worledge
IPC分类号： G11B5/66
CPC分类号： G11C11/161 , H01L43/08 , H01L43/12 , Y10T428/31953 , Y10T428/32 , Y10T428/325
摘要： A synthetic antiferromagnetic device includes a reference layer having a first and second ruthenium layer, a magnesium oxide spacer layer disposed on the reference layer, a cobalt iron boron layer disposed on the magnesium oxide spacer layer and a third ruthenium layer disposed on the cobalt iron boron layer, the third ruthenium layer having a thickness of approximately 0 angstroms to 18 angstroms.
摘要翻译：合成反铁磁装置包括具有第一和第二钌层的参考层，设置在参考层上的氧化镁间隔层，设置在氧化镁间隔层上的钴铁硼层和设置在钴铁硼上的第三钌层第三钌层的厚度为约0埃至18埃。

46. 发明授权

US08324734B2 Tunnel junction via 有权
标题翻译：隧道交界处
公开(公告)号：US08324734B2
公开(公告)日：2012-12-04
申请号：US13364494
申请日：2012-02-02
申请人： Michael C. Gaidis
发明人： Michael C. Gaidis
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/5252 , H01L21/76886 , H01L27/18 , H01L27/222 , H01L39/2493 , H01L43/12 , H01L2924/0002 , Y10S438/979 , H01L2924/00
摘要： A memory device comprising a plurality of tunnel junctions (TJs) includes a bottom wiring layer; a top wiring layer; a plurality of TJs contacting the bottom wiring layer and the top wiring layer; and a plurality of tunnel junction vias (TJVs) contacting the bottom wiring layer and the top wiring layer, wherein the plurality of TJVs each have a lower resistance the each of the plurality of TJs, wherein the plurality of TJVs comprise at least one concave surface, and wherein the at least one concave surface of the plurality of TJVs is configured to trap etched material during formation of the TJVs so as to reduce the resistance of the plurality of TJVs.
摘要翻译：包括多个隧道结（TJ）的存储器件包括底部布线层; 顶部布线层; 与底部布线层和顶部布线层接触的多个TJ; 以及与所述底部布线层和所述顶部布线层接触的多个隧道结通孔（TJV），其中所述多个TJV各自具有每个所述多个TJ的较低电阻，其中所述多个TJV包括至少一个凹面并且其中所述多个TJV的所述至少一个凹表面被配置为在形成所述TJV期间捕获蚀刻的材料，以便降低所述多个TJV的电阻。

47. 发明申请

US20120141748A1 Template-Registered DiBlock Copolymer Mask for MRAM Device Formation 有权
标题翻译：用于MRAM器件形成的模板注册DiBlock共聚物掩模
公开(公告)号：US20120141748A1
公开(公告)日：2012-06-07
申请号：US13396998
申请日：2012-02-15
申请人： Michael C. Gaidis
发明人： Michael C. Gaidis
IPC分类号： B32B3/00
CPC分类号： H01L27/222 , B82Y10/00 , H01L43/12 , Y10S438/947 , Y10S977/888
摘要： A device comprising a diblock copolymer mask for fabricating a magnetoresistive random access memory (MRAM) includes a magnetic layer; a mask formed on the magnetic layer; a template formed on the mask; and the diblock copolymer mask, the diblock copolymer mask comprising a first plurality of uniform shapes formed on and registered to the template.
摘要翻译：包括用于制造磁阻随机存取存储器（MRAM）的二嵌段共聚物掩模的器件包括磁性层; 形成在磁性层上的掩模; 掩模上形成的模板; 和二嵌段共聚物掩模，二嵌段共聚物掩模包含形成在模板上并登记到模板上的第一多个均匀形状。

48. 发明授权

US08009453B2 High density planar magnetic domain wall memory apparatus 有权
标题翻译：高密度平面磁畴壁存储装置
公开(公告)号：US08009453B2
公开(公告)日：2011-08-30
申请号：US12136089
申请日：2008-06-10
申请人： Michael C. Gaidis , Lawrence A. Clevenger , Timothy J. Dalton , John K. DeBrosse , Louis L. C. Hsu , Carl Radens , Keith Kwong-Hon Wong , Chih-Chao Yang
发明人： Michael C. Gaidis , Lawrence A. Clevenger , Timothy J. Dalton , John K. DeBrosse , Louis L. C. Hsu , Carl Radens , Keith Kwong-Hon Wong , Chih-Chao Yang
IPC分类号： G11C19/08 , G11C19/38
CPC分类号： G11C19/0841 , B82Y10/00 , G11C5/02 , G11C11/161 , G11C11/1675 , Y10T29/53165
摘要： A magnetic domain wall memory apparatus with write/read capability includes a plurality of coplanar shift register structures each comprising an elongated track formed from a ferromagnetic material having a plurality of magnetic domains therein, the shift register structures further having a plurality of discontinuities therein to facilitate domain wall location; a magnetic read element associated with each of the shift register structures; and a magnetic write element associated with each of the shift register structures, the magnetic write element further comprising a write wire having a constriction therein, the constriction located at a point corresponding to the location of the plurality of discontinuities in the associated shift register structure.
摘要翻译：具有写入/读取功能的磁畴壁存储装置包括多个共面移位寄存器结构，每个包括由其中具有多个磁畴的铁磁材料形成的细长轨道，移位寄存器结构还具有多个不连续性，以便于域墙位置; 与每个移位寄存器结构相关联的磁读取元件; 以及与所述移位寄存器结构中的每一个相关联的磁写元件，所述磁写入元件还包括其中具有收缩部的写入线，所述收缩部位于与相关联的移位寄存器结构中的所述多个不连续点的位置对应的点处。

49. 发明申请

US20110163455A1 Tunnel Junction Via 有权
标题翻译：隧道交界处
公开(公告)号：US20110163455A1
公开(公告)日：2011-07-07
申请号：US12683080
申请日：2010-01-06
申请人： Michael C. Gaidis
发明人： Michael C. Gaidis
IPC分类号： H01L23/52 , H01L21/44
CPC分类号： H01L23/5252 , H01L21/76886 , H01L27/18 , H01L27/222 , H01L39/2493 , H01L43/12 , H01L2924/0002 , Y10S438/979 , H01L2924/00
摘要： A method for forming a tunnel junction (TJ) circuit, the method includes forming a bottom wiring layer; forming a plurality of TJs contacting the bottom wiring layer; forming a plurality of tunnel junction vias (TJVs) simultaneously with the formation of the plurality of TJs, the TJVs contacting the bottom wiring layer; and forming a top wiring layer contacting the plurality of TJs and the plurality of TJVs. A circuit comprising a plurality of tunnel junctions (TJs) includes a bottom wiring layer contacting the plurality of TJs, the bottom wiring layer further contacting a plurality of tunnel junction vias (TJVs), wherein the plurality of TJs and the plurality of TJVs comprise the same material; and a top wiring layer contacting the plurality of TJs and the plurality of TJVs.
摘要翻译：一种形成隧道结（TJ）电路的方法，所述方法包括形成底部布线层; 形成与底部布线层接触的多个TJ; 与形成多个TJ同时形成多个隧道结通孔（TJV），TJV接触底部布线层; 以及形成与所述多个TJ和所述多个TJV接触的顶部布线层。包括多个隧道结（TJ）的电路包括与多个TJ接触的底部布线层，底部布线层还与多个隧道结通孔（TJV）接触，其中多个TJ和多个TJV包括相同材料; 以及与多个TJ和多个TJV接触的顶部布线层。

50. 发明申请

US20090302405A1 METHOD FOR FORMING SLOT VIA BITLINE FOR MRAM DEVICES 有权
标题翻译：用于通过MRAM器件的位线形成槽的方法
公开(公告)号：US20090302405A1
公开(公告)日：2009-12-10
申请号：US12539942
申请日：2009-08-12
申请人： Michael C. Gaidis , Carl Radens , Lawrence A. Clevenger , Timothy J. Dalton , Louis L. C. Hsu , Keith Kwong Hon Wong , Chih-Chao Yang
发明人： Michael C. Gaidis , Carl Radens , Lawrence A. Clevenger , Timothy J. Dalton , Louis L. C. Hsu , Keith Kwong Hon Wong , Chih-Chao Yang
IPC分类号： H01L29/82 , H01L21/00
CPC分类号： B82Y10/00 , H01L27/222 , H01L43/12
摘要： A magnetic random access memory (MRAM) device includes a magnetic tunnel junction (MTJ) stack formed over a lower wiring level, a hardmask formed on the MTJ stack, and an upper wiring level formed over the hardmask. The upper wiring level includes a slot via bitline formed therein, the slot via bitline in contact with the hardmask and in contact with an etch stop layer partially surrounding sidewalls of the hardmask.
摘要翻译：磁性随机存取存储器（MRAM）器件包括形成在下布线层上的磁隧道结（MTJ）堆叠，形成在MTJ堆叠上的硬掩模和形成在硬掩模上的上布线层。上布线层包括经由位于其中的位线的槽，槽经由与硬掩模接触的位线并与部分地围绕硬掩模的侧壁的蚀刻停止层接触。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式