专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

41. 发明授权

US08064277B2 Control circuit of read operation for semiconductor memory apparatus 有权
标题翻译：半导体存储装置读操作的控制电路
公开(公告)号：US08064277B2
公开(公告)日：2011-11-22
申请号：US12493647
申请日：2009-06-29
申请人： Kwi Dong Kim
发明人： Kwi Dong Kim
IPC分类号： G11C7/00
CPC分类号： G11C7/1039 , G11C7/1051 , G11C7/1066 , G11C7/1069 , G11C7/1078 , G11C7/1096 , G11C7/22 , G11C7/222
摘要： A control circuit for a read operation of a SERDES (SERializer and DESeriallizer) type semiconductor memory apparatus is disclosed that includes a first delay unit that is configured to generate and output a first delay signal to a first global input/output line driver by receiving a sensing-enable signal ‘IOSTB’, and to generate and output a second delay signal to a second global input/output line driver by receiving the sensing-enable signal. The first delay unit generates the second delay signal by delaying the sensing-enable signal in synchronization with a clock. The semiconductor memory apparatus also includes a second delay unit configured to generate a pipe latch control signal in response to the first delay signal and the second delay signal.
摘要翻译：公开了一种用于SERDES（串行器和解调器）型半导体存储装置的读取操作的控制电路，其包括第一延迟单元，其被配置为通过接收第一延迟单元生成第一延迟信号并将其输出到第一全局输入/ 感测使能信号“IOSTB”，并且通过接收感测使能信号来产生并将第二延迟信号输出到第二全局输入/输出线路驱动器。第一延迟单元通过与时钟同步地延迟感测使能信号来产生第二延迟信号。半导体存储装置还包括第二延迟单元，其被配置为响应于第一延迟信号和第二延迟信号产生管锁存控制信号。

42. 发明授权

US07978553B2 Apparatus for controlling I/O strobe signal in semiconductor memory apparatus 失效
标题翻译：用于在半导体存储装置中控制I / O选通信号的装置
公开(公告)号：US07978553B2
公开(公告)日：2011-07-12
申请号：US12493354
申请日：2009-06-29
申请人： Kwi Dong Kim
发明人： Kwi Dong Kim
IPC分类号： G11C7/02
CPC分类号： G11C7/08 , G11C7/1051 , G11C7/1066 , G11C7/1069 , G11C7/18
摘要： A sensing enable signal control circuit determines a driving timing of an I/O sense amplifier based on a read-out result of data, which is stored in a dummy cell of a semiconductor memory apparatus. The sensing enable signal control circuit in a semiconductor memory apparatus includes a detection code generating unit configured to output a detection code according to a voltage level of dummy cell data, which are read out from a dummy cell through at least one read operation, in response to a column select enable signal, and a multiplexer configured to receive the detection code and a default code and output a delay code to delay a sensing enable signal.
摘要翻译：感测使能信号控制电路基于存储在半导体存储装置的虚拟单元中的数据的读出结果来确定I / O读出放大器的驱动定时。半导体存储装置中的感测使能信号控制电路包括：检测码生成单元，被配置为根据虚拟小区数据的电压电平输出检测码，所述虚拟小区数据通过至少一个读取操作从虚拟小区读出;响应以及多路复用器，被配置为接收检测码和默认码，并输出延迟码以延迟感测使能信号。

43. 发明授权

US07663403B2 High-speed asynchronous digital signal level conversion circuit 失效
标题翻译：高速异步数字信号电平转换电路
公开(公告)号：US07663403B2
公开(公告)日：2010-02-16
申请号：US11943031
申请日：2007-11-20
申请人： Min Hyung Cho , Kwi Dong Kim , Chong Ki Kwon
发明人： Min Hyung Cho , Kwi Dong Kim , Chong Ki Kwon
IPC分类号： H03K19/0175
CPC分类号： H03K19/018528 , H03K19/0948
摘要： Provided is a high-speed asynchronous digital signal level conversion circuit converting an input signal of a first voltage level into a signal of a second voltage level. The conversion circuit is able to operate at high speed by connecting first and second nodes, at which the input signal of the first voltage level is converted to the signal of the second voltage level, to a second power source voltage of the second voltage level for fast voltage level conversion when the voltage level of the input signal is changed.
摘要翻译：提供了将第一电压电平的输入信号转换为第二电压电平的信号的高速异步数字信号电平转换电路。转换电路能够通过将第一和第二节点（第一电压电平的输入信号被转换为第二电压电平的信号）连接到第二电压电平的第二电源电压，当输入信号的电压电平改变时，进行快速电压电平转换。

44. 发明授权

US07576961B2 Electrostatic discharge protection circuit using triple welled silicon controlled rectifier 有权
标题翻译：静电放电保护电路采用三芯硅控整流器
公开(公告)号：US07576961B2
公开(公告)日：2009-08-18
申请号：US12018317
申请日：2008-01-23
申请人： Kwi Dong Kim , Chong Ki Kwon , Jong Dae Kim
发明人： Kwi Dong Kim , Chong Ki Kwon , Jong Dae Kim
IPC分类号： H02H9/00 , H01L23/62
CPC分类号： H01L29/7436 , H01L29/749 , H01L29/87 , H01L2924/0002 , H01L2924/00
摘要： Provided is an electrostatic discharge (ESD) protection circuit using a silicon controlled rectifier (SCR), which is applied to a semiconductor integrated circuit (IC). A semiconductor substrate has a triple well structure such that a bias is applied to a p-well corresponding to a substrate of a ggNMOS device. Thus, a trigger voltage of the SCR is reduced. In addition, two discharge paths are formed using two SCRs including PNP and NPN bipolar transistors. As a result, the ESD protection circuit can have greater discharge capacity.
摘要翻译：提供了一种应用于半导体集成电路（IC）的使用可控硅整流器（SCR）的静电放电（ESD）保护电路。半导体衬底具有三重阱结构，使得偏置被施加到对应于ggNMOS器件的衬底的p阱。因此，SCR的触发电压降低。此外，使用包括PNP和NPN双极晶体管的两个SCR形成两个放电路径。因此，ESD保护电路可以具有更大的放电容量。

45. 发明授权

US07545301B2 Multi-bit delta-sigma modulator 有权
标题翻译：多位delta-Σ调制器
公开(公告)号：US07545301B2
公开(公告)日：2009-06-09
申请号：US11950481
申请日：2007-12-05
申请人： Yi Gyeong Kim , Kwi Dong Kim , Chong Ki Kwon , Jong Dae Kim
发明人： Yi Gyeong Kim , Kwi Dong Kim , Chong Ki Kwon , Jong Dae Kim
IPC分类号： H03M3/00
CPC分类号： H03M3/374 , H03M3/338 , H03M3/424 , H03M3/45 , H03M3/452 , H03M3/454
摘要： A delta-sigma modulator having a first integrator for integrating an input signal; an analog-to-digital converter for converting the integrated signal into a digital signal; a delay circuit for delaying an output signal of the analog-to-digital converter; and a differential delay circuit for differentially delaying the output signal of the analog-to-digital converter. More particularly, the delta-sigma modulator has low distortion characteristics suitable for multi-bit fast operation, wherein a feedback signal is delayed by one clock period through the delay circuit and the differential delay circuit.
摘要翻译：一种Δ-Σ调制器，具有用于积分输入信号的第一积分器; 用于将积分信号转换为数字信号的模拟 - 数字转换器; 延迟电路，用于延迟模数转换器的输出信号; 以及用于差分地延迟模数转换器的输出信号的差分延迟电路。更具体地，Δ-Σ调制器具有适合于多位快速操作的低失真特性，其中通过延迟电路和差分延迟电路将反馈信号延迟一个时钟周期。

46. 发明授权

US07342281B2 Electrostatic discharge protection circuit using triple welled silicon controlled rectifier 有权
标题翻译：静电放电保护电路采用三芯硅控整流器
公开(公告)号：US07342281B2
公开(公告)日：2008-03-11
申请号：US11294255
申请日：2005-12-05
申请人： Kwi Dong Kim , Chong Ki Kwon , Jong Dae Kim
发明人： Kwi Dong Kim , Chong Ki Kwon , Jong Dae Kim
IPC分类号： H01L23/62
CPC分类号： H01L29/7436 , H01L29/749 , H01L29/87 , H01L2924/0002 , H01L2924/00
摘要： Provided is an electrostatic discharge (ESD) protection circuit using a silicon controlled rectifier (SCR), which is applied to a semiconductor integrated circuit (IC). A semiconductor substrate has a triple well structure such that a bias is applied to a p-well corresponding to a substrate of a ggNMOS device. Thus, a trigger voltage of the SCR is reduced. In addition, two discharge paths are formed using two SCRs including PNP and NPN bipolar transistors. As a result, the ESD protection circuit can have greater discharge capacity.
摘要翻译：提供了一种应用于半导体集成电路（IC）的使用可控硅整流器（SCR）的静电放电（ESD）保护电路。半导体衬底具有三重阱结构，使得偏置被施加到对应于ggNMOS器件的衬底的p阱。因此，SCR的触发电压降低。此外，使用包括PNP和NPN双极晶体管的两个SCR形成两个放电路径。因此，ESD保护电路可以具有更大的放电容量。

47. 发明授权

US07105819B2 Infrared ray sensor using silicon oxide film as infrared ray absorption layer and method of fabricating the same 有权
标题翻译：使用氧化硅膜作为红外线吸收层的红外线传感器及其制造方法
公开(公告)号：US07105819B2
公开(公告)日：2006-09-12
申请号：US10788340
申请日：2004-03-01
申请人： Sang Ouk Ryu , Seong Mok Cho , Kwi Dong Kim , Byoung Gon Yu
发明人： Sang Ouk Ryu , Seong Mok Cho , Kwi Dong Kim , Byoung Gon Yu
IPC分类号： G01J5/00
CPC分类号： G01J5/02 , G01J5/023 , G01J5/08 , G01J5/0853 , G01J5/10 , G01J5/34
摘要： The present invention relates to a pyroelectric infrared ray sensor fabricated by using MEMS processes, wherein an infrared ray absorption layer disposed on the most top portion of the infrared ray sensor assembly is formed with a silicon oxide film (SiO2) to exhibit an excellent absorption efficiency with respect to the infrared wavelength band of 8 to 12 mm and function as a protective film for a sensor pixel. In addition, an infrared ray absorption layer, support arms and posts are formed in a single body to allow the sensor assembly to be robust and fabricating processes to be remarkably reduced to increase a process yield.
摘要翻译：本发明涉及通过使用MEMS工艺制造的热释电红外线传感器，其中设置在红外线传感器组件的最上部的红外线吸收层由氧化硅膜（SiO 2） >）相对于8〜12mm的红外波段具有优异的吸收效率，并且用作传感器像素的保护膜。此外，在单个体中形成红外线吸收层，支撑臂和柱，以使传感器组件牢固，并且显着减少制造工艺以增加工艺成品率。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式