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41. 发明申请

WO2011068777A3 SLOTTED CONFIGURATION FOR OPTIMIZED PLACEMENT OF MICRO-COMPONENTS USING ADHESIVE BONDING 审中-公开
标题翻译：采用胶粘剂粘接优化微型元件放置的狭缝配置
公开(公告)号：WO2011068777A3
公开(公告)日：2011-09-22
申请号：PCT/US2010058278
申请日：2010-11-30
申请人： LIGHTWIRE INC , NADEAU MARY , PATEL VIPULKUMAR , GOTHOSKAR PRAKASH , FANGMAN JOHN , FANGMAN JOHN MATTHEW , WEBSTER MARK
发明人： NADEAU MARY , PATEL VIPULKUMAR , GOTHOSKAR PRAKASH , FANGMAN JOHN , FANGMAN JOHN MATTHEW , WEBSTER MARK
IPC分类号： H01L23/48
CPC分类号： G02B7/025 , G02B6/4228 , G02B6/4239 , G02B7/003 , H01L23/345 , H01L23/544 , H01L24/29 , H01L24/32 , H01L24/83 , H01L2223/54426 , H01L2224/26175 , H01L2224/2919 , H01L2224/32225 , H01L2224/83121 , H01L2224/83143 , H01L2224/83192 , H01L2224/83234 , H01L2224/83385 , H01L2224/83862 , H01L2924/14 , Y10T428/24479 , H01L2924/0665 , H01L2924/00014 , H01L2924/00
摘要： An arrangement for improving adhesive attachment of micro-components in an assembly utilizes a plurality of parallel-disposed slots formed in the top surface of the substrate used to support the micro-components. The slots are used to control the flow and "shape" of an adhesive "dot" so as to quickly and accurately attach a micro- component to the surface of a substrate. The slots are formed (preferably, etched) in the surface of the substrate in a manner that lends itself to reproducible accuracy from one substrate to another. Other slots ("channels") may be formed in conjunction with the bonding slots so that extraneous adhesive material will flow into these channels and not spread into unwanted areas.
摘要翻译：用于改进组件中微型部件的粘附附着的布置利用在用于支撑微型部件的基板的顶部表面中形成的多个平行布置的狭槽。狭缝用于控制粘合剂“点”的流动和“形状”，以便快速且精确地将微型部件附着到基底表面。这些槽以一种使其自身具有从一个衬底到另一个衬底的可重现准确性的方式形成（优选地，蚀刻）在衬底的表面中。其他槽（“通道”）可以与结合槽一起形成，使得外来的粘合剂材料将流入这些通道并且不会散布到不需要的区域中。

42. 发明申请

WO2011112346A3 DOPANT PROFILE CONTROL FOR HIGH SPEED SILICON-BASED OPTICAL MODULATORS 审中-公开
标题翻译：用于高速硅基光学调制器的眩光配置控制
公开(公告)号：WO2011112346A3
公开(公告)日：2012-04-19
申请号：PCT/US2011025672
申请日：2011-02-22
申请人： LIGHTWIRE INC , WEBSTER MARK , PATEL VIPULKUMAR , GOTHOSKAR PRAKASH , PIEDE DAVID
发明人： WEBSTER MARK , PATEL VIPULKUMAR , GOTHOSKAR PRAKASH , PIEDE DAVID
IPC分类号： G02B6/26 , G02B6/12 , G02B26/00 , G02F1/03
CPC分类号： G02B6/12 , G02B6/26 , G02B26/00 , G02F1/025
摘要： A high speed silicon-based optical modulator with control of the dopant profiles in the body and gate regions of the device reduces the series resistance of the structure without incurring substantial optical power loss. That is, the use of increased dopant values in areas beyond the active region will allow for the series resistance to be reduced (and thus increase the modulating speed of the device) without incurring too large a penalty in signal loss. The dopant profiles within the gate and body regions are tailored to exhibit an intermediate value between the high dopant concentration in the contact areas and the low dopant concentration in the carrier integration window area.
摘要翻译：具有控制器件的主体和栅极区域中的掺杂剂分布的高速硅基光学调制器降低了结构的串联电阻而不会引起实质的光功率损耗。也就是说，在有源区域之外的区域中使用增加的掺杂剂值将允许降低串联电阻（从而增加器件的调制速度），而不会在信号损失中造成太大的惩罚。栅极和体区内的掺杂剂分布被调整为在接触区域中的高掺杂剂浓度和载流子集成窗口区域中的低掺杂剂浓度之间呈现中间值。

43. 发明申请

WO2009017589A3 OFFSET LAUNCH MODE FROM NANOTAPER WAVEGUIDE INTO MULTIMODE FIBER 审中-公开
标题翻译：偏置模式从纳米级波导转换为多模光纤
公开(公告)号：WO2009017589A3
公开(公告)日：2009-03-19
申请号：PCT/US2008008597
申请日：2008-07-15
申请人： LIGHTWIRE INC , WEBSTER MARK , GOTHOSKAR PRAKASH , PATEL VIPULKUMAR , PIEDE DAVID
发明人： WEBSTER MARK , GOTHOSKAR PRAKASH , PATEL VIPULKUMAR , PIEDE DAVID
IPC分类号： G02B6/26
CPC分类号： G02B6/30 , G02B6/3598 , G02B6/3636 , G02B6/3652 , G02B6/3692 , G02B6/4249
摘要： One or more nanotaper coupling waveguides formed within an optical substrate allows for straightforward, reproducible offset launch conditions to be achieved between an incoming signal and the core region of a multimode fiber (which may be disposed along an alignment fixture formed in the optical substrate), fiber array or other multimode waveguiding structure. Offset launching of a single mode signal into a multimode fiber couples the signal into favorable spatial modes which reduce the presence of differential mode dispersion along the fiber. This approach to providing single mode signal coupling into legacy multimode fiber is considered to be an improvement over the prior art which required the use of an interface element between a single mode fiber and multimode fiber, limiting the number of propagating signals and applications for the legacy multimode fiber. An optical switch may be used to select the specific nanotaper(s) for coupling into the multimode fiber.
摘要翻译：在光学衬底内形成的一个或多个纳米锥耦合波导允许在输入信号和多模光纤的芯区（其可以沿着在光学衬底中形成的对准夹具设置）之间实现直接的，可再现的偏置发射条件，光纤阵列或其他多模波导结构。将单模信号偏移发射到多模光纤将信号耦合到有利的空间模式，从而减少沿着光纤的差模色散的存在。提供单模信号耦合到传统多模光纤中的这种方法被认为是对需要使用单模光纤和多模光纤之间的接口元件的现有技术的改进，限制了传统信号的传播信号和应用的数量多模光纤。可以使用光开关来选择用于耦合到多模光纤中的特定纳米锥。

44. 发明专利

CA2636930A1 WIDEBAND OPTICAL COUPLING INTO THIN SOI CMOS PHOTONIC INTEGRATED CIRCUIT 未知
公开(公告)号：CA2636930A1
公开(公告)日：2007-07-19
申请号：CA2636930
申请日：2007-01-11
申请人： SIOPTICAL INC
发明人： GHIRON MARGARET , FANGMAN JOHN , GOTHOSKAR PRAKASH , NADEAU MARY , MONTGOMERY ROBERT KEITH
IPC分类号： G02B6/12
摘要： An arrangement for providing optical coupling into and out of a relatively thin silicon waveguide formed in the SOI layer of an SOI structure includes a lensing element and a defined reference surface within the SOI structure for providing optical coupling in an efficient manner. The input to the waveguide may come from an optical fiber or an optical transmitting device (laser). A similar coupling arrangement may be used between a thin silicon waveguide and an output fiber (either single mode fiber or multimode fiber).

45. 发明专利

CA2584564A1 OPTICAL DETECTOR CONFIGURATION AND UTILIZATION AS FEEDBACK CONTROL IN MONOLITHIC INTEGRATED OPTIC AND ELECTRONIC ARRANGEMENTS 未知
公开(公告)号：CA2584564A1
公开(公告)日：2006-04-27
申请号：CA2584564
申请日：2005-10-19
申请人： SIOPTICAL INC
发明人： SHASTRI KALPENDU , PIEDE DAVID , GOTHOSKAR PRAKASH , MONTGOMERY ROBERT , PATEL VIPULKUMAR , NADEAU MARY
IPC分类号： G11B7/00
摘要： An improvement in the reliability and lifetime of SOI-based opto-electronic systems is provided through the use of a monolithic opto-electronic feedback arrangement that monitors one or more optical signals within the opto-electronic system and provides an electrical feedback signal to adjust the operation parameters of selected optical devices. For example, input signal coupling orientation may be controlled. Alternatively, the operation of an optical modulator, switch, filter, or attenuator may be under closed-loop feedback control by virtue of the inventive monolithic feedback arrangement. The feedback arrangement may also include a calibration/look-up table, coupled to the control electronics, to provide the baseline signals used to analyze the system's performance.

46. 发明专利

CA2521660A1 SUB-MICRON PLANAR LIGHTWAVE DEVICES FORMED ON AN SOI OPTICALPLATFORM 未知
公开(公告)号：CA2521660A1
公开(公告)日：2004-11-04
申请号：CA2521660
申请日：2004-04-23
申请人： SIOPTICAL INC
发明人： PATHAK SOHAM , SHASTRI KALPENDU , PATEL VIPULKUMAR , GOTHOSKAR PRAKASH , GHIRON MARGARET , MONTGOMERY ROBERT KEITH , YANUSHEFSKI KATHERINE A
IPC分类号： G02B6/12 , G02B6/122 , G02B6/124 , G02B6/125 , G02B6/136 , G02B6/28 , G02F1/00 , G02F1/015 , G02B1/02
摘要： A set of planar, two-dimensional optical devices is able to be created in a sub-micron surface layer of an SOI structure, or within a sub-micron thick combination of an SOI surface layer and an overlying polysilicon layer. Conventional masking/etching techniques may be used to form a variety of passive and optical devices in this SOI platform. Various regions of the devices may be doped to form the active device structures. Additionally, the polysilicon layer may be separately patterned to provide a region of effecti ve mode index change for a propagating optical signal.

47. 发明专利

CA2560845A1 OPTICAL CROSSOVER IN THIN SILICON 未知
公开(公告)号：CA2560845A1
公开(公告)日：2005-10-13
申请号：CA2560845
申请日：2005-03-24
申请人： SIOPTICAL INC
发明人： GHIRON MARGARET , PIEDE DAVID , MONTGOMERY ROBERT KEITH , PATEL VIPULKUMAR , GOTHOSKAR PRAKASH , PATHAK SOHAM , YANUSHEFSKI KATHERINE A , SHASTRI KALPENDU
IPC分类号： G02B6/125 , G02B6/12
摘要： An arrangement for providing optical crossovers between waveguides formed in an SOI-based structure utilize a patterned geometry in the SOI structure tha t is selected to reduce the effects of crosstalk in the area where the signals overlap. Preferably, the optical signals are fixed to propagate along orthogonal directions (or are of different wavelengths) to minimize the effects of crosstalk. The geometry of the SOI structure is patterned to include predetermined tapers and/or reflecting surfaces to direct/shape the propagating optical signals. The patterned waveguide regions within the optical crossover region may be formed to include overlying polysilicon segments to further shape the propagating beams and improve the coupling efficiency of the crossover arrangement.

48. 发明专利

CA2558483A1 WAFER-LEVEL OPTO-ELECTRONIC TESTING APPARATUS AND METHOD 未知
公开(公告)号：CA2558483A1
公开(公告)日：2005-09-22
申请号：CA2558483
申请日：2005-03-08
申请人： SIOPTICAL INC
发明人： GOTHOSKAR PRAKASH , PATHAK SOHAM , PIEDE DAVID , YANUSHEFSKI KATHERINE A , GHIRON MARGARET , PATEL VIPULKUMAR , SHASTRI KALPENDU , MONTGOMERY ROBERT KEITH
IPC分类号： G01R31/26
摘要： A wafer-level testing arrangement for opto-electronic devices formed in a silicon-on-insulator (SOI) wafer structure utilizes a single opto-electronic testing element to perform both optical and electrical testing. Beam steering optics may be formed on the testing element and used to facilitate the coupling between optical probe signals and optical coupling elements (e.g., prism couplers, gratings) formed on the top surface of the SOI structure. The optical test signals are thereafter directed into optical waveguides formed in the top layer of the SOI structure. The opto-electronic testing element also comprises a plurality of electrical test pins that are positioned to contact a plurality of bondpad test sites on the opto-electronic device and perform electrical testing operations. The optical test signal results may be converted into electrical representations within the SOI structure and thus returned to the testing element as electrical signals.

49. 发明专利

CA2520625A1 METHOD OF USING A MANHATTAN LAYOUT TO REALIZE NON-MANHATTAN SHAPED OPTICAL STRUCTURES 未知
公开(公告)号：CA2520625A1
公开(公告)日：2004-10-28
申请号：CA2520625
申请日：2004-04-12
申请人： SIOPTICAL INC
发明人： SHASTRI KALPENDU , YANUSHEFSKI KATHERINE A , PATHAK SOHAM , GOTHOSKAR PRAKASH , GHIRON MARGARET , PATEL VIPULKUMAR , MONTGOMERY ROBERT KEITH
IPC分类号： G06F9/45 , G06F9/455 , G06F17/50 , H01L20060101
摘要： A system and method for providing the layout of non-Manhattan shaped integrated circuit elements using a Manhattan layout system utilizes a plurality of minimal sized polygons (e.g., rectangles) to fit within the boundaries of the non-Manhattan element. The rectangles are fit such that at least one vertex of each rectangle coincides with a grid point on the Manhattan layout system. Preferably, the rectangles are defined by using the spacing being adjacent grid points as the height of each rectangle. As the distance between adjacent grid points decreases, the layout better matches t he actual shape of the non-Manhattan element. The system and method then allows for electrical and optical circuit elements to be laid out simultaneously, using the same layout software and equipment.

50. 发明专利

CA2558483C WAFER-LEVEL OPTO-ELECTRONIC TESTING APPARATUS AND METHOD 未知
公开(公告)号：CA2558483C
公开(公告)日：2015-01-06
申请号：CA2558483
申请日：2005-03-08
申请人： SIOPTICAL INC
发明人： GOTHOSKAR PRAKASH , GHIRON MARGARET , MONTGOMERY ROBERT KEITH , PATEL VIPULKUMAR , SHASTRI KALPENDU , PATHAK SOHAM , PIEDE DAVID , YANUSHEFSKI KATHERINE A
IPC分类号： G01R31/28 , G01R31/26
摘要： A wafer-level testing arrangement for opto-electronic devices formed in a silicon-on-insulator (SOI) wafer structure utilizes a single opto-electronic testing element to perform both optical and electrical testing. Beam steering optics may be formed on the testing element and used to facilitate the coupling between optical probe signals and optical coupling elements (e.g., prism couplers, gratings) formed on the top surface of the SOI structure. The optical test signals are thereafter directed into optical waveguides formed in the top layer of the SOI structure. The opto~electronic testing element also comprises a plurality of electrical test pins that are positioned to contact a plurality of bondpad test sites on the opto-electronic device and perform electrical testing operations. The optical test signal results may be converted into electrical representations within the SOI structure and thus returned to the testing element as electrical signals.

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