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41. 发明授权

US07557422B2 Semiconductor device with STI structure 失效
标题翻译：具有STI结构的半导体器件
公开(公告)号：US07557422B2
公开(公告)日：2009-07-07
申请号：US11829521
申请日：2007-07-27
申请人： Katsuya Ito , Hiroaki Tsunoda , Takanori Matsumoto
发明人： Katsuya Ito , Hiroaki Tsunoda , Takanori Matsumoto
IPC分类号： H01L29/00
CPC分类号： H01L21/76229 , H01L21/76232 , H01L27/105 , H01L27/1052 , H01L27/11526 , H01L27/11543
摘要： A semiconductor device includes a semiconductor substrate including a memory cell region and a peripheral circuit region, a first trench formed in the memory cell region and having a first depth and a first opening width, and a second trench formed in the peripheral circuit region and including a pair of bottom edge portions and a bottom middle portion located between the bottom edge portions. The second trench has a second opening width that is larger than the first opening width. Each bottom edge portion has a second depth that is larger than the first depth. The bottom middle portion has a third depth that is same as the first depth.
摘要翻译：半导体器件包括：包括存储单元区域和外围电路区域的半导体衬底;形成在存储单元区域中并且具有第一深度和第一开口宽度的第一沟槽和形成在外围电路区域中的第二沟槽，一对底部边缘部分和位于底部边缘部分之间的底部中间部分。第二沟槽具有比第一开口宽度大的第二开口宽度。每个底部边缘部分具有大于第一深度的第二深度。底部中间部分具有与第一深度相同的第三深度。

42. 发明授权

US07488646B2 Nonvolatile semiconductor memory device and its manufacturing method 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US07488646B2
公开(公告)日：2009-02-10
申请号：US11685282
申请日：2007-03-13
申请人： Tadashi Iguchi , Yoshiaki Himeno , Hiroaki Tsunoda
发明人： Tadashi Iguchi , Yoshiaki Himeno , Hiroaki Tsunoda
IPC分类号： H01L21/336
CPC分类号： H01L27/11521 , H01L27/115 , H01L29/66825
摘要： A non-volatile semiconductor memory device, which is intended to prevent data destruction by movements of electric charges between floating gates and thereby improve the reliability, includes element isolation/insulation films buried into a silicon substrate to isolate stripe-shaped element-forming regions. Formed on the substrate are a floating gate via a first gate insulating film and further a control gate via a second gate insulating film. Source and drain diffusion layers are formed in self-alignment with control gates. The second gate insulating film on the floating gate is divided and separated together with the floating gate by slits above the element isolation/insulation films into discrete portions of individual memory cells.
摘要翻译：旨在防止由浮动栅极之间的电荷的移动引起的数据破坏，从而提高可靠性的非易失性半导体存储器件包括埋入硅衬底中以隔离条形元件形成区域的元件隔离/绝缘膜。在基板上形成有通过第一栅极绝缘膜的浮动栅极，并且还经由第二栅极绝缘膜的控制栅极。源极和漏极扩散层与控制栅极自对准地形成。浮动栅极上的第二栅极绝缘膜通过在元件隔离/绝缘膜上方的狭缝与浮动栅极分开并分离成各个存储单元的离散部分。

43. 发明申请

US20070262394A1 SEMICONDUCTOR DEVICE WITH STI STRUCTURE 失效
标题翻译：具有结构的半导体器件
公开(公告)号：US20070262394A1
公开(公告)日：2007-11-15
申请号：US11829521
申请日：2007-07-27
申请人： Katsuya ITO , Hiroaki Tsunoda , Takanori Matsumoto
发明人： Katsuya ITO , Hiroaki Tsunoda , Takanori Matsumoto
IPC分类号： H01L29/06
CPC分类号： H01L21/76229 , H01L21/76232 , H01L27/105 , H01L27/1052 , H01L27/11526 , H01L27/11543
摘要： A semiconductor device such as a flash memory includes a semiconductor substrate having a surface, and a plurality of trenches formed in the substrate so as to be open at the surface of the substrate, the trenches having opening widths different from each other. The trench with a smaller opening width is formed so as to have a first depth and the trench with a larger opening width has a bottom including opposite ends each of which has a second depth deeper than the first depth and a central portion shallower than the second depth.
摘要翻译：诸如闪速存储器的半导体器件包括具有表面的半导体衬底和形成在衬底中以在衬底的表面开口的多个沟槽，沟槽具有彼此不同的开口宽度。具有较小开口宽度的沟槽被形成为具有第一深度，并且具有较大开口宽度的沟槽具有底部，该底部包括相对的端部，每个端部具有比第一深度更深的第二深度和比第二深度浅的中心部分深度。

44. 发明授权

US07265022B2 Method of fabricating semiconductor device with STI structure 失效
标题翻译：制造具有STI结构的半导体器件的方法
公开(公告)号：US07265022B2
公开(公告)日：2007-09-04
申请号：US11086379
申请日：2005-03-23
申请人： Katsuya Ito , Hiroaki Tsunoda , Takanori Matsumoto
发明人： Katsuya Ito , Hiroaki Tsunoda , Takanori Matsumoto
IPC分类号： H01L21/76
CPC分类号： H01L21/76229 , H01L21/76232 , H01L27/105 , H01L27/1052 , H01L27/11526 , H01L27/11543
摘要： A method of fabricating a semiconductor device, includes depositing, on a semiconductor substrate, a gate insulating film, a polycrystalline or amorphous silicon film, a silicon nitride film and a silicon oxide film sequentially, patterning a resist for forming a plurality of trenches on an upper surface of the substrate so as to have opening widths differing from each other, etching the silicon oxide film and the silicon nitride film formed on the substrate by an reactive ion etching (RIE) process with the resist serving as a mask, and etching the polycrystalline or amorphous silicon film, the gate insulating film and the substrate by the RIE process with the etched silicon oxide film and silicon nitride film serving as a mask using reactive plasma including a halogen gas, fluorocarbon gas, Ar and O2, thereby simultaneously forming the trenches with opening widths differing from each other.
摘要翻译：一种制造半导体器件的方法，包括在半导体衬底上依次沉积栅极绝缘膜，多晶或非晶硅膜，氮化硅膜和氧化硅膜，将形成多个沟槽的抗蚀剂图案化在基板的上表面具有彼此不同的开口宽度，用抗蚀剂作为掩模，通过反应离子蚀刻（RIE）工艺蚀刻形成在基板上的氧化硅膜和氮化硅膜，并蚀刻多晶或非晶硅膜，栅极绝缘膜和衬底，通过RIE工艺，用蚀刻的氧化硅膜和氮化硅膜作为掩模，使用包括卤素气体，碳氟化合物气体，Ar和O 2的反应性等离子体，从而同时形成开口宽度彼此不同的沟槽。

45. 发明申请

US20070166919A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND ITS MANUFACTURING METHOD 失效
标题翻译：非线性半导体存储器件及其制造方法
公开(公告)号：US20070166919A1
公开(公告)日：2007-07-19
申请号：US11685282
申请日：2007-03-13
申请人： Tadashi Iguchi , Yoshiaki Himeno , Hiroaki Tsunoda
发明人： Tadashi Iguchi , Yoshiaki Himeno , Hiroaki Tsunoda
IPC分类号： H01L21/336
CPC分类号： H01L27/11521 , H01L27/115 , H01L29/66825
摘要： A non-volatile semiconductor memory device, which is intended to prevent data destruction by movements of electric charges between floating gates and thereby improve the reliability, includes element isolation/insulation films buried into a silicon substrate to isolate stripe-shaped element-forming regions. Formed on the substrate are a floating gate via a first gate insulating film and further a control gate via a second gate insulating film. Source and drain diffusion layers are formed in self-alignment with control gates. The second gate insulating film on the floating gate is divided and separated together with the floating gate by slits above the element isolation/insulation films into discrete portions of individual memory cells.
摘要翻译：旨在防止由浮动栅极之间的电荷的移动引起的数据破坏，从而提高可靠性的非易失性半导体存储器件包括埋入硅衬底中以隔离条形元件形成区域的元件隔离/绝缘膜。在基板上形成有通过第一栅极绝缘膜的浮动栅极，并且还经由第二栅极绝缘膜的控制栅极。源极和漏极扩散层与控制栅极自对准地形成。浮动栅极上的第二栅极绝缘膜通过在元件隔离/绝缘膜上方的狭缝与浮动栅极分开并分离成各个存储单元的离散部分。

46. 发明授权

US06987047B2 Method of manufacturing a nonvolatile semiconductor memory device having a stacked gate structure 失效
标题翻译：具有层叠栅极结构的非易失性半导体存储器件的制造方法
公开(公告)号：US06987047B2
公开(公告)日：2006-01-17
申请号：US11147226
申请日：2005-06-08
申请人： Tadashi Iguchi , Yoshiaki Himeno , Hiroaki Tsunoda
发明人： Tadashi Iguchi , Yoshiaki Himeno , Hiroaki Tsunoda
IPC分类号： H01L21/336
CPC分类号： H01L27/11521 , H01L27/115 , H01L29/66825
摘要： A non-volatile semiconductor memory device, which is intended to prevent data destruction by movements of electric charges between floating gates and thereby improve the reliability, includes element isolation/insulation films buried into a silicon substrate to isolate stripe-shaped element-forming regions. Formed on the substrate are a floating gate via a first gate insulating film and further a control gate via a second gate insulating film. Source and drain diffusion layers are formed in self-alignment with control gates. The second gate insulating film on the floating gate is divided and separated together with the floating gate by slits above the element isolation/insulation films into discrete portions of individual memory cells.
摘要翻译：旨在防止由浮动栅极之间的电荷的移动引起的数据破坏，从而提高可靠性的非易失性半导体存储器件包括埋入硅衬底中以隔离条形元件形成区域的元件隔离/绝缘膜。在基板上形成有通过第一栅极绝缘膜的浮动栅极，并且还经由第二栅极绝缘膜的控制栅极。源极和漏极扩散层与控制栅极自对准地形成。浮动栅极上的第二栅极绝缘膜通过在元件隔离/绝缘膜上方的狭缝与浮动栅极分开并分离成各个存储单元的离散部分。

47. 发明申请

US20050230780A1 Semiconductor device with STI structure and method of fabricating the same 失效
标题翻译：具有STI结构的半导体器件及其制造方法
公开(公告)号：US20050230780A1
公开(公告)日：2005-10-20
申请号：US11086379
申请日：2005-03-23
申请人： Katsuya Ito , Hiroaki Tsunoda , Takanori Matsumoto
发明人： Katsuya Ito , Hiroaki Tsunoda , Takanori Matsumoto
IPC分类号： H01L21/3065 , H01L21/76 , H01L21/762 , H01L21/8238 , H01L21/8247 , H01L27/115 , H01L29/00 , H01L29/788 , H01L29/792
CPC分类号： H01L21/76229 , H01L21/76232 , H01L27/105 , H01L27/1052 , H01L27/11526 , H01L27/11543
摘要： A semiconductor device such as a flash memory includes a semiconductor substrate having a surface, and a plurality of trenches formed in the substrate so as to be open at the surface of the substrate, the trenches having opening widths different from each other. The trench with a smaller opening width is formed so as to have a first depth and the trench with a larger opening width has a bottom including opposite ends each of which has a second depth deeper than the first depth and a central portion shallower than the second depth.
摘要翻译：诸如闪速存储器的半导体器件包括具有表面的半导体衬底和形成在衬底中以在衬底的表面开口的多个沟槽，沟槽具有彼此不同的开口宽度。具有较小开口宽度的沟槽被形成为具有第一深度，并且具有较大开口宽度的沟槽具有底部，该底部包括相对的端部，每个端部具有比第一深度更深的第二深度和比第二深度浅的中心部分深度。

48. 发明授权

US06927132B2 Method for producing nonvolatile semiconductor memory device and the device itself 失效
标题翻译：用于制造非易失性半导体存储器件和器件本身的方法
公开(公告)号：US06927132B2
公开(公告)日：2005-08-09
申请号：US10683355
申请日：2003-10-14
申请人： Tadashi Iguchi , Hiroaki Tsunoda
发明人： Tadashi Iguchi , Hiroaki Tsunoda
IPC分类号： H01L21/28 , H01L21/8247 , H01L27/115 , H01L29/423 , H01L29/49 , H01L29/788 , H01L29/792 , H01L21/336
CPC分类号： H01L27/11521 , H01L27/115
摘要： Method for producing a nonvolatile semiconductor memory device includes forming a first insulating film on a semiconductor substrate, forming a floating gate electrode material film on the first insulating film, forming a second insulating film on the floating gate electrode material film, forming a control gate electrode material film on the second insulating film, forming a first mask film on the control gate electrode material film, the first mask film having slits extending along a first direction, forming sidewalls on the sides of the first mask film in the slits, and etching the control gate electrode material film, the second insulating film and the floating gate electrode material film using the first mask film and the sidewalls as a mask so as to form memory cells each of which includes a floating gate electrode and a control gate electrode.
摘要翻译：用于制造非易失性半导体存储器件的方法包括在半导体衬底上形成第一绝缘膜，在第一绝缘膜上形成浮栅电极材料膜，在浮栅电极材料膜上形成第二绝缘膜，形成控制栅电极在所述第二绝缘膜上形成材料膜，在所述控制栅电极材料膜上形成第一掩模膜，所述第一掩模膜具有沿着第一方向延伸的狭缝，在所述狭缝中在所述第一掩模膜的侧面上形成侧壁，控制栅电极材料膜，第二绝缘膜和浮栅电极材料膜，使用第一掩模膜和侧壁作为掩模，以形成每个包括浮栅电极和控制栅电极的存储单元。

49. 发明申请

US20050167732A1 Nonvolatile semiconductor memory device and its manufacturing method 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20050167732A1
公开(公告)日：2005-08-04
申请号：US11094467
申请日：2005-03-31
申请人： Tadashi Iguchi , Yoshiaki Himeno , Hiroaki Tsunoda
发明人： Tadashi Iguchi , Yoshiaki Himeno , Hiroaki Tsunoda
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11521 , H01L27/115 , H01L29/66825
摘要： A non-volatile semiconductor memory device, which is intended to prevent data destruction by movements of electric charges between floating gates and thereby improve the reliability, includes element isolation/insulation films buried into a silicon substrate to isolate stripe-shaped element-forming regions. Formed on the substrate are a floating gate via a first gate insulating film and further a control gate via a second gate insulating film. Source and drain diffusion layers are formed in self-alignment with control gates. The second gate insulating film on the floating gate is divided and separated together with the floating gate by slits above the element isolation/insulation films into discrete portions of individual memory cells.
摘要翻译：旨在防止由浮动栅极之间的电荷的移动引起的数据破坏，从而提高可靠性的非易失性半导体存储器件包括埋入硅衬底中以隔离条形元件形成区域的元件隔离/绝缘膜。在基板上形成有通过第一栅极绝缘膜的浮动栅极，并且还经由第二栅极绝缘膜的控制栅极。源极和漏极扩散层与控制栅极自对准地形成。浮动栅极上的第二栅极绝缘膜通过在元件隔离/绝缘膜上方的狭缝与浮动栅极分开并分离成各个存储单元的离散部分。

50. 发明申请

US20050040439A1 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050040439A1
公开(公告)日：2005-02-24
申请号：US10948661
申请日：2004-09-24
申请人： Masahisa Sonoda , Hiroaki Tsunoda , Eiji Sakagami , Hidemi Kanetaka , Kenji Matsuzaki , Takanori Matsumoto
发明人： Masahisa Sonoda , Hiroaki Tsunoda , Eiji Sakagami , Hidemi Kanetaka , Kenji Matsuzaki , Takanori Matsumoto
IPC分类号： H01L21/76 , H01L21/762 , H01L21/8234 , H01L21/8238 , H01L27/148
CPC分类号： H01L21/76232 , H01L21/823481 , H01L21/823878
摘要： A semiconductor device comprising a semiconductor substrate having a substrate top surface on which a device is to be formed; a gate electrode electrically insulated from said semiconductor substrate by a gate-insulating film; a trench formed through said gate electrode into said semiconductor substrate to electrically isolate a device region for forming a device from the remainder region of said substrate top surface; and a boundary portion which is defined between a side surface of said trench and a bottom surface of said trench; wherein said boundary portion have spherical shapes having a curvature radius not smaller than 80 nm.
摘要翻译：一种半导体器件，包括具有其上将要形成器件的衬底顶表面的半导体衬底; 通过栅极绝缘膜与所述半导体衬底电绝缘的栅电极; 沟槽，通过所述栅电极形成到所述半导体衬底中，用于将用于形成器件的器件区域与所述衬底顶表面的剩余区域电隔离; 以及限定在所述沟槽的侧表面和所述沟槽的底表面之间的边界部分; 其中所述边界部分具有曲率半径不小于80nm的球形。

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