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41. 发明授权

US07822888B2 Data buffer control which controls selection of path and operation of data buffer, based on stored configuration information 有权
标题翻译：数据缓存控制，根据存储的配置信息控制数据缓冲区的路径选择和操作
公开(公告)号：US07822888B2
公开(公告)日：2010-10-26
申请号：US10973094
申请日：2004-10-26
申请人： Miyoshi Saito , Hisanori Fujisawa , Ichiro Kasama , Tetsuo Kawano , Kazuaki Imafuku , Hiroshi Furukawa , Shiro Uriu , Mitsuharu Wakayoshi
发明人： Miyoshi Saito , Hisanori Fujisawa , Ichiro Kasama , Tetsuo Kawano , Kazuaki Imafuku , Hiroshi Furukawa , Shiro Uriu , Mitsuharu Wakayoshi
IPC分类号： G06F3/00 , G06F5/00 , G06F13/00 , G06F13/28
CPC分类号： G06F15/7867
摘要： An operation apparatus includes a sequencer controlling states of a plurality of operation devices and a configuration memory storing therein configuration information as setting information for each state in the operation device. In the operation apparatus, a path which requires a data buffer and another path which requires no such a data buffer are provided for inputting data to the operation device, a data buffer control part is provided for controlling selection from these two paths and operation of the data buffer, and contents of path selection and operation control of the data buffer carried out by the data buffer control part are set according to the configuration information.
摘要翻译：一种操作装置，包括：控制多个操作装置的状态的定序器和配置存储器，其中配置信息作为操作装置中的每个状态的设置信息。在操作装置中，提供需要数据缓冲器的路径和不需要这样的数据缓冲器的另一路径，用于向操作装置输入数据，提供数据缓冲器控制部分，用于控制从这两个路径的选择和操作数据缓冲器，以及由数据缓冲器控制部分执行的数据缓冲器的路径选择和操作控制的内容根据配置信息来设置。

42. 发明申请

US20100014989A1 PUMP JACK PUMP-OFF CONTROL METHOD AND PUMP JACK CONTROL APPARATUS 有权
标题翻译：泵式抽油机控制方法和泵机控制装置
公开(公告)号：US20100014989A1
公开(公告)日：2010-01-21
申请号：US12446852
申请日：2007-10-04
申请人： Tatsumi Tsuruta , Yoichi Yamamoto , Koji Kawamoto , Tetsuo Kawano
发明人： Tatsumi Tsuruta , Yoichi Yamamoto , Koji Kawamoto , Tetsuo Kawano
IPC分类号： F04B49/06
CPC分类号： F04B47/02 , F04B49/065 , F04B2201/121 , F04B2203/0204 , F04B2203/0207 , F04B2203/0209
摘要： It is an object of the invention to provide a pump jack pump-off control method and a pump jack control apparatus in which, even when the speed of a pump jack is reduced due to generation of a pump-off condition, the pump jack is not caused to stop due to the motor overload abnormality or the coagulated crude oil and, even when the pump-off condition is generated, the reduction of the production capacity of the pump jack can be prevented as much as possible. On detecting the pump-off condition, while the pump jack is in operation with the speed thereof being reduced, or while the pump jack is in operation at the lowest speed, according to the overload warning signal of an ac electric motor, the pump jack is switched over to its intermittent operation. Also, the pump jack can be operated in such a manner that the stroke speed of the pump jack in the up stroke operation can be switched from a sinusoidal wave form over to a rectangular wave form, or, in the operation of the pump jack by an inverter, the pump jack can be operated such that it can carry out its up stroke operation with a limit imposed on torque.
摘要翻译：本发明的一个目的是提供一种泵千斤顶排水控制方法和一种泵千斤顶控制装置，其中即使当由于产生排水状态而使泵千斤顶的速度降低时，泵千斤顶不会由于电机过载异常或凝固原油而停止，即使在产生脱离状态的情况下，也能够尽可能地防止泵千斤顶的生产能力的降低。一旦检测到脱水状态，当泵式千斤顶的运转速度降低时，或者当泵式千斤顶以最低速度运转时，根据交流电动机的过载报警信号，泵的千斤顶切换到间歇操作。此外，泵千斤顶可以以这样的方式操作，使得在上行程操作中的泵千斤顶的行程速度可以从正弦波形切换到矩形波形，或者在泵千斤顶的操作中一个变频器，可以操作泵千斤顶，使其能够以施加扭矩的极限进行上行程操作。

43. 发明授权

US07580963B2 Semiconductor device having an arithmetic unit of a reconfigurable circuit configuration in accordance with stored configuration data and a memory storing fixed value data to be supplied to the arithmetic unit, requiring no data area for storing fixed value data to be set in a configuration memory 有权
标题翻译：具有根据存储的配置数据的可重新配置电路配置的运算单元和存储要提供给运算单元的固定值数据的存储器的半导体器件，不需要用于存储待配置的配置存储器中的固定值数据的数据区域
公开(公告)号：US07580963B2
公开(公告)日：2009-08-25
申请号：US11035055
申请日：2005-01-14
申请人： Tetsuo Kawano , Hiroshi Furukawa , Ichiro Kasama , Kazuaki Imafuku , Toshiaki Suzuki
发明人： Tetsuo Kawano , Hiroshi Furukawa , Ichiro Kasama , Kazuaki Imafuku , Toshiaki Suzuki
IPC分类号： G06F7/38
CPC分类号： G06F15/7867
摘要： A semiconductor device includes a configuration memory for storing configuration data, an arithmetic unit whose circuit configuration can be reconfigured in accordance with the configuration data, and a fixed value memory for storing fixed value data to be supplied to the arithmetic unit. Since the configuration data and fixed value data to be supplied to the arithmetic unit are stored in the different memories, no data area for storing the fixed value data need be set in the configuration memory. This makes it possible to supply a predetermined fixed value to the arithmetic unit by storing only information for reading out fixed value data from the fixed value memory.
摘要翻译：半导体器件包括用于存储配置数据的配置存储器，可根据配置数据重新配置其电路配置的算术单元和用于存储要提供给运算单元的固定值数据的固定值存储器。由于将要提供给运算单元的配置数据和固定值数据存储在不同的存储器中，所以不需要在配置存储器中设置用于存储固定值数据的数据区域。这使得可以通过仅存储用于从固定值存储器读出固定值数据的信息来向运算单元提供预定的固定值。

44. 发明申请

US20090124744A1 Carbonate Crystal, Manufacturing Method Thereof, And Transparent Optical Resin Composition 有权
公开(公告)号：US20090124744A1
公开(公告)日：2009-05-14
申请号：US11792507
申请日：2005-12-13
申请人： Tatsuya Ishizaka , Tetsuo Kawano
发明人： Tatsuya Ishizaka , Tetsuo Kawano
IPC分类号： C08K3/26 , C01B31/24 , C01F11/18 , C01G21/14
CPC分类号： C01F11/18 , B82Y30/00 , C01B32/60 , C01F11/187 , C01P2004/52 , C01P2004/54 , C01P2004/62 , C01P2004/64 , C30B7/00 , C30B29/10 , G02B1/02
摘要： The object of the present invention is to provide a carbonate crystal, which has oriented birefringence, is needle- or rod-like, and is able to negate the birefringence without sacrificing the light transmittance of a transparent polymeric resin when it exists in the transparent resin; a manufacturing method of the carbonate crystal; and a transparent optical resin composition comprising the carbonate resin. The carbonate crystal has an aspect ratio of two or greater, the average major axis length of 400 nm or shorter, and the variation coefficient expressed in Formula (1) below is 0.40 or less: 1 r × { 1 n - 1  ∑ i = 1 n  ( r i - r ) 2 } 1 2 Formula   ( 1 ) wherein r denotes an average major axis length, n denotes the number of particles used for the measurement of the major axis length, and n denotes the major axis length of the ith particle measured.

45. 发明授权

US07330276B2 Optical interference substrate, target detecting substrate, target detecting apparatus, and target detecting process 失效
标题翻译：光学干涉基板，目标检测基板，目标检测装置和目标检测过程
公开(公告)号：US07330276B2
公开(公告)日：2008-02-12
申请号：US10859244
申请日：2004-06-03
申请人： Tetsuo Kawano , Tomohiro Kodama , Shintaro Washizu , Takatoshi Kinoshita
发明人： Tetsuo Kawano , Tomohiro Kodama , Shintaro Washizu , Takatoshi Kinoshita
IPC分类号： G01B9/02
CPC分类号： G01N21/45 , G01N21/274 , G01N21/77 , G01N2021/7779
摘要： Provided are target detection substrate for target detecting apparatuses capable of detecting various targets such as pathogens, biological substances and toxic substances without using a costly measuring apparatus; which can detect these targets with a low measurement error, high efficiency, simplicity, speed and sensitivity; and which can make a quantitative detection thereof. The target detection substrate includes at least a target interaction part which can interact with a target on an optical interference substrate, which optical interference substrate includes a substrate and a different refractive index film having a different refractive index from that of the substrate disposed on the substrate, and interferes irradiated light to radiate it as interference light where the total number of peak tops and peak bottoms in a graph of transmittance against wavelength of the interference light is from 1 to 20 in an arbitrary wavelength range of 100 nm.
摘要翻译：提供一种能够在不使用昂贵的测量装置的情况下能够检测诸如病原体，生物物质和有毒物质的各种靶的靶检测装置的靶检测基板; 可以以低测量误差，高效率，简便性，速度和灵敏度检测这些目标; 并可进行定量检测。目标检测基板至少包括能够与光学干涉基板上的目标相互作用的目标相互作用部分，所述光学干涉基板包括基板和与设置在基板上的基板的折射率不同的折射率的折射率膜并且干涉照射的光以辐射它作为干涉光，其中在100nm的任意波长范围内透射率对干涉光的波长的图的峰值顶部和峰值底部的总数为1至20。

46. 发明申请

US20070150707A1 PROCESSOR AND PIPELINE RECONFIGURATION CONTROL METHOD 审中-公开
标题翻译：处理器和管道重新配置控制方法
公开(公告)号：US20070150707A1
公开(公告)日：2007-06-28
申请号：US11681350
申请日：2007-03-02
申请人： Shiro URIU , Mitsuharu Wakayoshi , Tetsuo Kawano , Hiroshi Furukawa , Ichiro Kasama , Kazuaki Imafuku , Toshiaki Suzuki
发明人： Shiro URIU , Mitsuharu Wakayoshi , Tetsuo Kawano , Hiroshi Furukawa , Ichiro Kasama , Kazuaki Imafuku , Toshiaki Suzuki
IPC分类号： G06F15/00
CPC分类号： G06F15/7867 , G06F9/30181 , G06F9/3836 , G06F9/3869 , G06F9/3897
摘要： A reconfigurable processor calculates execution times of configuration for executing pipeline processing from hardware configuration information, and fixes a clock cycle until processing ends. A counter compares the fixed clock cycle with the actual number of elapsed clocks, and, when the number of elapsed clocks equals the clock cycle, it is determined that pipeline processing has ended, and a configuration controller is notified of this.
摘要翻译：可重构处理器根据硬件配置信息计算执行流水线处理的配置执行时间，并修复时钟周期，直到处理结束为止。计数器将固定时钟周期与实际经过的时钟数进行比较，当经过的时钟数等于时钟周期时，确定流水线处理已经结束，并且通知配置控制器。

47. 发明申请

US20060004979A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20060004979A1
公开(公告)日：2006-01-05
申请号：US11167310
申请日：2005-06-28
申请人： Tetsuo Kawano , Hiroshi Furukawa , Ichiro Kasama , Kazuaki Imafuku , Toshiaki Suzuki , Miyoshi Saito
发明人： Tetsuo Kawano , Hiroshi Furukawa , Ichiro Kasama , Kazuaki Imafuku , Toshiaki Suzuki , Miyoshi Saito
IPC分类号： G06F12/00
CPC分类号： G06F12/0646 , G06F13/1694 , G06F15/7867
摘要： A semiconductor device includes a plurality of memories, a sequencer which outputs configuration information, and a memory reconfiguring circuit which reconfigures the memory area in accordance with the configuration information supplied from the sequencer. Since the memory reconfiguring circuit dynamically changes the allocation of the memories, it is possible to reconfigure the memory configuration and freely change the memory size in accordance with the purpose of use.
摘要翻译：半导体器件包括多个存储器，输出配置信息的定序器和根据从定序器提供的配置信息重新配置存储器区域的存储器重配置电路。由于存储器重新配置电路动态地改变存储器的分配，所以可以根据使用目的重新配置存储器配置并自由地改变存储器大小。

48. 发明申请

US20060004940A1 Operation apparatus, operation apparatus control method, program and computer readable information recording medium 有权
标题翻译：操作装置，操作装置控制方法，程序和计算机可读信息记录介质
公开(公告)号：US20060004940A1
公开(公告)日：2006-01-05
申请号：US10973094
申请日：2004-10-26
申请人： Miyoshi Saito , Hisanori Fujisawa , Ichiro Kasama , Tetsuo Kawano , Kazuaki Imafuku , Hiroshi Furukawa , Shiro Uriu , Mitsuharu Wakayoshi
发明人： Miyoshi Saito , Hisanori Fujisawa , Ichiro Kasama , Tetsuo Kawano , Kazuaki Imafuku , Hiroshi Furukawa , Shiro Uriu , Mitsuharu Wakayoshi
IPC分类号： G06F12/00
CPC分类号： G06F15/7867
摘要： An operation apparatus includes a sequencer controlling states of a plurality of operation devices and a configuration memory storing therein configuration information as setting information for each state in the operation device. In the operation apparatus, a path which requires a data buffer and another path which requires no such a data buffer are provided for inputting data to the operation device, a data buffer control part is provided for controlling selection from these two paths and operation of the data buffer, and contents of path selection and operation control of the data buffer carried out by the data buffer control part are set according to the configuration information.
摘要翻译：一种操作装置，包括：控制多个操作装置的状态的定序器和配置存储器，其中配置信息作为操作装置中的每个状态的设置信息。在操作装置中，提供需要数据缓冲器的路径和不需要这样的数据缓冲器的另一路径，用于向操作装置输入数据，提供数据缓冲器控制部分，用于控制从这两个路径的选择和操作数据缓冲器，以及由数据缓冲器控制部分执行的数据缓冲器的路径选择和操作控制的内容根据配置信息来设置。

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