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41. 发明授权

US08501537B2 Methods for bonding semiconductor structures involving annealing processes, and bonded semiconductor structures formed using such methods 有权
标题翻译：用于键合涉及退火工艺的半导体结构的方法，以及使用这种方法形成的键合半导体结构
公开(公告)号：US08501537B2
公开(公告)日：2013-08-06
申请号：US13076840
申请日：2011-03-31
申请人： Mariam Sadaka , Ionut Radu , Didier Landru , Lea Di Cioccio
发明人： Mariam Sadaka , Ionut Radu , Didier Landru , Lea Di Cioccio
IPC分类号： H01L21/00 , H01L21/30 , H01L21/46
CPC分类号： H01L24/03 , H01L24/05 , H01L24/08 , H01L24/80 , H01L2224/0345 , H01L2224/03452 , H01L2224/0346 , H01L2224/03614 , H01L2224/03616 , H01L2224/0384 , H01L2224/03848 , H01L2224/0401 , H01L2224/05546 , H01L2224/05571 , H01L2224/05647 , H01L2224/08121 , H01L2224/08146 , H01L2224/8001 , H01L2224/80357 , H01L2224/80895 , H01L2224/80896 , H01L2224/81948 , H01L2924/00014 , H01L2924/12042 , H01L2924/00012 , H01L2224/05552 , H01L2924/00
摘要： Methods of bonding together semiconductor structures include annealing a first metal feature on a first semiconductor structure, bonding the first metal feature to a second metal feature of a second semiconductor structure to form a bonded metal structure that comprises the first metal feature and the second metal feature, and annealing the bonded metal structure. Annealing the first metal feature may comprise subjecting the first metal feature to a pre-bonding thermal budget, and annealing the bonded metal structure may comprise subjecting the bonded metal structure to a post-bonding thermal budget that is less than the pre-bonding thermal budget. Bonded semiconductor structures are fabricated using such methods.
摘要翻译：将半导体结构结合在一起的方法包括退火第一半导体结构上的第一金属特征，将第一金属特征结合到第二半导体结构的第二金属特征，以形成包含第一金属特征和第二金属特征，并对结合的金属结构进行退火。退火第一金属特征可以包括使第一金属特征经受预结合热预算，并且对接合的金属结构进行退火可以包括使结合的金属结构经受低于预粘合热预算的后粘合热预算。使用这种方法制造粘合的半导体结构。

42. 发明申请

US20090004475A1 MAGNETIC MATERIALS MADE FROM MAGNETIC NANOPARTICLES AND ASSOCIATED METHODS 审中-公开
标题翻译：磁性纳米颗粒和相关方法制成的磁性材料
公开(公告)号：US20090004475A1
公开(公告)日：2009-01-01
申请号：US11769437
申请日：2007-06-27
申请人： Mariam Sadaka , Chris Young , Rahul Ganguli , Vivek Mehrotra
发明人： Mariam Sadaka , Chris Young , Rahul Ganguli , Vivek Mehrotra
IPC分类号： B32B5/16 , B05D5/12
CPC分类号： H01F1/24 , H01F1/0054 , H01F41/0246 , Y10T428/2982 , Y10T428/2991
摘要： A method and apparatus is provided for creating soft magnetic materials for low-loss inductive devices that achieves low eddy currents, low coercivity, and high permeability at high frequency. The soft magnetic material utilizes magnetic nanoparticles that take advantage of desired properties of two or more particle types. The magnetic nanoparticles are single domain particles that are optimized to enhance exchange coupling.
摘要翻译：提供一种方法和装置，用于产生用于低损耗感应装置的软磁材料，其实现低涡流，低矫顽力和高频率下的高磁导率。软磁性材料利用了利用两种或多种颗粒类型的所需性质的磁性纳米颗粒。磁性纳米颗粒是优化以增强交换偶联的单畴颗粒。

43. 发明申请

US20070145417A1 High voltage semiconductor device having a lateral channel and enhanced gate-to-drain separation 审中-公开
标题翻译：具有侧向通道和增强的栅 - 漏分离的高电压半导体器件
公开(公告)号：US20070145417A1
公开(公告)日：2007-06-28
申请号：US11711340
申请日：2007-02-27
申请人： Berinder Brar , Wonill Ha , Mariam Sadaka , Chanh Nguyen
发明人： Berinder Brar , Wonill Ha , Mariam Sadaka , Chanh Nguyen
IPC分类号： H01L29/76
CPC分类号： H01L29/66462 , H01L29/4175 , H01L29/41766 , H01L29/7785
摘要： A semiconductor device having a lateral channel with contacts on opposing surfaces thereof. The semiconductor device includes a conductive substrate having a source contact covering a substantial portion of a bottom surface thereof. The semiconductor device also includes an isolation layer above the conductive substrate, a lateral channel above the isolation layer and a drain contact above the lateral channel. The semiconductor device further includes a gate located in a gate recess interposed between the lateral channel and the drain contact and a drain formed by at least one source/drain contact layer interposed between the lateral channel and the drain contact. The drain is offset on one side of the gate by a gate-to-drain separation distance. The semiconductor device still further includes an interconnect that connects the lateral channel to the conductive substrate operable to provide a low resistance coupling between the source contact and the lateral channel.
摘要翻译：一种具有在其相对表面上具有触点的横向通道的半导体器件。半导体器件包括具有覆盖其底表面的大部分的源极接触的导电基底。半导体器件还包括在导电衬底之上的隔离层，隔离层上方的横向沟道和横向沟道上方的漏极接触。所述半导体器件还包括位于所述横向沟道和所述漏极接触之间的栅极凹槽中的栅极和由介于所述侧向沟道和所述漏极接触之间的至少一个源极/漏极接触层形成的漏极。漏极在栅极到漏极间隔距离的一侧偏移。半导体器件还包括将横向沟道连接到导电衬底的互连，其可操作以在源极接触和侧向通道之间提供低电阻耦合。

44. 发明申请

US20050045911A1 Semiconductor component and method of manufacturing same 有权
标题翻译：半导体元件及其制造方法
公开(公告)号：US20050045911A1
公开(公告)日：2005-03-03
申请号：US10651544
申请日：2003-08-29
申请人： Darrell Hill , Mariam Sadaka , Marcus Ray
发明人： Darrell Hill , Mariam Sadaka , Marcus Ray
IPC分类号： H01L21/84 , H01L27/06 , H01L27/12 , H01L29/737 , H01L29/80 , H01L31/0328 , H01L21/336 , H01L29/74
CPC分类号： H01L27/0605 , H01L21/84 , H01L27/1203 , H01L29/7371 , H01L29/802
摘要： A semiconductor component includes: a semiconductor substrate (110); an epitaxial semiconductor layer (120) above the semiconductor substrate; a bipolar transistor (770, 870) in the epitaxial semiconductor layer; and a field effect transistor (780, 880) in the epitaxial semiconductor layer. A portion of the epitaxial semiconductor layer forms a base of the bipolar transistor and a gate of the field effect transistor, and the portion of the epitaxial semiconductor layer has a substantially uniform doping concentration. In the same or another embodiment, a different portion of the epitaxial semiconductor layer forms an emitter of the bipolar transistor and a channel of the field effect transistor, and the different portion of the epitaxial semiconductor layer has a substantially uniform doping concentration that can be the same as or different from the substantially uniform doping concentration of the portion of the epitaxial semiconductor layer.
摘要翻译：半导体元件包括：半导体衬底（110）; 半导体衬底上方的外延半导体层（120）; 外延半导体层中的双极晶体管（770,870）; 和外延半导体层中的场效应晶体管（780,880）。外延半导体层的一部分形成双极晶体管的基极和场效应晶体管的栅极，并且外延半导体层的部分具有基本均匀的掺杂浓度。在相同或另一个实施例中，外延半导体层的不同部分形成双极晶体管的发射极和场效应晶体管的沟道，并且外延半导体层的不同部分具有基本均匀的掺杂浓度，其可以是与外延半导体层的部分的基本上均匀的掺杂浓度相同或不同。

45. 发明授权

US09136134B2 Methods of providing thin layers of crystalline semiconductor material, and related structures and devices 有权
标题翻译：提供晶体半导体材料薄层的方法，以及相关结构和器件
公开(公告)号：US09136134B2
公开(公告)日：2015-09-15
申请号：US13402464
申请日：2012-02-22
申请人： Mariam Sadaka , Ionut Radu
发明人： Mariam Sadaka , Ionut Radu
IPC分类号： H01L21/30 , H01L21/46 , H01L21/302 , H01L21/306 , H01L21/3065 , H01L21/762 , H01L21/3213
CPC分类号： H01L21/302 , H01L21/30604 , H01L21/3065 , H01L21/32134 , H01L21/32137 , H01L21/76254
摘要： Methods of fabricating semiconductor devices include forming a metal silicide in a portion of a crystalline silicon layer, and etching the metal silicide using an etchant selective to the metal silicide relative to the crystalline silicon to provide a thin crystalline silicon layer. Silicon-on-insulator (SOI) substrates may be formed by providing a layer of crystalline silicon over a base substrate with a dielectric material between the layer of crystalline silicon and the base substrate, and thinning the layer of crystalline silicon by forming a metal silicide layer in a portion of the crystalline silicon, and then etching the metal silicide layer using an etchant selective to the metal silicide layer relative to the crystalline silicon.
摘要翻译：制造半导体器件的方法包括在晶体硅层的一部分中形成金属硅化物，并且使用相对于晶体硅对金属硅化物选择性的蚀刻剂蚀刻金属硅化物以提供薄的晶体硅层。绝缘体上硅（SOI）衬底可以通过在基底衬底上提供晶体硅层与晶体硅层与基底衬底之间的电介质材料形成，并通过形成金属硅化物来减薄结晶硅层层，然后使用相对于晶体硅对金属硅化物层选择性的蚀刻剂来蚀刻金属硅化物层。

46. 发明授权

US08673733B2 Methods of transferring layers of material in 3D integration processes and related structures and devices 有权
标题翻译：在3D集成过程和相关结构和设备中传输材料层的方法
公开(公告)号：US08673733B2
公开(公告)日：2014-03-18
申请号：US13246580
申请日：2011-09-27
申请人： Mariam Sadaka , Ionut Radu
发明人： Mariam Sadaka , Ionut Radu
IPC分类号： H01L21/762
CPC分类号： H01L27/0688 , H01L21/76254
摘要： Methods of transferring a layer of semiconductor material from a first donor structure to a second structure include forming a generally planar weakened zone within the first donor structure defined by implanted ions therein. At least one of a concentration of the implanted ions and an elemental composition of the implanted ions may be formed to vary laterally across the generally planar weakened zone. The first donor structure may be bonded to a second structure, and the first donor structure may be fractured along the generally planar weakened zone, leaving the layer of semiconductor material bonded to the second structure. Semiconductor devices may be fabricated by forming active device structures on the transferred layer of semiconductor material. Semiconductor structures are fabricated using the described methods.
摘要翻译：将半导体材料层从第一施主结构转移到第二结构的方法包括在由其中的注入离子限定的第一施主结构内形成大致平坦的弱化区。注入离子的浓度和注入离子的元素组成中的至少一种可以形成为跨越大致平坦的弱化区横向变化。第一施主结构可以结合到第二结构，并且第一施主结构可以沿着大致平坦的弱化区断裂，留下半导体材料层与第二结构结合。可以通过在半导体材料的转移层上形成有源器件结构来制造半导体器件。使用所述方法制造半导体结构。

47. 发明授权

US08637995B2 Bonded semiconductor structures including two or more processed semiconductor structures carried by a common substrate 有权
标题翻译：包含由公共基板承载的两个或多个处理的半导体结构的结合的半导体结构
公开(公告)号：US08637995B2
公开(公告)日：2014-01-28
申请号：US13657327
申请日：2012-10-22
申请人： Soitec , Mariam Sadaka
发明人： Mariam Sadaka
IPC分类号： H01L23/52 , H01L23/48 , H01L29/40
CPC分类号： H01L21/76254 , H01L21/6835 , H01L21/76898 , H01L23/15 , H01L23/481 , H01L24/08 , H01L24/16 , H01L24/80 , H01L25/0652 , H01L25/50 , H01L2221/68368 , H01L2224/0401 , H01L2224/08225 , H01L2224/131 , H01L2224/16146 , H01L2224/16225 , H01L2224/16227 , H01L2224/80097 , H01L2224/80895 , H01L2224/80896 , H01L2224/9202 , H01L2224/94 , H01L2225/06513 , H01L2225/06541 , H01L2225/06555 , H01L2924/12041 , H01L2924/12042 , H01L2224/03 , H01L2224/81 , H01L2924/014 , H01L2924/00
摘要： Methods of forming semiconductor devices include providing a substrate including a layer of semiconductor material on a layer of electrically insulating material. A first metallization layer is formed over a first side of the layer of semiconductor material. Through wafer interconnects are foamed at least partially through the substrate. A second metallization layer is formed over a second side of the layer of semiconductor material opposite the first side thereof. An electrical pathway is provided that extends through the first metallization layer, the substrate, and the second metallization layer between a first processed semiconductor structure carried by the substrate on the first side of the layer of semiconductor material and a second processed semiconductor structure carried by the substrate on the first side of the layer of semiconductor material. Semiconductor structures are fabricated using such methods.
摘要翻译：形成半导体器件的方法包括在电绝缘材料层上提供包括半导体材料层的衬底。第一金属化层形成在半导体材料层的第一侧上。通过晶片互连件至少部分地通过衬底发泡。第二金属化层形成在半导体材料层的与其第一侧相对的第二侧上。提供了一种电路，其通过第一金属化层，衬底和第二金属化层延伸，所述第一金属化层和第二金属化层位于由半导体材料层的第一侧上的衬底承载的第一处理半导体结构和由第衬底在半导体材料层的第一侧上。使用这种方法制造半导体结构。

48. 发明申请

US20140001642A1 INTERPOSERS INCLUDING FLUIDIC MICROCHANNELS AND RELATED STRUCTURES AND METHODS 有权
标题翻译：包括流体微通道和相关结构和方法的介质
公开(公告)号：US20140001642A1
公开(公告)日：2014-01-02
申请号：US13536061
申请日：2012-06-28
申请人： Mariam Sadaka
发明人： Mariam Sadaka
IPC分类号： H01L23/48 , H01L21/71
CPC分类号： H01L23/49827 , B01L3/502707 , B01L2300/0864 , B01L2300/0867 , B01L2300/0874 , B01L2300/0887 , H01L21/2007 , H01L23/367 , H01L23/46 , H01L23/473 , H01L23/49822 , H01L24/14 , H01L24/16 , H01L27/0688 , H01L27/1203 , H01L2224/13011 , H01L2224/13025 , H01L2224/131 , H01L2224/14051 , H01L2224/14505 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/17519 , H01L2224/73204 , H01L2224/81191 , H01L2224/81203 , H01L2224/81815 , H01L2924/0002 , H01L2924/12041 , H01L2924/00 , H01L2924/00014
摘要： Interposers for use in the fabrication of electronic devices include semiconductor-on-insulator structures having fluidic microchannels therein. The interposers may include a multi-layer body in which a semiconductor material is bonded to a substrate with a layer of dielectric material between the semiconductor material and the substrate. At least one fluidic microchannel may extend in a lateral direction through at least one of the layer of dielectric material and the semiconductor material. The interposers may include redistribution layers and electrical contacts on opposing sides thereof. Semiconductor structures include one or more semiconductor devices coupled with such interposers. Such interposers and semiconductor structures may be formed by fabricating a semiconductor-on-insulator type structure using a direct bonding method and defining one or more fluidic microchannels at a bonding interface during the direct bonding process.
摘要翻译：用于制造电子器件的内插件包括其中具有流体微通道的绝缘体上半导体结构。内插件可以包括多层体，其中半导体材料在半导体材料和衬底之间用介电材料层结合到衬底。至少一个流体微通道可以在横向方向上延伸穿过介电材料层和半导体材料中的至少一个。插入件可以包括在其相对侧上的再分布层和电触头。半导体结构包括与这种内插器耦合的一个或多个半导体器件。这样的内插件和半导体结构可以通过使用直接接合方法制造绝缘体上半导体型结构并且在直接接合工艺期间在键合界面处限定一个或多个流体微通道来形成。

49. 发明授权

US08575001B2 Methods for directly bonding together semiconductor structures, and bonded semiconductor structures formed using such methods 有权
公开(公告)号：US08575001B2
公开(公告)日：2013-11-05
申请号：US12970422
申请日：2010-12-16
申请人： Mariam Sadaka
发明人： Mariam Sadaka
IPC分类号： H01L21/30
摘要： Embodiments of the present invention include methods of directly bonding together semiconductor structures. In some embodiments, a cap layer may be provided at an interface between directly bonded metal features of the semiconductor structures. In some embodiments, impurities are provided within the directly bonded metal features of the semiconductor structures. Bonded semiconductor structures are formed using such methods.

50. 发明申请

US20120313237A1 BONDED SEMICONDUCTOR STRUCTURES AND METHODS OF FORMING SAME 有权
标题翻译：结合半导体结构及其形成方法
公开(公告)号：US20120313237A1
公开(公告)日：2012-12-13
申请号：US13575200
申请日：2011-01-26
申请人： Mariam Sadaka , Radu Ionut
发明人： Mariam Sadaka , Radu Ionut
IPC分类号： H01L21/306 , H01L23/48
CPC分类号： H01L24/02 , H01L21/3105 , H01L21/31053 , H01L24/03 , H01L24/05 , H01L24/80 , H01L25/50 , H01L2224/0401 , H01L2224/80896 , H01L2224/81894 , H01L2224/83894 , H01L2224/83896 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01044 , H01L2924/01049 , H01L2924/01051 , H01L2924/01073 , H01L2924/01074 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/14 , H01L2924/1461 , H01L2924/00
摘要： Embodiments of the invention include methods and structures for fabricating a semiconductor structure, and, particularly for improving the planarity of a bonded semiconductor structure comprising a processed semiconductor structure and a semiconductor structure.
摘要翻译：本发明的实施例包括用于制造半导体结构的方法和结构，特别是用于改善包括处理的半导体结构和半导体结构的键合半导体结构的平面性。

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