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41. 发明授权

US06507931B2 Semiconductor integrated circuit designing method and system 有权
公开(公告)号：US06507931B2
公开(公告)日：2003-01-14
申请号：US09892572
申请日：2001-06-28
申请人： Toshiya Kotani , Satoshi Tanaka , Soichi Inoue
发明人： Toshiya Kotani , Satoshi Tanaka , Soichi Inoue
IPC分类号： G06F1750
CPC分类号： G06F17/5081
摘要： A method for designing a semiconductor integrated circuit is provided which comprises compacting a design layout of a semiconductor integrated circuit on the basis of a given design rule to obtain a compacted pattern, predicting a pattern to be formed at a surface area of a wafer for forming the semiconductor integrated circuit on the basis of the compacted pattern, obtaining an evaluated value by comparing the predicted pattern with the compacted pattern, deciding whether the evaluated value satisfies a predetermined condition, and modifying the design rule when the evaluated value is decided as not satisfying the predetermined condition.

42. 发明授权

US06245466B1 Mask pattern design method and a photomask 失效
标题翻译：面膜图案设计方法和光掩模
公开(公告)号：US06245466B1
公开(公告)日：2001-06-12
申请号：US09358769
申请日：1999-07-22
申请人： Toshiya Kotani , Satoshi Tanaka , Soichi Inoue
发明人： Toshiya Kotani , Satoshi Tanaka , Soichi Inoue
IPC分类号： G03F900
CPC分类号： G03F1/36
摘要： A rectangular supplemental pattern having two edges of dimensions s1 and s2 is added to a main pattern corresponding to a design pattern. Where a change amount of shortening with respect to small changes &Dgr;s1 and &Dgr;s2 of the plan shape of the supplemental pattern, the plan shape of the supplemental pattern is determined such that the change amount s′={(±&Dgr;x/±&Dgr;s1)2+(±&Dgr;x/±&Dgr;s1)2}½ of the pattern plan shape on a wafer after transfer becomes a predetermined value or less.
摘要翻译：将具有尺寸s1和s2的两个边缘的矩形补充图案添加到对应于设计图案的主图案。在对补充模式的计划形状的小变化DELTAs1和DELTA2进行缩短的变化量的情况下，确定补充模式的计划形状，使得变化量s'= {（±DELTAx /±DELTAs1）2+ 转印后的晶片上的图形平面形状的（±DELTAx /±DELTAs1）2} 1/2成为规定值以下。

43. 发明授权

US06221539B1 Mask pattern correction method and a recording medium which records a mask pattern correction program 有权
标题翻译：掩模图案校正方法和记录掩模图案校正程序的记录介质
公开(公告)号：US06221539B1
公开(公告)日：2001-04-24
申请号：US09358824
申请日：1999-07-22
申请人： Toshiya Kotani , Satoshi Tanaka , Soichi Inoue
发明人： Toshiya Kotani , Satoshi Tanaka , Soichi Inoue
IPC分类号： G03F900
CPC分类号： G03F7/70441 , G03F1/36
摘要： All edge positions constituting a first mask pattern are shifted by a predetermined change amount, to obtain a second mask pattern. A first finished plan shape transferred by the fist mask pattern and a second finished plan shape transferred by the second mask pattern are obtained by a calculation. Coefficients, which are obtained by respectively dividing dimensional differences between the edge positions of the first and second finished plan shapes by the change amount, are respectively calculated and assigned for edges. A corrected pattern is prepared by shifting the edge positions of the first mask pattern in accordance with magnitude of division of differences between a design pattern and the first finished plan shape by the coefficients assigned to the edges.
摘要翻译：构成第一掩模图案的所有边缘位置偏移预定的变化量，以获得第二掩模图案。通过计算获得通过第一掩模图案传送的第一完成平面形状和通过第二掩模图案传送的第二完成平面形状。通过分别计算第一和第二完成平面形状的边缘位置之间的尺寸差异所得到的系数，并分配给边缘。通过根据分配给边缘的系数，根据设计图案和第一完成平面形状之间的差分的大小来移动第一掩模图案的边缘位置来准备校正图案。

44. 发明授权

US09207531B2 Pattern forming method 有权
标题翻译：图案形成方法
公开(公告)号：US09207531B2
公开(公告)日：2015-12-08
申请号：US13239449
申请日：2011-09-22
申请人： Hiroko Nakamura , Koji Asakawa , Shigeki Hattori , Satoshi Tanaka , Toshiya Kotani
发明人： Hiroko Nakamura , Koji Asakawa , Shigeki Hattori , Satoshi Tanaka , Toshiya Kotani
IPC分类号： H01L21/31 , H01L21/469 , G03F7/00 , B81C1/00 , B82Y10/00 , B82Y40/00
CPC分类号： G03F7/0002 , B81C1/00031 , B81C2201/0149 , B82Y10/00 , B82Y40/00
摘要： According to one embodiment, a pattern including first and second block phases is formed by self-assembling a block copolymer onto a film to be processed. The entire block copolymer present in a first region is removed under a first condition by carrying out energy beam irradiation and development, thereby leaving a pattern including the first and second block phases in a region other than the first region. The first block phase present in a second region is selectively removed under a second condition by carrying out energy beam irradiation and development, thereby leaving a pattern including the first and second block phases in an overlap region between a region other than the first region and a region other than the second region, and leaving a pattern of second block phase in the second region excluding the overlap region. The film is etched with the left patterns as masks.
摘要翻译：根据一个实施方案，通过将嵌段共聚物自组装成待加工的膜来形成包括第一和第二嵌段相的图案。存在于第一区域中的整个嵌段共聚物在第一条件下通过进行能量束照射和显影而除去，从而在第一区域以外的区域留下包括第一和第二嵌段相的图案。存在于第二区域中的第一块相位通过进行能量束照射和显影而在第二条件下被选择性地去除，从而在包括第一区域和第一区域之间的重叠区域中留下包括第一和第二块相的图案，区域，并且在除了重叠区域之外的第二区域中留下第二块相位的图案。用左图案蚀刻该胶片作为掩模。

45. 发明授权

US08122385B2 Mask pattern correcting method 有权
标题翻译：掩模图案校正方法
公开(公告)号：US08122385B2
公开(公告)日：2012-02-21
申请号：US12129167
申请日：2008-05-29
申请人： Kazuya Fukuhara , Tatsuhiko Higashiki , Toshiya Kotani , Satoshi Tanaka , Takashi Sato , Akiko Mimotogi , Masaki Satake
发明人： Kazuya Fukuhara , Tatsuhiko Higashiki , Toshiya Kotani , Satoshi Tanaka , Takashi Sato , Akiko Mimotogi , Masaki Satake
IPC分类号： G06F17/50
CPC分类号： G03F1/36
摘要： In a model-based OPC which makes a suitable mask correction for each mask pattern using an optical image intensity simulator, a mask pattern is divided into subregions and the model of optical image intensity simulation is changed according to the contents of the pattern in each subregion. When the minimum dimensions of the mask pattern are smaller than a specific threshold value set near the exposure wavelength, the region is calculated using a high-accuracy model and the other regions are calculated using a high-speed model.
摘要翻译：在基于模型的OPC中，使用光学图像强度模拟器对每个掩模图案进行适当的掩模校正，将掩模图案划分为子区域，并且根据每个子区域中的图案的内容来改变光学图像强度模拟模型。当掩模图案的最小尺寸小于在曝光波长附近设置的特定阈值时，使用高精度模型计算该区域，并且使用高速模型来计算其它区域。

46. 发明授权

US08046722B2 Method for correcting a mask pattern, system for correcting a mask pattern, program, method for manufacturing a photomask and method for manufacturing a semiconductor device 失效
标题翻译：用于校正掩模图案的方法，用于校正掩模图案的系统，程序，用于制造光掩模的方法和用于制造半导体器件的方法
公开(公告)号：US08046722B2
公开(公告)日：2011-10-25
申请号：US12379047
申请日：2009-02-11
申请人： Toshiya Kotani , Satoshi Tanaka , Soichi Inoue
发明人： Toshiya Kotani , Satoshi Tanaka , Soichi Inoue
IPC分类号： G06F17/50 , H01L21/66
CPC分类号： G03F7/70441 , G03F1/36
摘要： A computer implemented method for correcting a mask pattern includes: predicting a displacement of a device pattern by using a mask pattern to form the device pattern and a variation of a process condition; determinating an optical proximity correction value so that the displacement falls within a displacement tolerance of the device pattern; and correcting the mask pattern using the optical proximity correction value.
摘要翻译：用于校正掩模图案的计算机实现方法包括：通过使用掩模图案来预测设备图案的位移以形成设备图案和处理条件的变化; 确定光学接近校正值，使得位移落在器件图案的位移公差内; 以及使用光学接近校正值来校正掩模图案。

47. 发明授权

US07669172B2 Pattern creation method, mask manufacturing method and semiconductor device manufacturing method 失效
标题翻译：图案形成方法，掩模制造方法和半导体器件制造方法
公开(公告)号：US07669172B2
公开(公告)日：2010-02-23
申请号：US12050764
申请日：2008-03-18
申请人： Takeshi Ito , Satoshi Tanaka , Toshiya Kotani , Tadahito Fujisawa , Koji Hashimoto
发明人： Takeshi Ito , Satoshi Tanaka , Toshiya Kotani , Tadahito Fujisawa , Koji Hashimoto
IPC分类号： G06F17/50
CPC分类号： G03F1/00
摘要： A pattern creation method, including laying out data of a most extreme end pattern of integrated circuit patterns on a first layer and laying out data of the integrated circuit patterns excluding the most extreme end pattern on a second layer, extracting data of a first most proximate pattern being most proximate to the most extreme end pattern from the second layer and converting the extracted data to a third layer, generating data of a contacting pattern which contacts both the first most proximate pattern and the most extreme end pattern in a fourth layer, generating data of a non-overlapping pattern of the contacting pattern excluding overlapping portions with the most extreme end pattern and the first most proximate pattern in a fifth layer, extracting data of a second most proximate pattern being most proximate to the non-overlapping pattern and converting the extracted data to the first layer.
摘要翻译：一种图案创建方法，包括在第一层上布置集成电路图案的最极端格式的数据，并且在第二层上布置不包括最末端图案的集成电路图案的数据，提取第一最接近的数据图案最接近于来自第二层的最末端图案，并将所提取的数据转换为第三层，产生在第四层中接触第一最近图案和最末端图案的接触图案的数据，产生接触图案的非重叠图案的数据，不包括在第五层中具有最末端图案和最前端图案和第一最近图案的重叠部分，提取最接近图案的第二最接近图案的数据，其最接近非重叠图案并且转换提取的数据到第一层。

48. 发明授权

US07594216B2 Method and system for forming a mask pattern, method of manufacturing a semiconductor device, system forming a mask pattern on data, cell library and method of forming a photomask 失效
标题翻译：用于形成掩模图案的方法和系统，制造半导体器件的方法，在数据上形成掩模图案的系统，单元库和形成光掩模的方法
公开(公告)号：US07594216B2
公开(公告)日：2009-09-22
申请号：US10933334
申请日：2004-09-03
申请人： Toshiya Kotani , Satoshi Tanaka , Soichi Inoue
发明人： Toshiya Kotani , Satoshi Tanaka , Soichi Inoue
IPC分类号： G06F17/50
CPC分类号： G03F1/36 , H01J37/3026 , H01J2237/31769
摘要： A method of forming a mask pattern comprises the following steps. A second cell library is prepared by making process proximity effect correction with respect to cell patterns stored in a first cell library. The second cell library stores corrected cell patterns. A first corrected cell pattern and a second corrected cell pattern of the corrected cell patterns are placed so that an edge of the first corrected cell pattern and an edge of the second corrected cell pattern contact or come close to or overlap each other. A boundary pattern at the boundary neighborhood between the first corrected cell pattern and the second corrected cell pattern is extracted. Process proximity effect correction is made with respect to the boundary pattern.
摘要翻译：形成掩模图案的方法包括以下步骤。通过相对于存储在第一个细胞库中的细胞图案进行过程接近效应校正来制备第二个细胞库。第二个细胞库存储校正的细胞图案。放置经校正的单元图案的第一校正单元图案和第二校正单元图形，使得第一校正单元图案的边缘和第二校正单元图案的边缘彼此接近或重叠。提取在第一校正单元图案和第二校正单元图案之间的边界邻域处的边界图案。相对于边界图案进行过程接近效应校正。

49. 发明授权

US07181707B2 Method of setting process parameter and method of setting process parameter and/or design rule 有权
标题翻译：设置过程参数的方法和设置过程参数和/或设计规则的方法
公开(公告)号：US07181707B2
公开(公告)日：2007-02-20
申请号：US10385628
申请日：2003-03-12
申请人： Toshiya Kotani , Satoshi Tanaka , Koji Hashimoto , Soichi Inoue , Ichiro Mori
发明人： Toshiya Kotani , Satoshi Tanaka , Koji Hashimoto , Soichi Inoue , Ichiro Mori
IPC分类号： G06F17/50 , G06K9/00
CPC分类号： H01L22/20 , H01L2924/0002 , H01L2924/00
摘要： Disclosed is a method of setting a process parameter for use in manufacturing a semiconductor integrated circuit, comprising correcting a first pattern by using process parameter information to obtain a second pattern, the first pattern being one which corresponds to a design layout of the semiconductor integrated circuit, predicting a third pattern by using the process parameter information, the third pattern being one which corresponds to the second pattern and which is to be formed on a semiconductor wafer in an etching process, obtaining an evaluation value by comparing the third pattern with the first pattern, determining whether the evaluation value satisfies a preset condition, and changing the process parameter information when the evaluation value is found not to satisfy the preset condition.
摘要翻译：公开了一种设置用于制造半导体集成电路的工艺参数的方法，包括通过使用工艺参数信息来校正第一图案以获得第二图案，第一图案是对应于半导体集成电路的设计布局的图案，通过使用处理参数信息来预测第三图案，在蚀刻工艺中，第三图案是对应于第二图案并且将形成在半导体晶片上的图案，通过将第三图案与第一图案进行比较来获得评估值判定评估值是否满足预设条件，以及当评估值不满足预设条件时，改变处理参数信息。

50. 发明授权

US07065739B2 Pattern correction method of semiconductor device 失效
标题翻译：半导体器件的图案校正方法
公开(公告)号：US07065739B2
公开(公告)日：2006-06-20
申请号：US10331005
申请日：2002-12-27
申请人： Sachiko Kobayashi , Toshiya Kotani , Satoshi Tanaka , Susumu Watanabe , Mitsuhiro Yano
发明人： Sachiko Kobayashi , Toshiya Kotani , Satoshi Tanaka , Susumu Watanabe , Mitsuhiro Yano
IPC分类号： G06F17/50 , G03F1/00
CPC分类号： G03F1/36 , G03F7/70441
摘要： A pattern correction method executed by a computer includes a first correction and a second correction. The first correction is executed by calculating a correction value, in consideration for an optical proximity effect, for edges (first edges) meeting a condition among the edges constituting a designed pattern. Subsequently, The second correction is executed for an edge (second edge) which does not meet the condition, by use of the correction value of any one of the edges (first edges) adjacent to the second edge among the first edges for which the first correction is executed, thus connecting the corrected first edge and the corrected second edge by a line segment. The pattern is corrected to a shape suitable for a mask drawing and a check with simple processing.
摘要翻译：由计算机执行的图案校正方法包括第一校正和第二校正。对于构成设计图案的边缘中满足条件的边缘（第一边缘），考虑光学邻近效应来计算校正值来执行第一校正。随后，对于不符合条件的边缘（第二边缘），通过使用与第一边缘相邻的边缘（第一边缘）中的任何一个边缘（第一边缘）的第一边缘的第一边缘执行校正，从而将校正的第一边缘和校正的第二边缘连接到线段。该图案被校正为适于掩模绘图和具有简单处理的检查的形状。

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