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41. 发明公开

EP1290735A1 A SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：EP1290735A1
公开(公告)日：2003-03-12
申请号：EP01938146.6
申请日：2001-05-01
申请人： Koninklijke Philips Electronics N.V.
发明人： HUETING, Raymond, J., E. , HIJZEN, Erwin, A.
IPC分类号： H01L29/78 , H01L29/423 , H01L29/06
CPC分类号： H01L29/7835 , H01L29/0696 , H01L29/4232 , H01L29/4236 , H01L29/42368 , H01L29/4238 , H01L29/7397 , H01L29/7834 , H01L29/8128
摘要： A semiconductor body has source and drain regions (4 and 5; 4' and 5') spaced apart by a body region (6; 6') and a drain drift region (50; 50') and both meeting the same surface (3a) of the semiconductor body. An insulated gate structure (7; 70'; 700) is provided within a trench (80; 80'; 80'') extending in the semiconductor body. The gate structure has a gate conductive region (70b; 70'b; 70''b) separated from the trench by a dielectric layer (70a; 70'a) such that a conduction channel accommodation portion (60; 60') of the body region extends along at least side walls (80a; 80'a; 80''a) of the trench and between the source (4; 4') and drain drift (50; 50') regions. The trench extends from the body region into the drain drift region (50; 50') and the dielectric layer has, at least on side walls (80a; 80'a; 80''a) of the trench, a greater thickness in the portion of the trench extending into the drain drift region (50; 50') than in the remaining portion of the trench so that an extension (71; 71'; 71''; 710) of the gate conductive region extending within the trench through the drain drift region (50; 50') towards the drain region (5; 5') forms a field plate.
摘要翻译：半导体本体具有由本体区域（6; 6'）和漏极漂移区域（50; 50'）隔开的源极区域和漏极区域（4和5; 4'和5'），并且两者都与同一表面（3a ）的半导体本体。在延伸在半导体本体中的沟槽（80; 80'; 80“）内提供绝缘栅极结构（7; 70'; 700）。栅极结构具有通过介电层（70a; 70'a）与沟槽隔开的栅极导电区域（70b; 70'b; 70'b），使得导电沟道容纳部分（60; 60'）主体区域沿着沟槽的至少侧壁（80a; 80'a; 80'a）并且在源极（4; 4'）和漏极漂移（50; 50'）区域之间延伸。沟槽从主体区域延伸到漏极漂移区域（50; 50'）中，并且电介质层至少在沟槽的侧壁（80a; 80'a; 80'a）上具有较大的厚度延伸到漏极漂移区（50; 50'）中的沟槽部分比在沟槽的其余部分中延伸，使得栅极导电区域的延伸部（71; 71'; 71“; 710）朝向漏极区域（5; 5'）的漏极漂移区域（50; 50'）形成场板。

42. 发明公开

EP1190453A2 FIELD-EFFECT SEMICONDUCTOR DEVICES 审中-公开
标题翻译：场效应半导体安排
公开(公告)号：EP1190453A2
公开(公告)日：2002-03-27
申请号：EP01911709.2
申请日：2001-02-28
申请人： Koninklijke Philips Electronics N.V.
发明人： HUETING, Raymond, J., E. , HIJZEN, Erwin, A. , VAN DALEN, Rob
IPC分类号： H01L29/78 , H01L29/417 , H01L29/812
CPC分类号： H01L29/7813 , H01L27/088 , H01L29/0653 , H01L29/0696 , H01L29/41741 , H01L29/41766 , H01L29/42368 , H01L29/4238 , H01L29/456 , H01L29/7809 , H01L29/7811 , H01L29/7827 , H01L29/8122
摘要： A field-effect semiconductor device, for example a MOSFET of the trench-gate type, comprises side-by-side device cells at a surface (10a) of a semiconductor body (10), and at least one drain connection (41) that extends in a drain trench (40) from the body surface (10a) to an underlying drain region (14a). A channel-accommodating region (15) of the device extends laterally to the drain trench (40). The drain trench (40) extends through the thickness of the channel-accommodating region (15) to the underlying drain region (14a), and the drain connection (41) is separated from the channel-accommodating region (15) by an intermediate insulating layer (24) on side-walls of the drain trench (40). A compact cellular layout can be achieved, with a significant proportion of the total cellular layout area accommodating conduction channels (12). The configuration in a discrete device avoids a need to use a substrate conduction path and so advantageously reduces the ON resistance of the device.

43. 发明公开

EP1066652A2 TRENCH-GATE SEMICONDUCTOR DEVICES AND THEIR MANUFACTURE 有权
标题翻译：沟槽栅半导体器件和方法生产同样
公开(公告)号：EP1066652A2
公开(公告)日：2001-01-10
申请号：EP99956024.6
申请日：1999-11-16
申请人： Koninklijke Philips Electronics N.V.
发明人： HURKX, Godefridus, A., M. , HUETING, Raymond, J., E.
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7813 , H01L21/2255 , H01L29/0634 , H01L29/0878 , H01L29/0886 , H01L29/42368
摘要： In a trench-gate semiconductor device, for example a cellular power MOSFET, the gate (11) is present in a trench (20) that extends through the channel-accommodating region (15) of the device. An underlying body portion (16) that carries a high voltage in an off state of the device is present adjacent to a side wall of a lower part (20b) of the trench (20). Instead of being a single high-resistivity region, this body portion (16) comprises first regions (61) of a first conductivity type interposed with second regions (62) of the opposite second conductivity type. In the conducting state of the device, the first regions (61) provide parallel current paths through the thick body portion (16), from the conduction channel (12) in the channel-accommodating region (15). In an off-state of the device, the body portion (16) carries a depletion layer (50). The first region (61) of this body portion (16) is present between the second region (62) and the side wall (22) of the lower part (20b) of the trench (20) and has a doping concentration (Nd) of the first conductivity type that is higher than the doping concentration (Na) of the second conductivity type of the second region (62). A balanced space charge is nonetheless obtained by depletion of the first and second regions (61, 62), because the width (W1) of the first region (61) is made smaller than the width (W2) of the lower-doped second region (62). This device structure can have a low on-resistance and high breakdown voltage, while also permitting its commercial manufacture using dopant out-diffusion from the lower trench part (20b) into the lower-doped second region (62) to form the first region (61).

44. 发明授权

EP1066652B1 TRENCH-GATE SEMICONDUCTOR DEVICES AND THEIR MANUFACTURE 有权
标题翻译：沟槽栅半导体器件和方法生产同样
公开(公告)号：EP1066652B1
公开(公告)日：2007-05-09
申请号：EP99956024.6
申请日：1999-11-16
申请人： Koninklijke Philips Electronics N.V.
发明人： HURKX, Godefridus, A., M. , HUETING, Raymond, J., E.
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7813 , H01L21/2255 , H01L29/0634 , H01L29/0878 , H01L29/0886 , H01L29/42368
摘要： In a trench-gate semiconductor device, for example a cellular power MOSFET, the gate (11) is present in a trench (20) that extends through the channel-accommodating region (15) of the device. An underlying body portion (16) that carries a high voltage in an off state of the device is present adjacent to a side wall of a lower part (20b) of the trench (20). Instead of being a single high-resistivity region, this body portion (16) comprises first regions (61) of a first conductivity type interposed with second regions (62) of the opposite second conductivity type. In the conducting state of the device, the first regions (61) provide parallel current paths through the thick body portion (16), from the conduction channel (12) in the channel-accommodating region (15). In an off-state of the device, the body portion (16) carries a depletion layer (50). The first region (61) of this body portion (16) is present between the second region (62) and the side wall (22) of the lower part (20b) of the trench (20) and has a doping concentration (Nd) of the first conductivity type that is higher than the doping concentration (Na) of the second conductivity type of the second region (62). A balanced space charge is nonetheless obtained by depletion of the first and second regions (61, 62), because the width (W1) of the first region (61) is made smaller than the width (W2) of the lower-doped second region (62). This device structure can have a low on-resistance and high breakdown voltage, while also permitting its commercial manufacture using dopant out-diffusion from the lower trench part (20b) into the lower-doped second region (62) to form the first region (61).

45. 发明公开

EP1692726A2 TRENCH INSULATED GATE FIELD EFFECT TRANSISTOR 审中-公开
标题翻译：带门DRAHTISOLIERTEM场效应晶体管
公开(公告)号：EP1692726A2
公开(公告)日：2006-08-23
申请号：EP04799252.4
申请日：2004-11-26
申请人： Koninklijke Philips Electronics N.V.
发明人： HUETING, Raymond, J., E. , HIJZEN, Erwin, A.
IPC分类号： H01L29/78 , H01L29/08 , H01L29/41 , H01L29/423 , H01L29/36
CPC分类号： H01L29/7813 , H01L29/0696 , H01L29/0847 , H01L29/0878 , H01L29/402 , H01L29/407 , H01L29/41766 , H01L29/42368 , H01L29/42376 , H01L29/4238 , H01L29/4916
摘要： The invention relates to a trench MOSFET with drain ( 8 ), drift ( 10 ) body ( 12 ) and source ( 14 ) regions. The drift region is doped to have a high concentration gradient. A field plate electrode ( 34 ) is provided adjacent to the drift region ( 10 ) and a gate electrode ( 32 ) next to the body region ( 12 ).

46. 发明公开

EP1692725A2 TRENCH INSULATED GATE FIELD EFFECT TRANSISTOR 有权
标题翻译：具有隔离沟槽栅场效应晶体管
公开(公告)号：EP1692725A2
公开(公告)日：2006-08-23
申请号：EP04799251.6
申请日：2004-11-26
申请人： Koninklijke Philips Electronics N.V.
发明人： HUETING, Raymond, J., E.
IPC分类号： H01L29/78 , H01L29/10 , H01L29/41 , H01L29/423
CPC分类号： H01L29/1095 , H01L29/0696 , H01L29/402 , H01L29/407 , H01L29/4232 , H01L29/42368 , H01L29/4238 , H01L29/7827 , H01L29/7831
摘要： The invention relates to a trench MOSFET with drain (8), sub-channel region (10) body (12) and source (14). The sub-channel region is doped to be the same conductivity type as the body (12), but of lower doping density. A field plate electrode (34) is provided adjacent to the sub-channel region (10) 10 and a gate electrode (32) next to the body (12).

47. 发明公开

EP1449256A1 A FIELD EFFECT TRANSISTOR SEMICONDUCTOR DEVICE 有权
标题翻译：场效应晶体管的半导体器件
公开(公告)号：EP1449256A1
公开(公告)日：2004-08-25
申请号：EP02781506.7
申请日：2002-11-13
申请人： Koninklijke Philips Electronics N.V.
发明人： HUETING, Raymond, J., E. , SLOTBOOM, Jan, W. , MAGNEE, Petrus, H., C.
IPC分类号： H01L29/06 , H01L29/08
CPC分类号： H01L29/7813 , H01L29/0653 , H01L29/405 , H01L29/407 , H01L29/408 , H01L29/4236 , H01L29/66696 , H01L29/66727 , H01L29/7395 , H01L29/7722 , H01L29/7787 , H01L29/7803 , H01L29/7806 , H01L29/7824 , H01L29/7825 , H01L29/812 , H01L29/8122
摘要： A field effect transistor semiconductor device (1) comprises a source region (33), a drain region (14) and a drain drift region (11), the device having a field shaping region (20) adjacent the drift region (11) and arranged such that, in use, when a voltage is applied between the source (33) and drain (14) regions and the device is non-conducting, a substantially constant electric field is generated in the field shaping region (20) and accordingly in the adjacent drift region (11). The field shaping region (20), which may be intrinsic semiconductor, is arranged to function as a capacitor dielectric region (20) between a first capacitor electrode region (21) and a second capacitor electrode region (22), the first and second capacitor electrode regions (21, 22) being adjacent respective ends of the dielectric region (20) and having different electron energy barriers. The first and second capacitor electrode regions (21, 22) may be opposite conductivity semiconductor regions, or they may be a semiconductor region (21) and a Schottky barrier region (224, FIG. 4). The device may be an insulated gate device (1, 13, 15, 17, 171, 172, 19, 12) particularly suitable for high or low voltage DC power applications, or a Schottky gate device (181, 182, 183) particularly suitable for RF applications.

48. 发明公开

EP1430538A2 EDGE TERMINATION IN MOS TRANSISTORS 审中-公开
标题翻译： MOS晶体管的边缘终结
公开(公告)号：EP1430538A2
公开(公告)日：2004-06-23
申请号：EP02762709.0
申请日：2002-09-03
申请人： Koninklijke Philips Electronics N.V.
发明人： HUETING, Raymond, J., E. , HIJZEN, Erwin, A. , IN 'T ZANDT, Erwin, A., A.
IPC分类号： H01L29/78 , H01L29/739 , H01L29/423 , H01L29/41
CPC分类号： H01L29/7813 , H01L29/0696 , H01L29/402 , H01L29/407 , H01L29/4236 , H01L29/4238 , H01L29/7397 , H01L29/7811
摘要： A RESURF trench gate MOSFET has a sufficiently small pitch (close spacing of neighbouring trenches) that intermediate areas of the drain drift region are depleted in the blocking condition of the MOSFET. However, premature breakdown can still occur in this known device structure at the perimeter/edge of the active device area and/or adjacent the gate bondpad. To counter premature breakdown, the invention adopts two principles: the gate bondpad is either connected to an underlying stripe trench network surrounded by active cells, or is directly on top of the active cells, and a compatible 2D edge termination scheme is provided around the RESURF active device area. These principles can be implemented in various cellular layouts e.g. a concentric annular device geometry, which may be circular or rectangular or ellipsoidal, in the active area and in the edge termination, or a device array of such concentric hexagonal or circular stripe cells, or a device array of square active cells with stripe edge cells, or a device array of hexagonal active cells with an edge termination of hexagonal edge cells.
摘要翻译： RESURF沟槽栅MOSFET具有足够小的间距（相邻沟槽的紧密间隔），使得漏极漂移区的中间区域在MOSFET的阻塞条件下被耗尽。然而，在有源器件区域的周边/边缘和/或邻近栅焊盘的这种已知器件结构中仍然会发生过早击穿。为了防止过早击穿，本发明采用两个原理：栅极键合垫连接到由有源单元围绕的下面的条形沟槽网络，或者直接在有源单元的顶部，并且在RESURF周围提供可兼容的2D边缘终端方案有源器件面积。这些原理可以在各种蜂窝布局中实现，例如在有源区域和边缘终端中可以是圆形或矩形或椭圆形的同心环形器件几何形状，或者这种同心六边形或圆形条纹单元的器件阵列，或者具有条纹边缘单元的正方形有源单元的器件阵列或者具有六边形边缘单元的边缘终止的六边形活动单元的器件阵列。

49. 发明公开

EP1314195A2 METHOD OF MANUFACTURING A TRENCH-GATE SEMICONDUCTOR DEVICE AND CORRESPONDING DEVICE 审中-公开
标题翻译：方法用于生产具有沟槽栅和有关安排一个功率半导体装置
公开(公告)号：EP1314195A2
公开(公告)日：2003-05-28
申请号：EP01960654.0
申请日：2001-08-09
申请人： Koninklijke Philips Electronics N.V.
发明人： HUETING, Raymond, J., E. , HIJZEN, Erwin, A. , IN 'T ZANDT, Michael, A., A.
IPC分类号： H01L21/336 , H01L21/331 , H01L21/8242 , H01L21/338 , H01L29/78 , H01L29/739 , H01L27/108 , H01L29/812
CPC分类号： H01L29/66348 , H01L27/10841 , H01L27/10876 , H01L29/66666 , H01L29/66848
摘要： The manufacture of a trench-gate semiconductor device, for example a power transistor or a memory device includes the steps of forming at a surface (10a) of a semiconductor body (10) a first mask (51) having a first window (51a), providing a thin layer of a second material (52) in the first window (51a), forming an intermediate mask (53A, 53B) of a third material having curved sidewalls and using the intermediate mask (53A, 53B) to form two L-shaped parts (52A, 52D and 52B, 52E) of the second material with a second window (52a) which is used to etch a trench-gate trench (20). The rectangular base portion (52D, 52E) of each L-shaped part ensures that the trench (20) is maintained narrow during etching. Narrow trenches are advantageous for low specific on-resistance and low RC delay in low voltage cellular trench-gate power transistors. Narrow deep trenches are also advantageous for cell density in DRAM devices where a memory cell has a switching transistor cell surrounded by a trench-gate and a storage capacitor in a lower part of the same trench.

50. 发明公开

EP1292989A1 A SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：EP1292989A1
公开(公告)日：2003-03-19
申请号：EP01943265.7
申请日：2001-04-19
申请人： Koninklijke Philips Electronics N.V.
发明人： HUETING, Raymond, J., E. , HIJZEN, Erwin, A.
IPC分类号： H01L29/06 , H01L29/423 , H01L29/78 , H01L29/417
CPC分类号： H01L29/785 , H01L21/823418 , H01L21/823437 , H01L29/0657 , H01L29/41725 , H01L29/42384 , H01L29/66621 , H01L29/66795 , H01L29/78 , H01L29/7835
摘要： A semiconductor device comprises one or more field effect devices (FD) having source and drain regions (5 and 6) spaced apart by a body region (3a). A gate structure (7a, 7b), preferably in a trench (4), controls a conduction channel in a portion (3b) of the body region (3a) between the source and drain regions. The device has one or more mesa structures (100) having end and side walls (100a to 100d). The body region (3a) extends between and meets at least the side walls (100c and 100d) of the mesa structure. The gate structure (7a, 7b) extends along and between the side walls such that the conduction channel accommodating portion (3b) extends along and between the side walls (100c and 100d). The source and drain regions (5 and 6) meet respective end walls (100a and 100b) of the mesa structure and/or its side walls (100c and 100d). At the mesa walls, a source electrode (S) contacts the source region (5) and a drain electrode (D) contacts the drain region (6). (FIGS. 12 and 13)
摘要翻译：半导体器件包括一个或多个场效应器件（FD），其具有由体区（3a）隔开的源区和漏区（5和6）。优选在沟槽（4）中的栅极结构（7a，7b）控制源极和漏极区之间的体区（3a）的部分（3b）中的导电沟道。该装置具有一个或多个具有端壁和侧壁（100a至100d）的台面结构（100）。本体区域（3a）在台面结构的至少侧壁（100c和100d）之间延伸并与之相遇。栅极结构（7a，7b）沿着侧壁并且在侧壁之间延伸，使得导电沟道容纳部分（3b）沿着侧壁（100c和100d）并且在侧壁之间延伸。源区和漏区（5和6）与台面结构和/或其侧壁（100c和100d）的相应端壁（100a和100b）相接。在台面壁处，源电极（S）接触源极区域（5）并且漏电极（D）接触漏极区域（6）。

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