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    • 42. 发明授权
    • Plane type strip-line filter in which strip line is shortened and mode resonator in which two types microwaves are independently resonated
    • 平面型带状滤波器,其中带状线被缩短,双模谐振器,其中两种类型的微波被独立谐振
    • US06201458B1
    • 2001-03-13
    • US09262645
    • 1999-03-04
    • Michiaki MatsuoMorikazu SagawaMitsuo Makimoto
    • Michiaki MatsuoMorikazu SagawaMitsuo Makimoto
    • H01P120
    • H01P1/20381H01P7/082H01P7/084
    • A strip-line filter is provided with upper- and lower-stage resonators having the same electromagnetic characteristics. Each of the resonators has a one-wavelength square-shaped strip line and four open-end transmission lines connected to four coupling points A,C,B and D (or E,G,F and H) of each resonator which are spaced 90 degrees in electric length in that order. The square-shaped strip lines have a pair of parallel coupling lines closely placed in parallel to each other to electromagnetically couple the resonators. Therefore, the filter can be manufactured in a small size. A first microwave resonated in each resonator is electromagnetically influenced by two open-end transmission lines connected to two coupling points A and B (or E and F), and a second microwave resonated in each resonator is electromagnetically influenced by two open-end transmission lines connected to two coupling points C and D (or G and H). Therefore, resonance wavelengths of the microwaves can be longer than a line length of each square-shaped strip line. Also, the resonance wavelengths can be adjusted by trimming the transmission lines. Also, because all constitutional elements are made of strip lines, the filter can be made plane.
    • 带状滤波器设置有具有相同电磁特性的上级和下级谐振器。 每个谐振器具有单波长方形带状线和连接到每个谐振器的四个耦合点A,C,B和D(或E,G,F和H)的四个开路端传输线,其间隔开90° 电气长度的顺序。 方形带状线具有彼此平行地紧密放置的一对平行的耦合线,以电磁耦合谐振器。 因此,过滤器可以制造成小尺寸。 在每个谐振器中谐振的第一微波由两个连接到两个耦合点A和B(或E和F)的开路传输线进行电磁学影响,并且每个谐振器中谐振的第二微波由两个开路传输线 连接到两个耦合点C和D(或G和H)。 因此,微波的共振波长可以比每个方形带状线的线长长。 此外,可以通过修整传输线来调节谐振波长。 另外,由于所有的构成元件均由带状线制成,所以可以将滤光片制成平面。
    • 43. 发明授权
    • Pulse-sync demodulator
    • 脉冲同步解调器
    • US08755468B2
    • 2014-06-17
    • US12374737
    • 2007-07-27
    • Michiaki MatsuoHideki AoyagiHitoshi AsanoKazuya Toki
    • Michiaki MatsuoHideki AoyagiHitoshi AsanoKazuya Toki
    • H04L27/06
    • H04L7/033H03L7/0807H03L7/0812H04B1/717H04B1/7183H04L7/0037
    • A received pulse signal based on an on-off keying modulation scheme is alternately sampled by AD conversion sections operated by a clock signal whose frequency is one-half of a transmission rate. In the synchronization, amounts of delay in sampling timing adjustment sections are made different from each other, whereby phases of two different points in a symbol pulse are sampled. An amount of delay in a variable delay section is adjusted in accordance with a result of comparison of the sampled values, thereby achieving synchronization. At the time of demodulation, the amount of delay in the variable delay section is held, and the amounts of delay in the sampling timing adjustment sections are switched to the same value, and the symbol pulse is alternately sampled. The sampled values are subjected to threshold value determination, and the determination result is subjected to parallel-to-serial conversion, whereby a demodulation output is acquired.
    • 基于开关键控调制方式的接收脉冲信号由频率为传输速率的二分之一的时钟信号操作的AD转换部分交替采样。 在同步中,采样定时调整部分中的延迟量彼此不同,从而对符号脉冲中两个不同点的相位进行采样。 根据采样值的比较结果调整可变延迟部分的延迟量,从而实现同步。 在解调时,保持可变延迟部分中的延迟量,并将采样定时调整部分中的延迟量切换到相同的值,并且对符号脉冲进行交替采样。 对采样值进行阈值判定,对判定结果进行并行到串行转换,从而得到解调输出。
    • 44. 发明申请
    • HIGH SPEED HIGH RESOLUTION WIDE RANGE LOW POWER ANALOG CORRELATOR AND RADAR SENSOR
    • 高速高分辨率宽范围低功率模拟调节器和雷达传感器
    • US20120306687A1
    • 2012-12-06
    • US13151169
    • 2011-06-01
    • Michiaki Matsuo
    • Michiaki Matsuo
    • G01S13/00
    • G01S13/284G01S7/2926
    • A high speed high dynamic range and low power consumption analog correlator for use in a radar sensor. The analog correlator combines various pulse replication schemes with various parallel integrator architectures to improve the detection speed, dynamic range, and power consumption of conventional radar sensors. The analog correlator includes a replica generator, a multiplier, and an integrator module. The replica generator generates a template signal having a plurality of replicated pulse compression radar (PCR) pulses. The multiplier multiplies a received PCR signal with the plurality of replicated PCR pulses. The integrator module is coupled to the multiplier and configured to generate a plurality of analog correlation signals, each of which is based on the multiplying between the received PCR signal and one of the replicated PCR pulses.
    • 用于雷达传感器的高速高动态范围和低功耗模拟相关器。 模拟相关器将各种脉冲复制方案与各种并行积分器架构相结合,以提高传统雷达传感器的检测速度,动态范围和功耗。 模拟相关器包括复制发生器,乘法器和积分器模块。 复制发生器产生具有多个复制脉冲压缩雷达(PCR)脉冲的模板信号。 乘法器将接收的PCR信号与多个复制的PCR脉冲相乘。 积分器模块耦合到乘法器并且被配置为产生多个模拟相关信号,每个模拟相关信号基于接收的PCR信号与复制的PCR脉冲之一的乘法。
    • 46. 发明授权
    • Variable delay apparatus
    • 可变延迟装置
    • US07898312B2
    • 2011-03-01
    • US12376024
    • 2007-08-07
    • Hideki AoyagiHitoshi AsanoKazuya TokiMichiaki MatsuoSuguru Fujita
    • Hideki AoyagiHitoshi AsanoKazuya TokiMichiaki MatsuoSuguru Fujita
    • H03H11/26
    • H03K5/133H03K2005/00058
    • It is an object of the invention to provide a variable delay apparatus in which, even immediately after the delay amount of the variable delay apparatus is changed, a signal of a timing that is different from a set delay amount is not output. The variable delay apparatus of the invention includes: a variable delay block 108 having N (N is a natural number) delay elements 101a to 101n, and N selectors 102a to 102n; a variable delay block 109 having N delay elements 103a to 103n, and N selectors 104a to 104n; and a selector 107. After selection signals 105a to 105n and 106a to 106n are changed, and after an output timing of a delay amount set by the variable delay blocks 108, 109 is attained, the signal to be output is switched by the selector 107, thereby avoiding a situation where, immediately after the delay amount is changed, a signal of a timing that is different from the set delay amount is output as an output signal.
    • 本发明的目的是提供一种可变延迟装置,其中即使在可变延迟装置的延迟量之后立即改变与设置的延迟量不同的定时信号也不被输出。 本发明的可变延迟装置包括:具有N(N是自然数)延迟元件101a至101n的可变延迟块108和N个选择器102a至102n; 具有N个延迟元件103a〜103n的可变延迟块109和N个选择器104a〜104n; 在选择信号105a至105n和106a至106n改变之后,并且在达到由可变延迟块108,109设置的延迟量的输出定时之后,通过选择器107切换要输出的信号 ,从而避免了在延迟量变化之后立即输出与设定的延迟量不同的定时的信号作为输出信号的情况。
    • 47. 发明授权
    • Frequency dividing circuit and multimode radio device using the same
    • 分频电路和使用其的多模无线电设备
    • US07816953B2
    • 2010-10-19
    • US10596820
    • 2005-03-02
    • Yoshifumi HosokawaNoriaki SaitoMichiaki MatsuoYoshito Shimizu
    • Yoshifumi HosokawaNoriaki SaitoMichiaki MatsuoYoshito Shimizu
    • H03B19/00
    • H04B1/0082H03D7/166
    • A frequency dividing section is made up of a frequency divider for dividing output of a local oscillator, a frequency divider for dividing output of an in-phase local oscillation signal of the frequency divider, and a dummy circuit connected to the output terminal of a quadrature local oscillation signal of the frequency divider. At the first frequency band operation time, output of the frequency divider is used for modulation and demodulation and at the second frequency band operation time, output of the frequency divider is used for modulation and demodulation. Although the frequency divider is shared between the first and second frequency bands, the dummy circuit is made the same circuit as an input amplifier of the frequency divider at the first frequency band operation time, so that the phase difference between the in-phase local oscillation signal and the quadrature local oscillation signal output by the frequency divider can be kept. Accordingly, the frequency dividers are shared and combined for lessening the circuit scale.
    • 分频部由用于分频本地振荡器的分频器,用于分频分频器的同相本地振荡信号的输出的分频器和连接到正交的输出端子的虚拟电路组成 分频器的本地振荡信号。 在第一频带操作时间,分频器的输出用于调制和解调,并且在第二频带操作时间,分频器的输出用于调制和解调。 虽然在第一和第二频带之间共享分频器,但是在第一频带操作时间,虚设电路与分频器的输入放大器相同,使得同相局部振荡 可以保持由分频器输出的信号和正交本地振荡信号。 因此,分频器被共享并组合以减小电路规模。
    • 48. 发明申请
    • VARIABLE DELAY APPARATUS
    • 可变延迟装置
    • US20090315605A1
    • 2009-12-24
    • US12376024
    • 2007-08-07
    • Hideki AoyagiHitoshi AsanoKazuya TokiMichiaki MatsuoSuguru Fujita
    • Hideki AoyagiHitoshi AsanoKazuya TokiMichiaki MatsuoSuguru Fujita
    • H03H11/26
    • H03K5/133H03K2005/00058
    • It is an object of the invention to provide a variable delay apparatus in which, even immediately after the delay amount of the variable delay apparatus is changed, a signal of a timing that is different from a set delay amount is not output. The variable delay apparatus of the invention includes: a variable delay block 108 having N (N is a natural number) delay elements 101a to 101n, and N selectors 102a to 102n; a variable delay block 109 having N delay elements 103a to 103n, and N selectors 104a to 104n; and a selector 107. After selection signals 105a to 105n and 106a to 106n are changed, and after an output timing of a delay amount set by the variable delay blocks 108, 109 is attained, the signal to be output is switched by the selector 107, thereby avoiding a situation where, immediately after the delay amount is changed, a signal of a timing that is different from the set delay amount is output as an output signal.
    • 本发明的目的是提供一种可变延迟装置,其中即使在可变延迟装置的延迟量之后立即改变与设置的延迟量不同的定时信号也不被输出。 本发明的可变延迟装置包括:具有N(N是自然数)延迟元件101a至101n的可变延迟块108和N个选择器102a至102n; 具有N个延迟元件103a〜103n的可变延迟块109和N个选择器104a〜104n; 在选择信号105a至105n和106a至106n改变之后,并且在达到由可变延迟块108,109设置的延迟量的输出定时之后,通过选择器107切换要输出的信号 ,从而避免了在延迟量变化之后立即输出与设定的延迟量不同的定时的信号作为输出信号的情况。
    • 49. 发明申请
    • Variable Matching Circuit
    • 可变匹配电路
    • US20080238569A1
    • 2008-10-02
    • US11568188
    • 2005-04-19
    • Michiaki Matsuo
    • Michiaki Matsuo
    • H03H7/38
    • H03H7/40H04B1/18
    • A variable matching circuit includes a variable capacitance circuit formed of a capacitor coupled to varactor diode and provided between terminals, and a resonator-type circuit includes a plurality of inductors and a variable capacitance circuit formed of a capacitor and a varactor diode. The inductors and the variable capacitance circuit are coupled in parallel together. The resonator-type circuit is connected in shunt with the terminal. The foregoing structure forms an L-type matching circuit. The bias of the varactor diodes can be thus varied, and plural values of the inductance of the resonator-type circuit can be switched over with a FET. The variable matching circuit can electrically control an impedance conversion available for wider ranges of frequency bandwidths.
    • 可变匹配电路包括由耦合到变容二极管并且设置在端子之间的电容器形成的可变电容电路,并且谐振器型电路包括多个电感器和由电容器和变容二极管形成的可变电容电路。 电感器和可变电容电路并联在一起。 谐振器型电路与端子分流连接。 上述结构形成L型匹配电路。 因此可以改变变容二极管的偏置,并且谐振器型电路的电感的多个值可以用FET切换。 可变匹配电路可以电控制可用于更宽范围的频率带宽的阻抗转换。
    • 50. 发明申请
    • Radio Communication Device
    • 无线电通信设备
    • US20080051129A1
    • 2008-02-28
    • US11629387
    • 2005-06-13
    • Katsuaki AbeMichiaki MatsuoNoriaki SaitoTakenori SakamotoAkihiko Matsuoka
    • Katsuaki AbeMichiaki MatsuoNoriaki SaitoTakenori SakamotoAkihiko Matsuoka
    • H04M1/00
    • H04W88/06H04B1/0003
    • There are provided a plurality of systems of reconfigurable radio processing unit (102) whose function and performance can be modified. A control unit (104) collects quality information on the communication link in communication methods received at respective radio processing systems (102a, 102b). According to this, the control unit (104) selects an optimal communication method and transmission mode from a plurality of communication methods and transmission modes (for example, diversity transmission between a plurality of systems, diversity transmission by a single communication method, and MIMO channel multiplex transmission). By modifying configurations of the reconfigurable radio processing unit (102) according to the selected communication method and transmission mode, it is possible to communicate at a desired transmission mode. Thus, it is possible to perform an optimal transmission to the communication link according to the quality condition and other request condition.
    • 提供了多个可重构无线电处理单元(102)的系统,其功能和性能可以被修改。 控制单元(104)在各个无线电处理系统(102a,102b)处接收的通信方法中收集关于通信链路的质量信息。 据此,控制单元(104)从多个通信方式和发送模式(例如,多个系统之间的分集发送,单个通信方式的分集发送,以及MIMO信道 多路传输)。 通过根据所选择的通信方法和传输模式修改可重构无线电处理单元(102)的配置,可以以期望的传输模式进行通信。 因此,可以根据质量条件和其他请求条件向通信链路执行最佳传输。