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    • 42. 发明申请
    • METHOD FOR MANUFACTURING SOI SUBSTRATE
    • 制造SOI衬底的方法
    • US20100087044A1
    • 2010-04-08
    • US12567993
    • 2009-09-28
    • Takeshi ShichiJunichi KoezukaHideto OhnumaShunpei Yamazaki
    • Takeshi ShichiJunichi KoezukaHideto OhnumaShunpei Yamazaki
    • H01L21/762
    • H01L27/1266H01L21/76254H01L27/1214H01L29/66772
    • The present invention provides a method for manufacturing an SOI substrate, to improve planarity of a surface of a single crystal semiconductor layer after separation by favorably separating a single crystal semiconductor substrate even in the case where a non-mass-separation type ion irradiation method is used, and to improve planarity of a surface of a single crystal semiconductor layer after separation as well as to improve throughput. The method includes the steps of irradiating a single crystal semiconductor substrate with accelerated ions by an ion doping method while the single crystal semiconductor substrate is cooled to form an embrittled region in the single crystal semiconductor substrate; bonding the single crystal semiconductor substrate and a base substrate with an insulating layer interposed therebetween; and separating the single crystal semiconductor substrate along the embrittled region to form a single crystal semiconductor layer over the base substrate with the insulating layer interposed therebetween.
    • 本发明提供一种制造SOI衬底的方法,即使在非质量分离型离子照射方法为非质子分离型离子照射方法的情况下,通过有利地分离单晶半导体衬底来提高分离后的单晶半导体层的表面的平面性 并且在分离之后提高单晶半导体层的表面的平面性以及提高生产量。 该方法包括以下步骤:当单晶半导体衬底被冷却以在单晶半导体衬底中形成脆化区域时,通过离子掺杂方法照射具有加速离子的单晶半导体衬底; 将单晶半导体衬底和基底衬底之间插入绝缘层; 并且沿着脆化区域分离单晶半导体衬底,以在基底衬底上形成绝缘层,形成单晶半导体层。
    • 44. 发明授权
    • Doping method and method for fabricating thin film transistor
    • 用于制造薄膜晶体管的掺杂方法和方法
    • US07250312B2
    • 2007-07-31
    • US10910623
    • 2004-08-04
    • Junichi KoezukaNaoto Yamade
    • Junichi KoezukaNaoto Yamade
    • H01L21/66G01R31/26
    • H01L22/24H01L27/12H01L27/1285H01L27/1292Y10S438/914
    • It is an object of the present invention to provide a doping apparatus, a doping method, and a method for fabricating a thin film transistor that can carry out doping to the carrier concentration which is optimum for obtaining the desired electric characteristic non-destructively and in an easy manner. In accordance with the present invention, an electric characteristic of a semiconductor element (threshold voltage in a transistor and the like) is correctly and precisely monitored by using a contact angle, and is controlled by controlling a doping method. In addition, the present invention can be momentarily acquired information by in-situ monitoring the characteristic and can be fed back without a time lag.
    • 本发明的目的是提供一种掺杂装置,掺杂方法和制造薄膜晶体管的方法,所述薄膜晶体管可以对载流子浓度进行掺杂,这对于非破坏性地获得所需的电特性是最佳的 一个简单的方式。 根据本发明,通过使用接触角正确且精确地监测半导体元件的电特性(晶体管等中的阈值电压),并且通过控制掺杂方法来控制。 此外,本发明可以通过原位监测特性而瞬间获取信息,并且可以在没有时间延迟的情况下反馈。
    • 46. 发明申请
    • Doping method and method of manufacturing field effect transistor
    • 掺杂方法和制造场效应晶体管的方法
    • US20060177996A1
    • 2006-08-10
    • US11346378
    • 2006-02-03
    • Junichi KoezukaNaoki Suzuki
    • Junichi KoezukaNaoki Suzuki
    • H01L21/26H01L21/42
    • H01L29/78621H01L21/26513H01L29/66757
    • A doping method comprising the steps of; obtaining a proportion X of ions of a compound including a donor or an acceptor impurity in total ions from mass spectrum by using a first source gas of a first concentration; analyzing a peak concentration Y of the compound in a first processing object which is doped by using a second source gas of a second concentration equal to or lower than the first concentration, referring to a dose amount of total ions as Do and setting an acceleration voltage at a value, obtaining a dose amount D1 of total ions from a expression, Y=(D1/D0)(aX+b), and doping a second processing object with the donor or the acceptor impurity by a ion doping apparatus using a third source gas, wherein a dose amount of total ions is set at D1, and an acceleration voltage is set at the value.
    • 一种掺杂方法,包括以下步骤: 通过使用第一浓度的第一源气体从质谱获得包含供体或受体杂质的化合物的离子的比例X; 分析通过使用等于或低于第一浓度的第二浓度的第二源气体掺杂的第一处理对象中的化合物的峰浓度Y,参考总离子的剂量为Do并设定加速电压 从表达式获得总离子的剂量D D 1,其中Y =(D 1 / D O 0)(aX + b),并且通过使用第三源气体的离子掺杂装置用施主或受体杂质掺杂第二处理对象,其中总离子的剂量量设定为D 1,加速度 电压设定在该值。
    • 48. 发明授权
    • Semiconductor device
    • 半导体器件
    • US08709922B2
    • 2014-04-29
    • US13448611
    • 2012-04-17
    • Junichi KoezukaNaoto YamadeKyoko YoshiokaYuhei SatoMari Terashima
    • Junichi KoezukaNaoto YamadeKyoko YoshiokaYuhei SatoMari Terashima
    • H01L29/786H01L29/66
    • H01L29/66969H01L21/02667H01L29/78606H01L29/78693
    • A highly reliable semiconductor device which is formed using an oxide semiconductor and has stable electric characteristics is provided. A semiconductor device which includes an amorphous oxide semiconductor layer including a region containing oxygen in a proportion higher than that in the stoichiometric composition, and an aluminum oxide film provided over the amorphous oxide semiconductor layer is provided. The amorphous oxide semiconductor layer is formed as follows: oxygen implantation treatment is performed on a crystalline or amorphous oxide semiconductor layer which has been subjected to dehydration or dehydrogenation treatment, and then thermal treatment is performed on the oxide semiconductor layer provided with an aluminum oxide film at a temperature lower than or equal to 450° C.
    • 提供了使用氧化物半导体形成且具有稳定的电特性的高度可靠的半导体器件。 提供一种半导体器件,其包括非晶氧化物半导体层,所述非晶氧化物半导体层包括含有比所述化学计量组成中高的比例的氧的区域和设置在所述非晶氧化物半导体层上的氧化铝膜。 无定形氧化物半导体层如下形成:对已进行脱水或脱氢处理的结晶或非晶氧化物半导体层进行氧注入处理,然后对设置有氧化铝膜的氧化物半导体层进行热处理 在低于或等于450℃的温度下