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41. 发明授权

US08760217B2 Semiconductor device having on-chip voltage regulator 有权
标题翻译：具有片上稳压器的半导体器件
公开(公告)号：US08760217B2
公开(公告)日：2014-06-24
申请号：US13034845
申请日：2011-02-25
申请人： Lew G. Chua-Eoan , Charlie Matar , Matthew L. Severson , Xiaohua Kong
发明人： Lew G. Chua-Eoan , Charlie Matar , Matthew L. Severson , Xiaohua Kong
IPC分类号： G11C5/14
CPC分类号： G06F1/26 , G06F1/3296 , H03K19/0016 , Y02D10/172
摘要： A semiconductor device having an on-chip voltage regulator to control on-chip voltage regulation and methods for on-chip voltage regulation are disclosed. A semiconductor device includes a circuit positioned between a ground bus and a power bus. A power switch array is positioned between the circuit and one of the ground bus or the power bus to generate a virtual voltage across the circuit. A monitor is positioned between the ground bus and the power bus. The monitor is configured to simulate a critical path of the circuit and to output a voltage adjust signal based on an output of the simulated critical path. A controller is configured to receive the voltage adjust signal and to output a control signal to the power switch array to control the virtual voltage.
摘要翻译：公开了一种具有用于控制片上电压调节的片上电压调节器和片上电压调节方法的半导体器件。半导体器件包括位于接地总线和电源总线之间的电路。电源开关阵列位于电路和其中一个接地总线或电源总线之间，以在电路两端产生虚拟电压。监视器位于接地总线和电源总线之间。监视器被配置为模拟电路的关键路径并且基于模拟关键路径的输出来输出电压调整信号。控制器被配置为接收电压调整信号并将控制信号输出到电源开关阵列以控制虚拟电压。

42. 发明授权

US07936205B2 Leakage reduction in electronic circuits 有权
标题翻译：电子线路漏电减少
公开(公告)号：US07936205B2
公开(公告)日：2011-05-03
申请号：US12486159
申请日：2009-06-17
申请人： Xiaohua Kong , Lew G. Chua-Eoan
发明人： Xiaohua Kong , Lew G. Chua-Eoan
IPC分类号： H03K3/01
CPC分类号： H03K19/0013 , H03K19/0016
摘要： In one embodiment, an apparatus for reducing leakage in an electronic circuit (e.g., a CMOS circuit) includes a power switch transistor configured to selectively couple or decouple a voltage to a logic portion of the electronic circuit. The power switch transistor receives a first voltage during an active mode of the electronic circuit and receives a second voltage during a sleep mode of the electronic circuit. The power switch transistor has a bulk region that is biased using the first voltage during sleep mode. The power switch transistor has a gate region that is biased using the first voltage during sleep mode.
摘要翻译：在一个实施例中，用于减少电子电路（例如，CMOS电路）中的泄漏的装置包括被配置为选择性地将电压耦合到电子电路的逻辑部分的电源开关晶体管。电力开关晶体管在电子电路的有效模式期间接收第一电压，并且在电子电路的睡眠模式期间接收第二电压。功率开关晶体管具有在休眠模式期间使用第一电压偏置的体区。功率开关晶体管具有在睡眠模式期间使用第一电压偏置的栅极区域。

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