专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

41. 发明授权

US06181171B2 Circuit configuration for pulsed current regulation of inductive loads 有权
标题翻译：电感负载的脉冲电流调节电路配置
公开(公告)号：US06181171B2
公开(公告)日：2001-01-30
申请号：US09164117
申请日：1998-09-30
申请人： Alfons Graf , Jenoe Tihanyi
发明人： Alfons Graf , Jenoe Tihanyi
IPC分类号： H03B100
CPC分类号： H02M3/156 , H02M2001/0009 , H02M2003/1555
摘要： A circuit configuration for pulsed current regulation of inductive loads includes a freewheeling configuration which is connected in parallel with the inductive load and has a current-measuring device in order to measure current exclusively while a switching device is in an open state. This avoids an otherwise customary shunt resistor and associated power loss.
摘要翻译：用于电感负载的脉冲电流调节的电路配置包括与感性负载并联连接的续流配置，并且具有电流测量装置，以便在开关装置处于打开状态时专门测量电流。这避免了常规的分流电阻和相关的功率损耗。

42. 发明授权

US06169441A Drive circuit for a field effect-controlled power semiconductor component 有权
标题翻译：用于场效应控制功率半导体元件的驱动电路
公开(公告)号：US06169441A
公开(公告)日：2001-01-02
申请号：US09151887
申请日：1998-09-11
申请人： Jenoe Tihanyi
发明人： Jenoe Tihanyi
IPC分类号： H03K17687
CPC分类号： H03K17/04123 , H03K17/0822
摘要： A voltage source provides an input signal to a drive circuit for a power semiconductor. A protective circuit is connected between the drain and the source of the power semiconductor and is activated when excess current is present. The protective circuit provides an output signal that is received by a control circuit to limit the voltage at the gate of the power semiconductor. The control circuit is connected between the gate and the source. A controllable resistance including an enhancement MOSFET and an external capacitor in which the enhancement MOSFET has a gate, a source and an internal capacitance between the gate and the source is connected in parallel to the external capacitance. The controllable resistance carries the input signal from the voltage source to the power semiconductor. The controllable resistance is switched to high impedance when the protective circuit is activated and switched to low impedance when the protective circuit is deactivated.
摘要翻译：电压源向功率半导体的驱动电路提供输入信号。保护电路连接在功率半导体的漏极和源极之间，并且当存在过量电流时被激活。保护电路提供由控制电路接收的输出信号，以限制功率半导体的栅极处的电压。控制电路连接在门和源之间。包括增强型MOSFET和外部电容器的可控电阻与外部电容并联连接，其中增强型MOSFET具有栅极，栅极和源极之间的源极和内部电容。可控电阻将来自电压源的输入信号传送到功率半导体。当保护电路被激活时，可控电阻切换到高阻抗，并在保护电路停用时切换到低阻抗。

43. 发明授权

US5724218A Power transistor with short-circuit protection 失效
标题翻译：功率晶体管具有短路保护功能
公开(公告)号：US5724218A
公开(公告)日：1998-03-03
申请号：US721565
申请日：1996-09-26
申请人： Jenoe Tihanyi
发明人： Jenoe Tihanyi
IPC分类号： H02H3/08 , H02H9/02 , H02H9/04 , H03F1/52 , H03K17/08 , H03K17/082 , H02H3/18
CPC分类号： H03K17/0822
摘要： Power transistors, especially MOSFETs and IGBTs, must be protected adequately in the ON state against a short circuit in the load circuit, in order to avoid their destruction. Until now, the power transistor was turned off if a short-circuit current appeared by providing that its gate-to-source path, in the event of a short circuit, was short-circuited through another transistor, and the power transistor was thus turned off. However, if that readjustment of the current took place too fast, the power transistor was able to be damaged by overvoltage. That is counteracted by a voltage sensor configuration, which detects the voltage change in the load path of the power transistor and reduces the potential at the control terminal connection of the other transistor if the output voltage rises.
摘要翻译：功率晶体管，特别是MOSFET和IGBT必须在导通状态下充分保护，防止负载电路中的短路，以避免其损坏。到目前为止，如果出现短路电流，则在功率晶体管的短路电流通过另一个晶体管短路的情况下，其栅极到源极路径被切断，并且功率晶体管被转动关闭然而，如果电流的调整发生得太快，则功率晶体管能够被过电压损坏。这通过电压传感器配置抵消，其检测功率晶体管的负载路径中的电压变化，并且如果输出电压上升，则降低另一个晶体管的控制端子连接处的电位。

44. 发明授权

US5457419A MOSFET with temperature protection 失效
标题翻译： MOSFET具有温度保护功能
公开(公告)号：US5457419A
公开(公告)日：1995-10-10
申请号：US192820
申请日：1994-02-07
申请人： Jenoe Tihanyi
发明人： Jenoe Tihanyi
IPC分类号： H03K17/08 , H01L27/02 , H03K17/0812 , H03K17/14
CPC分类号： H01L27/0248 , H03K17/08122 , H01L2924/0002 , H03K2017/0806
摘要： A MOSFET protection circuit includes a switch element which is thermally coupled to the MOSFET and switches the MOSFET off by establishing a connection between the gate and source electrodes thereof when a critical temperature is reached. The switch element also generates a temperature-dependent signal which controls a voltage reducing element connected between the gate and source electrodes of the MOSFET. The voltage reducing element is activated at a temperature which is lower than the critical temperature so that the gate-source voltage of the MOSFET and the current flowing therethrough is reduced as a result at the second temperature. The temperature rise is thereby slowed.
摘要翻译： MOSFET保护电路包括开关元件，该开关元件热耦合到MOSFET并且在达到临界温度时通过在其栅极和源极之间建立连接来切断MOSFET。开关元件还产生温度依赖信号，其控制连接在MOSFET的栅极和源极之间的电压降低元件。降压元件在低于临界温度的温度下被激活，使得MOSFET的栅极 - 源极电压和流过其中的电流在第二温度下降低。温度升高因此减慢。

45. 发明授权

US5132766A Bipolar transistor electrode 失效
标题翻译：双极晶体管电极
公开(公告)号：US5132766A
公开(公告)日：1992-07-21
申请号：US598572
申请日：1990-10-16
申请人： Jenoe Tihanyi , Christine Fellinger
发明人： Jenoe Tihanyi , Christine Fellinger
IPC分类号： H01L29/78 , H01L29/08 , H01L29/68 , H01L29/739
CPC分类号： H01L29/0834 , H01L29/7395
摘要： A bipolar transistor is disclosed including a semiconductor body having a cathode-side surface and an anode-side surface, and at least one insulated gate electrode. The semiconductor body has a central region with a predetermined doping concentration and of a first conductivity type. The central region borders on the cathode-side surface of the semiconductor body. Bordering on the cathode-side surface, at least one gate region is provided which borders on the central region. The gate region is of the second conductivity type and has a higher doping concentration than the central region. In the gate region, a source region is provided which borders on the cathode-side surface. The gate electrode is seated on an insulating layer applied on the cathode-side surface and covers the gate region. Between the anode-side surface and the central region is provided an anode region of the second conductivity type which has a higher doping concentration than the central region. Between gate region and source region, a shunt is provided. The anode region is a recrystallized region of a metal silicon alloy doped with a doping substance.
摘要翻译：公开了一种双极晶体管，其包括具有阴极侧表面和阳极侧表面的半导体本体和至少一个绝缘栅电极。半导体本体具有预定的掺杂浓度和第一导电类型的中心区域。中心区域与半导体本体的阴极侧表面相接。在阴极侧表面附近，提供至少一个栅极区域，其邻接在中心区域上。栅极区域具有第二导电类型并且具有比中心区域更高的掺杂浓度。在栅极区域中，提供与阴极侧表面相接的源极区域。栅电极位于施加在阴极侧表面上并覆盖栅极区域的绝缘层上。在阳极侧表面和中心区域之间提供了具有比中心区域更高的掺杂浓度的第二导电类型的阳极区域。在栅极区域和源极区域之间，提供分流。阳极区域是掺杂有掺杂物质的金属硅合金的再结晶区域。

46. 发明授权

US5086364A Circuitry for detecting a short circuit of a load in series with an FET 失效
标题翻译：用于检测与FET串联的负载短路的电路
公开(公告)号：US5086364A
公开(公告)日：1992-02-04
申请号：US657291
申请日：1991-02-19
申请人： Ludwig Leipold , Rainald Sander , Jenoe Tihanyi , Roland Weber
发明人： Ludwig Leipold , Rainald Sander , Jenoe Tihanyi , Roland Weber
IPC分类号： G01R31/02 , H03K17/082
CPC分类号： H03K17/0822 , G01R31/025
摘要： The voltage (U.sub.DS) on a power MOSFET (1) is compared with a voltage (U.sub.V) derived from the sum of the voltages of a Zener diode (3) and the threshold voltage (U.sub.T) of a second MOSFET (5) to detect a short circuit in a load (2) in series with the power MOSFET (1). When this total voltage is exceeded, the second MOSFET conducts. Its load current is then evaluated as the short circuit signal.
摘要翻译：功率MOSFET（1）上的电压（UDS）与从齐纳二极管（3）的电压和第二MOSFET（5）的阈值电压（UT）之和导出的电压（UV）进行比较，以检测与功率MOSFET（1）串联的负载（2）中的短路。当超过该总电压时，第二个MOSFET导通。然后将其负载电流评估为短路信号。

47. 发明授权

US4937646A MOSFET with temperature protection 失效
标题翻译： MOSFET具有温度保护功能
公开(公告)号：US4937646A
公开(公告)日：1990-06-26
申请号：US191719
申请日：1988-05-02
申请人： Jenoe Tihanyi , Johann Bierlmaier
发明人： Jenoe Tihanyi , Johann Bierlmaier
IPC分类号： H01L29/78 , H01L21/8234 , H01L23/34 , H01L25/18 , H01L27/04 , H01L27/06 , H03K17/08 , H03K17/0812
CPC分类号： H01L23/34 , H01L25/18 , H03K17/08122 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/1301 , H01L2924/1305 , H01L2924/13091 , H01L2924/3011 , H03K2017/0806
摘要： On the semiconductor body of a MOSFET (1), the semiconductor body of a thyristor (5) (or of a bipolar transistor) is located for thermal conduction purposes. The anode and cathode terminals (A, K) (emitter and collector terminal) are connected to the gate terminal (G) and to the source terminal (S) of the MOSFET (1), respectively. The thyristor (bipolar transistor) is rated so that it turns on before a temperature of 150.degree. to 180.degree. is obtained which is critical for the MOSFET. Thus the gate-source capacitance of the MOSFET is effectively shortcircuited and the MOSFET turns off.
摘要翻译：在MOSFET（1）的半导体本体上，晶体管（5）（或双极晶体管）的半导体本体位于热传导目的。阳极和阴极端子（A，K）（发射极和集电极端子）分别连接到栅极端子（G）和MOSFET（1）的源极端子（S）。晶闸管（双极晶体管）的额定值是在获得对于MOSFET至关重要的150°至180°的温度之间导通。因此，MOSFET的栅极 - 源极电容被有效地短路并且MOSFET截止。

48. 发明授权

US4613883A Dynamic semiconductor memory cell and method for its manufacture 失效
标题翻译：动态半导体存储单元及其制造方法
公开(公告)号：US4613883A
公开(公告)日：1986-09-23
申请号：US147942
申请日：1980-05-08
申请人： Jenoe Tihanyi
发明人： Jenoe Tihanyi
IPC分类号： H01L27/10 , G11C11/404 , H01L21/265 , H01L21/266 , H01L21/8242 , H01L27/108 , H01L29/78
CPC分类号： H01L29/7801 , G11C11/404 , H01L21/2652 , H01L21/266 , H01L27/10805 , H01L27/10844
摘要： A dynamic semiconductor memory cell has a field effect transistor and a memory capacitor formed on a semiconductor body. In addition to a first zone, doped oppositely with respect to the doping of the semiconductor body, further zones are formed parallel to the boundary surface of the body and doped with the same conductivity of the semiconductor body, but to a higher degree. The further zones lie below regions at the boundary surface which are doped opposite to the semiconductor body. The further zones include edge portions which extend up to the boundary surface and which limit the regions thereabove in the lateral direction. A gate is provided and in an area of the semiconductor body beneath the gate and adjacent to the boundary surface a region is provided, doped opposite to the semiconductor body and connecting the edge portions. The edge portions, at the boundary surface, form a two-part channel area of the field effect transistor.
摘要翻译：动态半导体存储单元具有形成在半导体本体上的场效应晶体管和存储电容器。除了相对于半导体本体的掺杂相反地掺杂的第一区域之外，还与另外的区域形成为平行于体的边界表面并且掺杂了半导体本体的相同的导电性，但是更高的程度。另外的区域位于边界表面上与半导体本体相反的掺杂区域的下方。另外的区域包括延伸到边界表面并且在横向上限制其上方的区域的边缘部分。提供栅极，并且在半导体本体下面的与边界表面相邻的区域中，设置有与半导体本体相对的掺杂并连接边缘部分的区域。边界部分在边界表面形成场效应晶体管的两部分通道面积。

49. 发明授权

US07999343B2 Semiconductor component with a space-saving edge termination, and method for production of such component 有权
标题翻译：具有节省空间的边缘终端的半导体部件以及用于制造这种部件的方法
公开(公告)号：US07999343B2
公开(公告)日：2011-08-16
申请号：US11515427
申请日：2006-09-01
申请人： Jenoe Tihanyi , Nada Tihanyi, legal representative
发明人： Jenoe Tihanyi
IPC分类号： H01L31/00
CPC分类号： H01L29/7811 , H01L29/0619 , H01L29/0623 , H01L29/0638 , H01L29/0649 , H01L29/0653 , H01L29/0878 , H01L29/36 , H01L29/66348 , H01L29/66734 , H01L29/7396 , H01L29/7397 , H01L29/7813 , H01L29/861
摘要： An arrangement for use in a semiconductor component includes a semiconductor body and an edge structure. The semiconductor body having a first face, a second face, a first semiconductor zone of a first conductance type, at least one second semiconductor zone of a second conductance type, and a semiconductor junction formed therebetween running substantially parallel to the first face. The edge structure is laterally adjacent to the second semiconductor zone and includes at least a first trench. The first trench extends in a vertical direction into the semiconductor body and is filled with a dielectric material. The edge structure further includes a third semiconductor zone of the second conductance type, which, at least partially, is adjacent to a face of the at least one trench which faces away from the first face. The edge structure further includes a fourth semiconductor zone of the first conductance type, which is more heavily doped than the first semiconductor zone, and is proximate to the first face.
摘要翻译：用于半导体部件的布置包括半导体本体和边缘结构。半导体本体具有第一面，第二面，第一导电型的第一半导体区，第二导电型的至少一个第二半导体区，以及形成在其间基本上平行于第一面的半导体结。边缘结构横向邻近第二半导体区并且包括至少第一沟槽。第一沟槽在垂直方向上延伸到半导体本体中并且填充有电介质材料。边缘结构还包括第二电导型的第三半导体区，其至少部分地邻近至少一个面向远离第一面的至少一个沟槽的表面。边缘结构还包括第一电导型的第四半导体区，其比第一半导体区更加掺杂，并且靠近第一面。

50. 发明授权

US07724064B2 Circuit arrangement having a transistor component and a freewheeling element 有权
标题翻译：具有晶体管部件和续流元件的电路装置
公开(公告)号：US07724064B2
公开(公告)日：2010-05-25
申请号：US11480337
申请日：2006-06-30
申请人： Jenoe Tihanyi , Nada Tihanyi, legal representative
发明人： Jenoe Tihanyi
IPC分类号： H03K19/00
CPC分类号： H02M3/158 , H01L27/0629 , H01L27/0811 , H01L27/0922 , H01L2924/0002 , H02M2003/1555 , H01L2924/00
摘要： A circuit arrangement configured to drive a load is disclosed herein. The circuit arrangement comprises a first and a second supply potential terminal for application of a first supply potential and a second supply potential. A load terminal is provided between the first and second supply potential for connection of the load. The circuit arrangement further comprises a first transistor component of a first conduction type. The first transistor component includes a load path and a control terminal, with the load path connected between the first supply potential terminal and the load terminal. The circuit arrangement also comprises a freewheeling element. The freewheeling element is provided as a second transistor of a second conduction type connected up as a diode. The second transistor is connected between the load terminal and the second supply potential terminal. The first transistor component and the freewheeling element are integrated in a common semiconductor body.
摘要翻译：这里公开了构造成驱动负载的电路装置。电路装置包括用于施加第一电源电位和第二电源电位的第一和第二电源端子。负载端子设置在用于连接负载的第一和第二供电电位之间。电路装置还包括第一导电类型的第一晶体管组件。第一晶体管部件包括负载路径和控制端子，负载路径连接在第一供电电位端子和负载端子之间。电路装置还包括续流元件。续流元件被提供为作为二极管连接的第二导电类型的第二晶体管。第二晶体管连接在负载端子和第二电源端子之间。第一晶体管元件和续流元件集成在共同的半导体本体中。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式