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    • 41. 发明申请
    • TRANSITION METAL OXIDE BILAYERS
    • 过渡金属氧化物双层
    • WO2013119882A1
    • 2013-08-15
    • PCT/US2013/025238
    • 2013-02-07
    • INTERMOLECULAR, INC.
    • PHAM, HieuGOPAL, VidyutHASHIM, ImranWANG, YunYANG, Hong Sheng
    • H01L47/00
    • H01L45/08H01L27/2409H01L27/2463H01L45/1233H01L45/1253H01L45/145H01L45/146H01L45/147H01L45/16H01L45/1616H01L45/1625H01L45/1641
    • Embodiments of the invention include nonvolatile memory elements and memory devices comprising the nonvolatile memory elements. Methods for forming the nonvolatile memory elements are also disclosed. The nonvolatile memory element comprises a first electrode layer, a second electrode layer, and a plurality of layers of an oxide disposed between the first and second electrode layers. One of the oxide layers has linear resistance and substoichiometric composition, and the other oxide layer has bistable resistance and near-stoichiometric composition. Preferably, the sum of the two oxide layer thicknesses is between about 20 and about 100, and the oxide layer with bistable resistance has a thickness between about 25% and about 75% of the total thickness. In one embodiment, the oxide layers are formed using reactive sputtering in an atmosphere with controlled flows of argon and oxygen.
    • 本发明的实施例包括非易失性存储器元件和包括非易失性存储元件的存储器件。 还公开了形成非易失性存储元件的方法。 非易失性存储元件包括第一电极层,第二电极层和设置在第一和第二电极层之间的多个氧化物层。 氧化物层中的一个具有线性电阻和亚化学计量组成,另一个氧化物层具有双稳态电阻和近化学计量组成。 优选地,两个氧化物层厚度的总和在约20和约100之间,并且具有双稳态电阻的氧化物层具有在总厚度的约25%至约75%之间的厚度。 在一个实施例中,氧化物层在具有受控的氩气和氧气的气氛中使用反应溅射形成。
    • 43. 发明申请
    • ELECTRON BARRIER HEIGHT CONTROLLED INTERFACES OF RESISTIVE SWITCHING LAYERS IN RESISTIVE RANDOM ACCESS MEMORY CELLS
    • 电阻式随机存取存储器电容栅极高度控制电阻开关层的界面
    • WO2016085665A1
    • 2016-06-02
    • PCT/US2015/060368
    • 2015-11-12
    • INTERMOLECULAR, INC.
    • WANG, YunNARDI, Federico
    • H01L29/51
    • H01L45/12H01L27/2463H01L27/2481H01L45/06H01L45/08H01L45/1233H01L45/145H01L45/146H01L45/148H01L45/1608H01L45/1625
    • Provided are resistive switching memory cells and method of forming such cells. A memory cell includes a resistive switching layer disposed between two buffer layers. The electron barrier height of the material used for each buffer layer is less than the electron barrier height of the material used for the resistive switching layer. Furthermore, the thickness of each buffer layer may be less than the thickness of the resistive switching layer. The buffer layers reduce diffusion between the resistive switching layer and electrodes. Furthermore, the buffer layers improve data retention and prevent unintentional resistive switching when a reading signal is applied to the memory cell. The reading signal uses a low voltage and most of the electron tunneling is blocked by the buffer layers during this operation. On the other hand, the buffer layers allow electrode tunneling at higher voltages used for forming and switching signals.
    • 提供了电阻式开关存储单元和形成这种单元的方法。 存储单元包括设置在两个缓冲层之间的电阻式开关层。 用于每个缓冲层的材料的电子势垒高度小于用于电阻式开关层的材料的电子势垒高度。 此外,每个缓冲层的厚度可以小于电阻式开关层的厚度。 缓冲层减少电阻式开关层和电极之间的扩散。 此外,当读取信号被施加到存储器单元时,缓冲层改善数据保持并防止无意的电阻性切换。 读取信号使用低电压,并且在该操作期间大部分电子隧道被缓冲层阻挡。 另一方面,缓冲层允许用于形成和切换信号的较高电压下的电极隧穿。