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41. 发明授权

US08547081B2 Reference voltage supply circuit including a glitch remover 有权
标题翻译：参考电压电路包括毛刺去除器
公开(公告)号：US08547081B2
公开(公告)日：2013-10-01
申请号：US12833841
申请日：2010-07-09
申请人： Young Deuk Jeon , Young Kyun Cho , Jae Won Nam , Jong Kee Kwon
发明人： Young Deuk Jeon , Young Kyun Cho , Jae Won Nam , Jong Kee Kwon
IPC分类号： G05F1/00 , G05F3/16 , G05F3/20
CPC分类号： H03F3/347
摘要： A reference voltage supply circuit is provided. The reference voltage supply circuit includes a first amplifier for amplifying a first input voltage and a fed back first reference voltage, a second amplifier for amplifying a second input voltage and a fed back second reference voltage, a reference voltage generator for generating the first reference voltage and the second reference voltage according to output signals of the first and second amplifiers and feeding the first and second reference voltages back to the first and second amplifiers, and a glitch remover turned on/off according to an input pulse signal to conduct or cut off current flowing between a power supply terminal and the ground.
摘要翻译：提供参考电压供应电路。参考电压供应电路包括用于放大第一输入电压和反馈第一参考电压的第一放大器，用于放大第二输入电压的第二放大器和反馈的第二参考电压;参考电压发生器，用于产生第一参考电压以及根据第一和第二放大器的输出信号的第二参考电压，并将第一和第二参考电压馈送回第一和第二放大器，并且毛刺去除器根据输入脉冲信号导通/截止以导通或切断在电源端子和地之间流动的电流。

42. 发明申请

US20130157106A1 LITHIUM METAL POWDER-CARBON POWDER COMPOSITE ANODE FOR LITHIUM SECONDARY BATTERY AND LITHIUM METAL SECONDARY BATTERY COMPRISING THE SAME 审中-公开
标题翻译：用于锂二次电池的锂金属粉末碳粉复合阳极和包含该锂二次电池的锂金属二次电池
公开(公告)号：US20130157106A1
公开(公告)日：2013-06-20
申请号：US13478581
申请日：2012-05-23
申请人： Young Gi Lee , Kwang Man Kim , Yil Suk Yang , Jong Kee Kwon , Jong Dae Kim
发明人： Young Gi Lee , Kwang Man Kim , Yil Suk Yang , Jong Kee Kwon , Jong Dae Kim
IPC分类号： H01M10/058 , H01M10/0569 , H01M2/16 , H01M4/131 , H01M4/133 , H01M4/134 , H01M10/0566 , H01M10/0568
CPC分类号： H01M4/133 , H01M2/16 , H01M4/0435 , H01M4/134 , H01M4/366 , H01M4/382 , H01M4/587 , H01M4/62 , H01M10/0525
摘要： Provided are an anode in which lithium metal powder and carbon powder are physically mixed with each other to form a composite and the composite is applied as an anode layer, and a lithium metal secondary battery including the anode. The anode of the present invention may suppress the formation of lithium dendrites and the change in volume of cells generated in a rechargeable battery which uses a lithium metal anode and significantly improve the cycle life-span of a lithium metal secondary battery by physically mixing lithium metal particles and carbon particles having an equivalent average particle diameter with each other to be applied as an anode layer.
摘要翻译：提供了一种其中锂金属粉末和碳粉末彼此物理混合以形成复合材料并将该复合材料用作阳极层的阳极和包括该阳极的锂金属二次电池。本发明的阳极可以抑制锂枝晶的形成和在使用锂金属阳极的可再充电电池中产生的电池的体积变化，并通过物理混合锂金属显着地改善锂金属二次电池的循环寿命具有相等平均粒径的颗粒和碳颗粒作为阳极层。

43. 发明授权

US08264293B2 Oscillator 有权
标题翻译：振荡器
公开(公告)号：US08264293B2
公开(公告)日：2012-09-11
申请号：US12844686
申请日：2010-07-27
申请人： Seok Ju Yun , Hui Dong Lee , Kwi Dong Kim , Jong Kee Kwon
发明人： Seok Ju Yun , Hui Dong Lee , Kwi Dong Kim , Jong Kee Kwon
IPC分类号： H03B5/08
CPC分类号： H03B5/1228 , H03B5/1215 , H03B5/1218 , H03B5/1225 , H03B5/1253 , H03B5/1296
摘要： Provided is a transformer-based oscillator which is suited to oscillate frequencies in multiple bands. An oscillator includes a transformer resonance unit and a plurality of complementary transistors. The transformer resonance unit includes a primary coil and a secondary coil corresponding to the primary coil. The plurality of complementary transistors have gates and drains between which both ends of the transformer resonance unit are respectively connected. Thus, the oscillator may operate in a differential mode or common mode according to the phase of the transformer resonance unit. Also, a complementary transistor constituting a multiband oscillation loop may be independently connected to both ends of the transformer resonance unit, and an oscillation loop of at least one band may be selected out of a multiband oscillation loop using a switch unit. Thus, the oscillator may be suited to oscillate resonance frequencies in multiple bands.
摘要翻译：提供了一种适用于在多个频带中振荡频率的基于变压器的振荡器。振荡器包括变压器谐振单元和多个互补晶体管。变压器谐振单元包括初级线圈和对应于初级线圈的次级线圈。多个互补晶体管具有分别连接变压器谐振单元的两端的栅极和漏极。因此，振荡器可以根据变压器谐振单元的相位以差模或共模工作。此外，构成多频带振荡回路的互补晶体管可以独立地连接到变压器谐振单元的两端，并且可以使用开关单元从多频带振荡回路中选择至少一个频带的振荡回路。因此，振荡器可以适合于振荡多个频带中的谐振频率。

44. 发明授权

US08264268B2 Offset-voltage calibration circuit 失效
标题翻译：偏置电压校准电路
公开(公告)号：US08264268B2
公开(公告)日：2012-09-11
申请号：US12843535
申请日：2010-07-26
申请人： Young Kyun Cho , Young Deuk Jeon , Jae Won Nam , Jong Kee Kwon
发明人： Young Kyun Cho , Young Deuk Jeon , Jae Won Nam , Jong Kee Kwon
IPC分类号： H03L5/00
CPC分类号： H03M1/1023 , H03M1/66
摘要： Provided is an offset-voltage calibration circuit. The circuit includes a comparator configured to receive at least two comparison voltages and output a result of a comparison between the comparison voltages, an up/down counter (UDC) configured to output an up-counting or down-counting output signal in response to an output signal of the comparator, and a current digital-to-analog converter (DAC) configured to control the amount of current supplied from a node to which the comparison voltage is applied, in response to the output signal of the UDC and control the magnitude of the comparison voltage.
摘要翻译：提供了一种偏移电压校准电路。所述电路包括比较器，被配置为接收至少两个比较电压并输出所述比较电压之间的比较结果;响应于所述比较电压被配置为输出递增计数或递减计数输出信号的上/下计数器（UDC）比较器的输出信号，以及被配置为响应于UDC的输出信号来控制从施加了比较电压的节点提供的电流量的电流数模转换器（DAC），并且控制幅度的比较电压。

45. 发明授权

US08059022B2 Digital-to-analog converter 有权
标题翻译：数模转换器
公开(公告)号：US08059022B2
公开(公告)日：2011-11-15
申请号：US12773768
申请日：2010-05-04
申请人： Young Kyun Cho , Young Deuk Jeon , Jae Won Nam , Jong Kee Kwon
发明人： Young Kyun Cho , Young Deuk Jeon , Jae Won Nam , Jong Kee Kwon
IPC分类号： H03M1/66
CPC分类号： H03M1/0682 , H03M1/468 , H03M1/68 , H03M1/682 , H03M1/804 , H03M1/806
摘要： A digital-to-analog converter (DAC) is provided. The DAC includes a positive converter, a negative converter, and a comparator for receiving outputs of the positive converter and the negative converter, comparing the outputs with a reference voltage, and generating an output voltage. Each of the positive converter and the negative converter includes an upper-bit converter including a plurality of bit capacitors corresponding to respective upper bits, a lower-bit converter including a plurality of bit capacitors corresponding to respective lower bits, and a coupling capacitor for connecting the upper-bit converter with the lower-bit converter in series. Each of the positive converter and the negative converter receives a bias voltage to have a uniform offset when converting the respective bits. Accordingly, it is possible to obtain a high resolution using a small area. Also, the number of capacitors can be reduced, and the capacitance of a unit capacitor can be maximized. Consequently, it is possible to minimize heat noise and device mismatching.
摘要翻译：提供了数模转换器（DAC）。 DAC包括正转换器，负转换器和用于接收正转换器和负转换器的输出的比较器，将输出与参考电压进行比较，并产生输出电压。正转换器和负转换器中的每个包括具有对应于各高位的多个位电容器的高位转换器，包括对应于各低位的多个位电容器的低位转换器和用于连接的耦合电容器低位转换器与低位转换器串联。正转换器和负转换器中的每一个在转换各个位时接收偏置电压以具有均匀的偏移。因此，可以使用小面积获得高分辨率。此外，可以减少电容器的数量，并且可以使单位电容器的电容最大化。因此，可以最小化热噪声和器件不匹配。

46. 发明申请

US20110148534A1 LC VOLTAGE-CONTROLLED OSCILLATOR 失效
标题翻译： LC电压控制振荡器
公开(公告)号：US20110148534A1
公开(公告)日：2011-06-23
申请号：US12878697
申请日：2010-09-09
申请人： Hui Dong LEE , Kwi Dong Kim , Jong Kee Kwon , Jong Dae Kim
发明人： Hui Dong LEE , Kwi Dong Kim , Jong Kee Kwon , Jong Dae Kim
IPC分类号： H03B5/12
CPC分类号： H03B5/1228 , H03B5/1215 , H03B5/124 , H03B5/1265 , H03B5/1293
摘要： An LC voltage-controlled oscillator (VCO) is provided. The LC VCO includes an LC resonant circuit including at least one inductor whose both terminals are connected to output nodes and at least one capacitor connected in parallel with the inductor, and an amplifier circuit including at least one pair of switching transistors. Here, drains of the pair of switching transistors are connected to the output nodes respectively, and gates of the switching transistors are connected with the drains through a variable capacitance block exhibiting different characteristics according to an input signal.
摘要翻译：提供了一个LC压控振荡器（VCO）。 LC VCO包括LC谐振电路，其包括至少一个电感器，其两个端子连接到输出节点和与电感器并联连接的至少一个电容器，以及包括至少一对开关晶体管的放大器电路。这里，一对开关晶体管的漏极分别连接到输出节点，并且开关晶体管的栅极通过根据输入信号呈现不同特性的可变电容块与漏极连接。

47. 发明申请

US20110102220A1 PIPELINE ANALOG-TO-DIGITAL CONVERTER 有权
标题翻译：管道模拟数字转换器
公开(公告)号：US20110102220A1
公开(公告)日：2011-05-05
申请号：US12777910
申请日：2010-05-11
申请人： Jae Won NAM , Young Deuk Jeon , Young Kyun Cho , Jong Kee Kwon
发明人： Jae Won NAM , Young Deuk Jeon , Young Kyun Cho , Jong Kee Kwon
IPC分类号： H03M1/00 , H03M1/38
CPC分类号： H03M1/0836 , H03M1/168
摘要： Provided is a pipeline analog-to-digital converter (ADC) without a front-end sample-and-hold amplifier (SHA). To minimize a sampling error occurring between a flash ADC and a multiplying digital-to-analog converter (MDAC) of a first sub-ranging ADC due to removal of a front-end SHA, a delay time of a preamplifier included in the flash ADC is calculated, and the flash ADC samples an analog input signal later by the delay time than the MDAC. Accordingly, the pipeline ADC can minimize a sampling error without using a front-end SHA, and its chip area and power consumption can be reduced.
摘要翻译：提供了一种没有前端采样和保持放大器（SHA）的流水线模数转换器（ADC）。为了最小化由于去除前端SHA而导致的闪存ADC和第一子范围ADC的乘法数模转换器（MDAC）之间的采样误差，包括在闪存ADC中的前置放大器的延迟时间并且闪速ADC比模拟输入信号稍后采样延迟时间比MDAC。因此，流水线ADC可以在不使用前端SHA的情况下最小化采样误差，并且可以减少其芯片面积和功耗。

48. 发明申请

US20110018605A1 OFFSET-VOLTAGE CALIBRATION CIRCUIT 失效
标题翻译：偏移校准电路
公开(公告)号：US20110018605A1
公开(公告)日：2011-01-27
申请号：US12843535
申请日：2010-07-26
申请人： Young Kyun CHO , Young Deuk Jeon , Jae Won Nam , Jong Kee Kwon
发明人： Young Kyun CHO , Young Deuk Jeon , Jae Won Nam , Jong Kee Kwon
IPC分类号： H03L5/00
CPC分类号： H03M1/1023 , H03M1/66
摘要： Provided is an offset-voltage calibration circuit. The circuit includes a comparator configured to receive at least two comparison voltages and output a result of a comparison between the comparison voltages, an up/down counter (UDC) configured to output an up-counting or down-counting output signal in response to an output signal of the comparator, and a current digital-to-analog converter (DAC) configured to control the amount of current supplied from a node to which the comparison voltage is applied, in response to the output signal of the UDC and control the magnitude of the comparison voltage.
摘要翻译：提供了一种偏移电压校准电路。所述电路包括比较器，被配置为接收至少两个比较电压并输出所述比较电压之间的比较结果;响应于所述比较电压被配置为输出递增计数或递减计数输出信号的上/下计数器（UDC）比较器的输出信号，以及被配置为响应于UDC的输出信号来控制从施加了比较电压的节点提供的电流量的电流数模转换器（DAC），并且控制幅度的比较电压。

49. 发明申请

US20100156544A1 RING OSCILLATOR HAVING WIDE FREQUENCY RANGE 有权
标题翻译：环形振荡器具有宽频范围
公开(公告)号：US20100156544A1
公开(公告)日：2010-06-24
申请号：US12507687
申请日：2009-07-22
申请人： Hui Dong Lee , Kwi Dong Kim , Jong Kee Kwon
发明人： Hui Dong Lee , Kwi Dong Kim , Jong Kee Kwon
IPC分类号： H03K3/03
CPC分类号： H03K3/0322 , H03K2005/00045 , H03K2005/00058 , H03L7/0995
摘要： Provided is a ring oscillator having an extended range of oscillation frequency by varactors coupled to delay cells even in a simple structure. The wide frequency range results from simply varying an oscillation frequency by control signals applied to the varactors. Since additional switches connected to the delay cells contribute to increase or decrease of the oscillation frequency range, the ring oscillator can conveniently be employed in various types of oscillation systems.
摘要翻译：提供一种环形振荡器，即使在简单的结构中，也可以通过连接到延迟单元的变容二极管具有扩展的振荡频率范围。宽频率范围是通过施加到变容二极管的控制信号简单地改变振荡频率。由于连接到延迟单元的附加开关有助于振荡频率范围的增加或减少，因此环形振荡器可以方便地用于各种类型的振荡系统。

50. 发明申请

US20100123611A1 SUCCESSIVE APPROXIMATION REGISTER ANALOG-DIGITAL CONVERTER AND METHOD OF DRIVING THE SAME 有权
标题翻译：连续逼近寄存器模拟数字转换器及其驱动方法
公开(公告)号：US20100123611A1
公开(公告)日：2010-05-20
申请号：US12472375
申请日：2009-05-27
申请人： Young Kyun Cho , Young Deuk Jeon , Jae Won Nam , Jong Kee Kwon
发明人： Young Kyun Cho , Young Deuk Jeon , Jae Won Nam , Jong Kee Kwon
IPC分类号： H03M1/12
CPC分类号： H03M1/069 , H03M1/0607 , H03M1/468 , H03M1/804
摘要： A successive approximation register (SAR) analog-digital converter (ADC) and a method of driving the same are provided. The SAR ADC includes a first converting unit including a bit capacitor array corresponding to the number of bits and a correction capacitor array, a comparator outputting a high or low voltage corresponding to each capacitor according to an output voltage of the converting unit, and a correction unit correcting the output of the bit capacitor according to the output of the correction capacitor array among the high or low output of the comparator. Therefore, two bits having the same capacitance as a least significant bit (LSB) enable a digital output error to be corrected, so that a spurious free dynamic range (SFDR) of the signal converter is increased, and a signal to noise and distortion ratio (SNDR) of an output signal is improved.
摘要翻译：提供逐次逼近寄存器（SAR）模数转换器（ADC）及其驱动方法。 SAR ADC包括：第一转换单元，包括与位数相对应的位电容阵列和校正电容器阵列;比较器，根据转换单元的输出电压输出对应于每个电容器的高电压或低电压;以及校正单元根据比较器的高或低输出中的校正电容器阵列的输出校正位电容器的输出。因此，具有与最低有效位（LSB）相同的电容的两个位使得能够校正数字输出误差，使得信号转换器的无杂散动态范围（SFDR）增加，并且信噪比和失真比（SNDR）的输出信号得到改善。

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