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    • 47. 发明授权
    • Emulation system for microcomputer
    • 微机仿真系统
    • US5546566A
    • 1996-08-13
    • US271506
    • 1994-07-07
    • Hiroshi Katsuta
    • Hiroshi Katsuta
    • G06F11/22G06F11/36G06F15/78G06F9/455
    • G06F11/3652
    • An emulation system for emulating an application specific integrated circuit (ASIC) type microcomputer including a central processing unit, a user specific peripheral function unit and a user specific logic circuit, which are integrated together on a single chip. The emulation system includes a first integrated circuit for emulating the central processing unit, and second and third integrated circuits each of which comprises the ASIC-type microcomputer. Each of the second and third integrated circuits can selectively operate in a first evaluation chip mode in which the central processing unit and the user specific logic circuit are isolated from an internal bus, and in a second evaluation chip mode in which the central processing unit and the user specific peripheral function unit are isolated from the internal bus. The first integrated circuit is connected through an peripheral bus to the internal bus of each of the second and third integrated circuits. The second integrated circuit is put in the first evaluation chip mode for emulating the peripheral function unit, and the third integrated circuit is put in the second evaluation chip mode for emulating the logic circuit.
    • 一种用于仿真集成在单个芯片上的专用集成电路(ASIC)型微型计算机的仿真系统,其包括中央处理单元,用户特定外设功能单元和用户专用逻辑电路。 仿真系统包括用于仿真中央处理单元的第一集成电路,以及包括ASIC型微型计算机的第二和第三集成电路。 第二和第三集成电路中的每一个可以选择性地以第一评估芯片模式操作,其中中央处理单元和用户专用逻辑电路与内部总线隔离,并且在第二评估芯片模式中,其中中央处理单元和 用户特定的外设功能单元与内部总线隔离。 第一集成电路通过外围总线连接到第二和第三集成电路中的每一个的内部总线。 将第二集成电路置于用于仿真外围功能单元的第一评估芯片模式中,并且将第三集成电路置于用于仿真逻辑电路的第二评估芯片模式中。