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    • 41. 发明授权
    • Stabilized video signal control loop
    • 稳定视频信号控制回路
    • US4371896A
    • 1983-02-01
    • US296823
    • 1981-08-27
    • Robert L. Shanley, IILeopold A. Harwood
    • Robert L. Shanley, IILeopold A. Harwood
    • H04N5/18H04N5/53
    • H04N5/185
    • Input video signals are applied to a video signal processor via an AC coupling capacitor and an input impedance. A gated control circuit operates periodically to develop a DC control voltage for establishing the DC black reference level of the video signal, at which time the control circuit forms a feedback loop with the video processor. The DC feedback control voltage is coupled via a feedback impedance to the AC coupling capacitor, which stores the control voltage, at the video processor input. The AC coupling capacitor exhibits a low impedance at signal frequencies, such that the input and feedback impedances form a voltage divider for sufficiently reducing the AC signal gain of the feedback loop to prevent the feedback control loop from oscillating at AC signal frequencies.
    • 输入视频信号通过AC耦合电容器和输入阻抗施加到视频信号处理器。 门控控制电路周期性地工作以产生用于建立视频信号的DC黑参考电平的DC控制电压,此时控制电路与视频处理器形成反馈回路。 直流反馈控制电压通过反馈阻抗耦合到视频处理器输入处的存储控制电压的交流耦合电容器。 AC耦合电容器在信号频率处呈现低阻抗,使得输入和反馈阻抗形成分压器,以充分降低反馈回路的AC信号增益,以防止反馈控制回路在交流信号频率下振荡。
    • 42. 发明授权
    • Automatic kinescope beam current limiter with sequential control modes
    • 具有顺序控制模式的自动显象管光束限流器
    • US4253110A
    • 1981-02-24
    • US103445
    • 1979-12-14
    • Leopold A. HarwoodErwin J. WittmannRobert L. Shanley, II
    • Leopold A. HarwoodErwin J. WittmannRobert L. Shanley, II
    • H04N5/59H04N9/535H04N5/58
    • H04N5/59
    • An automatic kinescope beam current limiter for a television receiver comprises a source of signal representative of kinescope beam current conduction, a first transistor responsive to the representative signal over first, second and third ranges of excessive beam currents above a threshold level, and a second transistor. A first control signal derived from the first transistor modifies the video signal peak-to-peak amplitude (contrast level) when beam currents above the threshold level occur. The output of the first transistor is selectively coupled to an input of the second transistor when beam currents beyond the first range occur. A second control signal derived from the second transistor modifies the video signal D.C. component (brightness level) to limit beam currents beyond the first range, whereby both the peak amplitude and D.C. components are modified over the second range. The first control signal is clamped to a fixed level in response to beam currents beyond the second range, whereby the video signal D.C. component is modified alone to limit beam currents over the third range.
    • 一种用于电视接收机的自动显像管光束电流限制器包括代表显像管束电流传导的信号源,第一晶体管响应于超过阈值电平的超过束电流的第一,第二和第三范围的代表信号,以及第二晶体管 。 当出现高于阈值电平的光束电流时,从第一晶体管导出的第一控制信号修改视频信号峰 - 峰幅度(对比度)。 当超过第一范围的束电流发生时,第一晶体管的输出选择性地耦合到第二晶体管的输入。 从第二晶体管导出的第二控制信号修改视频信号D.C.分量(亮度电平)以限制超出第一范围的波束电流,从而在第二范围上修改峰值振幅和直流分量。 响应于超过第二范围的束电流,第一控制信号被钳位到固定电平,从而单独修改视频信号D.C.分量以限制在第三范围上的电流。
    • 43. 发明授权
    • PAL switching control circuit
    • PAL开关控制电路
    • US4148058A
    • 1979-04-03
    • US836712
    • 1977-09-26
    • Leopold A. HarwoodWillem H. GroenewegAlois V. Tuma
    • Leopold A. HarwoodWillem H. GroenewegAlois V. Tuma
    • H04N9/465H04N9/47H04N9/68H04N9/70H04N9/50
    • H04N9/465
    • In a PAL color television system for processing a color signal including burst and chrominance components alternating in phase at the image line scanning rate, identification and control circuitry for rapidly correcting an incorrect mode of line to line color demodulator switching. A bistable circuit generates timing signals for controlling line by line switching of a selected color demodulator (e.g., R-Y). An identification signal representative of an incorrect line switching mode is derived from information contained in the burst component, and serves to reset the bistable circuit such that timing signals corresponding to a correct switching mode are produced. The identification signal is derived by a filter circuit exhibiting a fast response time relative to the line scanning time, in order to rapidly respond to the switching mode identification information occurring at the line rate and thereby rapidly restore the correct demodulator switching mode.
    • 在PAL彩色电视系统中,用于处理彩色信号,包括以像素扫描速率相位交替的脉冲串和色度分量的彩色信号,用于快速校正线对色彩解调器切换的不正确模式的识别和控制电路。 双稳态电路产生用于控制所选颜色解调器(例如,R-Y)的逐行切换的定时信号。 代表不正确的线路切换模式的识别信号从包含在突发分量中的信息导出,并且用于复位双稳态电路,使得产生对应于正确切换模式的定时信号。 识别信号由相对于行扫描时间的快速响应时间的滤波器电路导出,以便快速响应以线路速率发生的开关模式识别信息,从而快速恢复正确的解调器切换模式。
    • 44. 发明授权
    • Frequency division multiplexed analog to digital converter
    • 频分复用模数转换器
    • US4703340A
    • 1987-10-27
    • US858720
    • 1986-05-02
    • Alvin R. BalabanLeopold A. HarwoodChandrakant B. PatelWalter H. Demmer
    • Alvin R. BalabanLeopold A. HarwoodChandrakant B. PatelWalter H. Demmer
    • H04N5/14H04N9/64H04N11/04H04N5/00
    • H04N9/64
    • A digital television receiver, having a line locked clock, includes a first digital phase locked loop which regenerates quadrature phase related subcarrier signals that are used to synchronously demodulate the chrominance signal components of composite video signals into color information signals. When nonstandard video signals (e.g., from a video tape recorder) are processed by the receiver, frequency instabilities in the line locked clock signal may cause the color information signals to be distorted. To compensate for this distortion, a second phase locked loop is synchronized to a reference signal generated by an analog oscillator. The analog reference signal is linearly added to baseband analog video signals provided by a tuner. The combined signals are digitized by an analog-to-digital converter and then filtered by parallel low-pass and band-pass filters to develop digital signals representing the video signals and the reference signal, respectively. The digital reference signal is used to synchronize the second phase locked loop, the control signals of which are used to compensate the first phase locked loop for frequency instabilities in the clock signal.
    • 具有线锁定时钟的数字电视接收机包括第一数字锁相环,其再生用于将复合视频信号的色度信号分量同步解调为彩色信息信号的正交相位相关副载波信号。 当非标准视频信号(例如,来自录像机)由接收机处理时,线路锁定时钟信号中的频率不稳定性可能导致颜色信息信号失真。 为了补偿这种失真,第二个锁相环与由模拟振荡器产生的参考信号同步。 模拟参考信号线性地添加到由调谐器提供的基带模拟视频信号。 组合的信号由模拟数字转换器数字化,然后通过并行低通和带通滤波器进行滤波,以分别开发表示视频信号和参考信号的数字信号。 数字参考信号用于同步第二锁相环,其控制信号用于补偿第一锁相环中的时钟信号中的频率不稳定性。
    • 45. 发明授权
    • Adaptive control of the chrominance signal frequency response in a video
signal processing system
    • 视频信号处理系统中色度信号频率响应的自适应控制
    • US4651196A
    • 1987-03-17
    • US713753
    • 1985-03-19
    • Leopold A. HarwoodChandrakant B. Patel
    • Leopold A. HarwoodChandrakant B. Patel
    • H04N9/64H04N9/77
    • H04N9/646
    • A digital television receiver, which uses a comb filter to separate the luminance and chrominance components of composite video signals, includes an adaptive band-pass filter for processing the comb filtered chrominance signals. Comb filtered chrominance signals may include luminance vertical detail information at the relatively high frequencies also occupied by chrominance information. The adaptive band-pass filter is controlled to have a narrow bandwidth when significant amounts of this relatively high frequency vertical detail information are present and to have a wide bandwidth otherwise. Consequently, the bandwidth of the chrominance signal provided by this filter is restricted only when it is necessary to prevent distortion, and vertical detail is added to the luminance signal only when it is not likely to be contaminated with chrominance information.
    • 使用梳状滤波器分离复合视频信号的亮度和色度分量的数字电视接收机包括用于处理梳状滤波色度信号的自适应带通滤波器。 梳状滤波的色度信号可以包括也被色度信息占据的相对高的频率的亮度垂直细节信息。 当存在大量这种相对高频率的垂直细节信息并且否则具有宽带宽时,自适应带通滤波器被控制为具有窄带宽。 因此,仅当需要防止失真时才限制由该滤波器提供的色度信号的带宽,并且仅当不可能被色度信息污染时才将亮度信号添加到亮度信号。
    • 46. 发明授权
    • Duration-sensitive digital signal gate
    • 持续时间敏感数字信号门
    • US4634984A
    • 1987-01-06
    • US724646
    • 1985-04-18
    • Leopold A. HarwoodKirk A. Law
    • Leopold A. HarwoodKirk A. Law
    • H03K5/05H03K5/153H03K5/19H03K5/26H04N9/78
    • H04N9/78
    • One-bit stream of clocked control information is applied to the input of delay means, having a succession of signal takeoff points, with the delay between successive takeoff points being the same (e.g., twice a period at the clocking frequency, f.sub.CL). Each takeoff point is linked to a respectively different input of an "and" gate. The "and" gate output is coupled to one input of a succession of two-input "or" gates, with the other input of each of said "or" gates coupled to the output of an associated one of a plurality of delay devices, each of the latter imparting the same delay (e.g., corresponding to a period of f.sub.CL). The output of the last of the succession of "or" gates is coupled to a control signal output terminal. The output of each of the remainder of the succession is coupled to the other input of the next succeeding "or" gate in the succession. The input of the delay device associated with the first "or" gate of the succession is coupled to receive the output of an additional two-input "or" gate. One input of the additional "or" gate is responsive to the output of the "and" gate, while the other input thereof is not signal-responsive, being maintained at a "0" level.
    • 时钟控制信息的一比特流被应用于具有连续的信号起飞点的延迟装置的输入,连续起飞点之间的延迟是相同的(例如,在时钟频率fCL的两个周期)。 每个起飞点连接到“和”门的分别不同的输入。 “和”门输出耦合到一系列两输入“或”门的一个输入,其中每个所述“或”门的另一输入耦合到多个延迟装置中相关联的一个延迟装置的输出, 每个后者赋予相同的延迟(例如,对应于fCL的周期)。 “或”门的最后连续输出耦合到控制信号输出端。 继承的剩余部分中的每一个的输出被连接到下一个后续的“或”门的另一个输入。 与继电器的第一“或”门相关联的延迟装置的输入被耦合以接收附加的双输入“或”门的输出。 附加“或”门的一个输入响应于“和”门的输出,而另一个输入不是信号响应的,保持在“0”电平。
    • 47. 发明授权
    • Digital correlation indicator and hanging dot reduction system employing
same
    • 数字相关指标和采用相同的悬点减量系统
    • US4618882A
    • 1986-10-21
    • US724555
    • 1985-04-18
    • Leopold A. HarwoodDanny ChinKirk A. Law
    • Leopold A. HarwoodDanny ChinKirk A. Law
    • H04B14/04H04N9/78H04N9/64H04N7/18
    • H04N9/78
    • In a color TV receiver, a first digital signal of "m" bits represents high frequency component of combed luminance signal, and a second digital signal of "m" bits represents combed chrominance component. The "k" most significant bits of the first signal (where "k" is less than "m") are fed to respective inputs of a first "or" gate, while the "j" most significant bits of the second signal (where "j" is less than, or equal to, "m") are fed to respective inputs of a second "or" gate. The "or" gate outputs are fed, without delay difference, to inputs of a first "and" gate, and are fed, with a delay difference of 90.degree. at color subcarrier frequency, to inputs of a second "and" gate. Sequence recognition apparatus, responsive to the outputs of both "and" gates, develops a correlation indication in response to existence of predetermined sequences of outputs from one or both "and" gates. Control signal former, responsive to correlation indication, forms control signal for actuating high frequency component suppression in receiver's luminance channel to preclude hanging dot display.
    • 在彩色电视接收机中,“m”位的第一数字信号表示精梳亮度信号的高频分量,“m”比特的第二数字信号表示梳状色度分量。 第一信号(其中“k”小于“m”)的“k”个最高有效位被馈送到第一“或”门的相应输入端,而第二信号的“j”个最高有效位(其中 “j”小于或等于“m”)被馈送到第二“或”门的相应输入。 “或”门输出以无延迟差馈入第一“和”门的输入,并以彩色副载波频率的90°的延迟差馈送到第二“和”门的输入。 响应于“和”门的输出的序列识别装置响应于来自一个或两个“和”门的预定输出序列的存在而产生相关指示。 响应于相关指示的控制信号变换器形成控制信号,用于在接收机的亮度通道中启动高频分量抑制,以排除悬点显示。
    • 48. 发明授权
    • High voltage protection for an output circuit
    • 输出电路的高压保护
    • US4441137A
    • 1984-04-03
    • US412899
    • 1982-08-30
    • Leopold A. Harwood
    • Leopold A. Harwood
    • H03F1/52H04N5/14H04N9/64H02H7/20
    • H04N9/648
    • A protection circuit is coupled between a low voltage signal processing semiconductor device subject to damage by high voltage transients, and a signal output terminal at which high voltage transients can appear. The protection circuit comprises a first transistor arranged as an emitter follower for normally conducting signals from the semiconductor device to the output terminal, and a second transistor of opposite conductivity type. The base and emitter electrodes of the first transistor are directly connected to the base and emitter electrodes of the second transistor, respectively, such that the second transistor is normally non-conductive. Transient currents associated with negative high voltage transients at the output terminal are diverted to a point of operating potential via the first transistor. The second transistor is rendered conductive in response to positive high voltage transients at the output terminal for diverting associated transient currents to a point of operating potential.
    • 保护电路耦合在经受高电压瞬变的损坏的低电压信号处理半导体器件与可能出现高电压瞬变的信号输出端子之间。 保护电路包括布置为射极跟随器的第一晶体管,用于从半导体器件到输出端子的正常导通信号,以及相反导电类型的第二晶体管。 第一晶体管的基极和发射极电极分别直接连接到第二晶体管的基极和发射极,使得第二晶体管通常是非导通的。 与输出端子处的负高电压瞬态相关的瞬态电流通过第一晶体管转移到工作电位点。 第二晶体管响应于在输出端子处的正高电压瞬变而导通,用于将相关联的瞬态电流转移到工作电位点。