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41. 发明授权

US06433407B1 Semiconductor integrated circuit 有权
公开(公告)号：US06433407B1
公开(公告)日：2002-08-13
申请号：US09801669
申请日：2001-03-09
申请人： Kunihiko Gotoh , Katsuaki Aizawa , Kazuhiro Kitani , Masatake Kusakari
发明人： Kunihiko Gotoh , Katsuaki Aizawa , Kazuhiro Kitani , Masatake Kusakari
IPC分类号： H01L2900
摘要： A protection circuit in a semiconductor integrated circuit having a master slice I/O circuit comprises an internal circuit, a pad, and a desired number of protection elements connected in parallel between the internal circuit and the pad. Each protection element includes a P-channel MOS transistor which outputs a first power supply voltage level signal on the basis of an output signal of the internal circuit, a N-channel MOS transistor which outputs a second power supply voltage level signal on the basis of the output signal of the internal circuit, a resistor connected between a signal line connected to the pad and an output terminal of the P-channel MOS transistor, and a resistor connected between the signal line and an output terminal of the N-channel MOS transistor.

42. 发明授权

US06342818B1 PLL having switching circuit for maintaining lock during loss of input signal 失效
标题翻译： PLL具有用于在输入信号丢失期间保持锁定的开关电路
公开(公告)号：US06342818B1
公开(公告)日：2002-01-29
申请号：US09312489
申请日：1999-05-17
申请人： Yuji Segawa , Kunihiko Gotoh
发明人： Yuji Segawa , Kunihiko Gotoh
IPC分类号： H03B706
CPC分类号： H03L7/14 , H03L7/0891 , H03L7/143 , H03L7/18
摘要： A cut-off state of a carrier signal or a carrier signal outside an effective range of a frequency is detected by a carrier detector, and a signal switching circuit inputs a clock 2 from an external device into a phase comparator in place of the carrier signal, with which a locked state is maintained in a PLL comprising the phase comparator, a charge pump, a loop filter, a voltage control oscillator, and a 1/N divider, so that a high-speed locking operation is realized to another appropriate carrier signal.
摘要翻译：载波信号或载波信号在频率有效范围之外的截止状态由载波检测器检测，并且信号切换电路将时钟2从外部设备输入到相位比较器中，代替载波信号，其中锁相状态保持在包括相位比较器，电荷泵，环路滤波器，压控振荡器和1 / N分频器的PLL中，使得高速锁定操作被实现到另一个适当的载波信号。

43. 发明授权

US5793257A Oscillator having switching capacitors and phase-locked loop employing same 失效
标题翻译：振荡器具有开关电容器和使用相同锁相环的锁相环
公开(公告)号：US5793257A
公开(公告)日：1998-08-11
申请号：US778781
申请日：1997-01-06
申请人： Noboru Inanami , Yuji Segawa , Kunihiko Gotoh
发明人： Noboru Inanami , Yuji Segawa , Kunihiko Gotoh
IPC分类号： H04N5/12 , H03H19/00 , H03K3/0231 , H03K4/02 , H03L7/099 , H03L7/183 , H03L7/00
CPC分类号： H03H19/004 , H03K3/0231 , H03K4/023 , H03L7/099 , H03L7/183
摘要： A voltage-controlled oscillator has first and second switched capacitor filters, an operational amplifier, and a comparator. The first switched capacitor filter is controlled by a control clock signal to supply a positive current depending on an input voltage, and the second switched capacitor filter is controlled by the control clock signal to supply a negative current depending on the input voltage. The operational amplifier has an input terminal alternately connectable to the first and second switched capacitor filters by a first switch which can be rendered conductive in synchronism with an output clock signal, and another input terminal for being supplied with a constant voltage. A potential at an output terminal of the operational amplifier is lowered when the operational amplifier is supplied with the positive current through a feedback circuit which is provided between the input terminal and the output terminal, and is increased when the operational amplifier is supplied with the negative current through the feedback circuit. The comparator compares the potential at the output terminal of the operational amplifier alternately with a first constant voltage and a second constant voltage, lower than the first constant voltage, which can be switched in synchronism with the output clock signal, thereby to produce the output clock signal.
摘要翻译：压控振荡器具有第一和第二开关电容滤波器，运算放大器和比较器。第一开关电容滤波器由控制时钟信号控制，以根据输入电压提供正电流，并且第二开关电容滤波器由控制时钟信号控制，以根据输入电压提供负电流。运算放大器具有通过可与输出时钟信号同步地导通的第一开关和另一个输入端用于提供恒定电压而与第一和第二开关电容滤波器交替连接的输入端子。当通过设置在输入端子和输出端子之间的反馈电路向运算放大器提供正电流时，运算放大器的输出端子处的电位降低，并且当运算放大器被提供负极时，电位增加电流通过反馈电路。比较器将运算放大器输出端的电位与第一恒定电压和第二恒定电压交替比较，该第一恒定电压和第二恒定电压低于可与输出时钟信号同步的第一恒定电压，从而产生输出时钟信号。

44. 发明授权

US5650652A Input/output protection circuit and semiconductor device having the same 失效
标题翻译：输入/输出保护电路和具有相同的半导体器件
公开(公告)号：US5650652A
公开(公告)日：1997-07-22
申请号：US687832
申请日：1996-07-26
申请人： Toru Mizutani , Osamu Kobayashi , Kunihiko Gotoh
发明人： Toru Mizutani , Osamu Kobayashi , Kunihiko Gotoh
IPC分类号： H03F1/52 , H01L23/62
CPC分类号： H03F1/523
摘要： A protection circuit includes a first protection circuit, which is coupled between a signal output terminal of an internal circuit and an external connection terminal and which prevents an abnormal voltage applied to the external connection terminal from being input to the signal output terminal. The protection circuit also includes a second protection circuit, which is coupled between a signal input terminal of the internal circuit and the external connection terminal and which prevents the abnormal voltage applied to the external connection terminal from being input to the signal input terminal. The signal input terminal is operatively coupled to the signal output terminal via the first and second protection circuit and has an impedance higher than that of the signal output terminal.
摘要翻译：保护电路包括耦合在内部电路的信号输出端子和外部连接端子之间并且防止施加到外部连接端子的异常电压被输入到信号输出端子的第一保护电路。保护电路还包括第二保护电路，其耦合在内部电路的信号输入端子和外部连接端子之间，并且防止施加到外部连接端子的异常电压被输入到信号输入端子。信号输入端子经由第一和第二保护电路可操作地耦合到信号输出端子，并且具有高于信号输出端子的阻抗。

45. 发明授权

US5579214A Half-wave rectifier circuit 失效
标题翻译：半波整流电路
公开(公告)号：US5579214A
公开(公告)日：1996-11-26
申请号：US332299
申请日：1994-10-31
申请人： Kazuhiro Kitani , Yuji Segawa , Kunihiko Gotoh
发明人： Kazuhiro Kitani , Yuji Segawa , Kunihiko Gotoh
IPC分类号： H02M7/21 , H02M7/217 , H02M1/12
CPC分类号： H02M7/217
摘要： In a half-wave rectifier circuit for obtaining an DC voltage output depending on the level of an input signal through half-wave rectification of the input signal, an input voltage from which a DC component is removed by a capacitor is input to a switch circuit. This input voltage includes an offset voltage which is generated by use of the capacitor. The switch circuit outputs a half-wave rectified voltage to a smoothing circuit by switching the input voltage ON and OFF depending on the polarity of the input signal. Under the condition that an input voltage is controlled to OFF state, the switch circuit shows a high impedance viewed from the input side of the smoothing circuit. Therefore, an output voltage of the smoothing circuit is maintained when the switch circuit is in the OFF state. Thereby, the offset voltage generated by the capacitor is eliminated from the output voltage from the smoothing circuit.
摘要翻译：在半波整流电路中，通过对输入信号进行半波整流，根据输入信号的电平获得直流电压输出，将由电容器除去直流分量的输入电压输入到开关电路。该输入电压包括通过使用电容器产生的偏移电压。开关电路根据输入信号的极性，通过切换输入电压ON和OFF来向平滑电路输出半波整流电压。在输入电压控制为OFF状态的情况下，开关电路从平滑电路的输入侧观察到高阻抗。因此，当开关电路处于OFF状态时，平滑电路的输出电压被维持。由此，从平滑电路的输出电压中消除由电容器产生的偏移电压。

46. 发明授权

US5261677A Seal ring 失效
标题翻译：密封环
公开(公告)号：US5261677A
公开(公告)日：1993-11-16
申请号：US896964
申请日：1992-06-11
申请人： Kunihiko Gotoh , Yoshikazu Kobayashi
发明人： Kunihiko Gotoh , Yoshikazu Kobayashi
IPC分类号： F16J15/10 , F16J15/02 , F16J15/32
CPC分类号： F16J15/024 , F16J15/32
摘要： A seal ring seals between a first member and a second member. The second member is provided with a circular groove having two side surfaces opposite each other and a bottom surface connected to the side surfaces. The seal ring is mounted in the circular groove of the second member. The seal ring includes a projection in contact with the first member, a pair of elastic outer leg portions, and a pair of elastic inner leg portions. The outer leg portions are connected to the projection and are in contact with respective side surfaces. The inner leg portions define side recesses between the inner leg portions and the outer leg portions, and are in contact with the side surfaces and the bottom surface.
摘要翻译：密封环在第一构件和第二构件之间密封。第二构件设置有具有彼此相对的两个侧表面的圆形槽和连接到侧表面的底表面。密封环安装在第二构件的圆形槽中。密封环包括与第一构件接触的突起，一对弹性外腿部和一对弹性内腿部。外脚部分连接到突起并且与相应的侧表面接触。内脚部限定内脚部和外腿部之间的侧凹部，并与侧面和底面接触。

47. 发明授权

US5059890A Constant current source circuit 失效
标题翻译：恒定电流源电路
公开(公告)号：US5059890A
公开(公告)日：1991-10-22
申请号：US446885
申请日：1989-12-06
申请人： Yoshinori Yoshikawa , Kunihiko Gotoh
发明人： Yoshinori Yoshikawa , Kunihiko Gotoh
IPC分类号： G05F1/56 , G05F3/20 , G05F3/26
CPC分类号： G05F3/20
摘要： A constant current source circuit includes a current mirror circuit supplying a load circuit with an output current which is regulated on the basis of a reference current, a transistor having an emitter, a collector connected to a first power source line, and a base coupled to the current mirror circuit, and a resistor coupled between the emitter and base. The reference current passes through the resistor. A current control circuit controls a current directed to a second power source line in accordance with a bias voltage. The above current consists of the reference current and a collector current passing through the transistor. A bias circuit having a current path derives the bias voltage from a current passing from the first power source line to the second power source line through the current path.

48. 发明授权

US4912425A Operational amplifier circuit having stable operating point 失效
标题翻译：运算放大器电路具有稳定的工作点
公开(公告)号：US4912425A
公开(公告)日：1990-03-27
申请号：US275311
申请日：1988-11-23
申请人： Osamu Kobayashi , Kunihiko Gotoh
发明人： Osamu Kobayashi , Kunihiko Gotoh
IPC分类号： H03F3/345 , H03F1/30 , H03F3/34
CPC分类号： H03F1/308
摘要： An operational amplifier circuit comprises a differential amplifier circuit for generating an output voltage in response to the difference in potential between two input signals, a level shift circuit for shifting the output voltage of the differential amplifier circuit, a push-pull output circuit which operates in response to the output voltages of the differential amplifier circuit and the level shift circuit, and a bias circuit for generating a bias voltage in response to a power supply voltage to control the level shift circuit. The output voltage of the level shift circuit is not affected by fluctuations of the power supply voltage.

49. 发明授权

US08629797B2 Switched capacitor circuit and stage circuit for AD converter 有权
标题翻译：用于AD转换器的开关电容电路和电路电路
公开(公告)号：US08629797B2
公开(公告)日：2014-01-14
申请号：US13411018
申请日：2012-03-02
申请人： Kunihiko Gotoh
发明人： Kunihiko Gotoh
IPC分类号： H03M1/12
CPC分类号： H03M1/06 , H03M1/162 , H03M1/168
摘要： A switched capacitor circuit, which is operable in two or more kinds of operation modes including a first and second operation modes, includes an amplifier and two or more internal capacitors with switches for controlling connection/disconnection of the capacitor. In the first operation mode that precedes the second operation mode, the switched capacitor circuit generates the first analog output voltage by using the first internal capacitor connected between an input terminal and output terminal of the amplifier by using its switches, the other internal capacitances connected between an input terminal of the amplifier and each analog input voltage supply by using its switches. In the second operation mode, the switched capacitor circuit generates the second analog output voltage with larger feedback factor of the amplifier than it in the first operation mode, by removing some of the internal capacitors, except the first internal capacitor, from the first operation mode.
摘要翻译：可以在包括第一和第二操作模式的两种或多种操作模式中操作的开关电容器电路包括放大器和具有用于控制电容器的连接/断开的开关的两个或更多个内部电容器。在第二操作模式之前的第一操作模式中，开关电容器电路通过使用通过使用其开关连接在放大器的输入端子和输出端子之间的第一内部电容器来产生第一模拟输出电压，其他内部电容连接在放大器的输入端和使用其开关的每个模拟输入电压电源。在第二操作模式中，通过从第一操作模式除去第一内部电容器之外的一些内部电容器，除了第一操作模式之外，开关电容器电路产生具有比第一操作模式更大的反馈系数的第二模拟输出电压。

50. 发明授权

US07986258B2 Analog-digital conversion cell and analog-digital converter 失效
标题翻译：模拟数字转换单元和模拟数字转换器
公开(公告)号：US07986258B2
公开(公告)日：2011-07-26
申请号：US12698853
申请日：2010-02-02
申请人： Kunihiko Gotoh , Takeshi Takayama
发明人： Kunihiko Gotoh , Takeshi Takayama
IPC分类号： H03M1/12
CPC分类号： H03M1/0695 , H03M1/44
摘要： There is provided an analog-digital conversion cell being an analog-digital conversion cell that performs an N-bit analog-digital conversion (where N is a natural number) and including: a comparison circuit (202) comparing an analog input signal VI based on a plurality of reference voltages and outputting a first digital code DA selected from Q digital codes (where Q is a natural number equal to or more than 2N+1 and equal to or less than 2N+1−1) in accordance with a size of the analog input signal VI; a first logic operation circuit (203) outputting a second digital code DB selected from Q digital codes, which is expressed by DB=DA×KA+DB0 where a constant KA is a decimal number satisfying a condition of 1
摘要翻译：提供了一个模拟数字转换单元，其是执行N位模数转换（其中N是自然数）的模拟数字转换单元，包括：比较电路（202），用于比较模拟输入信号VI 在多个参考电压上输出从Q个数字码（其中Q是等于或大于2N + 1且等于或小于2N + 1-1的自然数）选择的第一数字码DA，根据大小的模拟输入信号VI; 输出选自Q数字代码的第二数字代码DB的第一逻辑运算电路（203），其由DB = DA×KA + DB0表示，其中常数KA是满足1

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