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    • 44. 发明授权
    • Active display matrix addressable without crossed lines on any one
substrate and method of using the same
    • 在任何一个基板上无交叉线的有源显示矩阵可寻址及其使用方法
    • US4678282A
    • 1987-07-07
    • US702996
    • 1985-02-19
    • Zvi YanivWalter E. ChapelleShui-Chih A. LienMohshi Yang
    • Zvi YanivWalter E. ChapelleShui-Chih A. LienMohshi Yang
    • G02F1/133G02F1/136G02F1/1362G02F1/1368G09G3/20G09G3/36
    • G02F1/1368G02F1/13624G09G3/3648G09G3/3659G02F2201/122G09G2330/08G09G3/2011
    • A light influencing display is provided which has a plurality of pixel group, each pixel of which includes a first electrode formed on a first surface and an opposing, second electrode formed on a second surface. A separate three terminal control device of deposited semiconductor material is formed on the first surface in association with each pixel. Each control device has a control terminal and two current path terminals, a first of which is connected to the first electrode of the control device's associated pixel. A voltage supply lead is formed on the first surface in association with each pixel group, and is connected to the second current path terminals associated with its pixel group. Similarly, a control lead is formed on the first surface in association with each pixel group, and is connected to the control terminals associated with its pixel group. A plurality of conductive data leads is formed on the second surface, with a data lead being electrically connected to each second electrode of a given pixel group. As a result, a desired voltage can be applied between the electrodes of a given pixel by using a selected control lead to turn on the control devices of that pixel's pixel group, and by using a selected data lead to supply a data voltage to its second electrode. The present invention allows x - y addressing of an active matrix display without crossing address lines on either the first or second surface, avoiding the risk of short circuits between such lines. It also allows the voltage supply and control leads associated with adjacent pixel groups to be combined, greatly reducing the number of lines required in such a display.
    • 提供了一种影响影响的显示器,其具有多个像素组,每个像素组包括形成在第一表面上的第一电极和形成在第二表面上的相对的第二电极。 与每个像素相关联地在第一表面上形成沉积的半导体材料的单独的三端子控制装置。 每个控制装置具有控制端子和两个电流路径端子,其中第一个连接到控制装置的相关像素的第一电极。 电源线与每个像素组相关联地形成在第一表面上,并连接到与其像素组相关联的第二电流路径端子。 类似地,与每个像素组相关联地在第一表面上形成控制引线,并且连接到与其像素组相关联的控制端子。 多个导电数据引线形成在第二表面上,数据引线电连接到给定像素组的每个第二电极。 结果,可以通过使用所选择的控制导线在给定像素的电极之间施加期望的电压来打开该像素的像素组的控制装置,并且通过使用所选择的数据导线将数据电压提供给其第二个 电极。 本发明允许有源矩阵显示器的x-y寻址,而不会在第一或第二表面上交叉地址线,从而避免这种线路之间短路的风险。 它还允许与相邻像素组相关联的电压供应和控制引线被组合,大大减少了这种显示中所需的线数。
    • 45. 发明授权
    • Method of making short channel thin film field effect transistor
    • 制造短沟道薄膜场效应晶体管的方法
    • US4654295A
    • 1987-03-31
    • US557773
    • 1983-12-05
    • Mohshi YangDavid Vesey
    • Mohshi YangDavid Vesey
    • H01L29/78H01L21/033H01L21/306H01L21/336H01L27/12H01L29/786G03F7/16G03F7/26
    • H01L29/78696H01L21/0338H01L29/66757H01L29/66765H01L29/78663H01L29/78684
    • Methods for producing field effect transistors having short current-conduction channels and reduced parasitic capacitance are disclosed. The methods allow the channel length to be substantially less than the minimum feature size of the photolithographic mask if desired, thereby enabling very short channel length transistors to be formed using conventional ten micron photolithography. An exemplary method involves: (a) depositing a thick film of photoresist over a multilayered sandwich structure forming part of the transistor, said structure having a bottom gate electrode, an insulator layer thereover, followed by a layer of deposited semiconductor material and a thin film of etchable conductive material thereover; (b) exposing the photoresist through a mask; (c) wetting the photoresist to cause it to swell before development to create an overhang, if desired; (d) etching the etchable material to undercut a portion of the photoresist, and (e) shadow depositing material on top of the uncovered semiconductor layer beyond the shadow of the undercut and overhanging photoresist, thereby locating said channel, and one of the two current-carrying electrodes of the transistor.
    • 公开了用于制造具有短电流传导通道和减小的寄生电容的场效应晶体管的方法。 如果需要,这些方法允许通道长度显着小于光刻掩模的最小特征尺寸,从而使得能够使用传统的10微米光刻形成非常短的沟道长度的晶体管。 示例性方法包括:(a)在形成晶体管的一部分的多层夹层结构上沉积厚膜的光致抗蚀剂,所述结构具有底栅极电极,绝缘体层,之后是沉积的半导体材料层和薄膜 的可蚀刻导电材料; (b)通过掩模曝光光致抗蚀剂; (c)润湿光致抗蚀剂,使其在显影之前膨胀以产生悬垂,如果需要的话; (d)蚀刻可蚀刻材料以切割一部分光致抗蚀剂,和(e)在未覆盖的半导体层的顶部上的阴影沉积材料超过底切和悬垂的光​​致抗蚀剂的阴影,从而定位所述通道,并且将两个电流之一 - 晶体管的电极。