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    • 45. 发明授权
    • Ink jet heater chip and method therefor
    • 喷墨加热器芯片及其方法
    • US06951384B2
    • 2005-10-04
    • US10872925
    • 2004-06-21
    • Frank Edward AndersonGeorge Keith Parish
    • Frank Edward AndersonGeorge Keith Parish
    • B41J2/14B41J2/16B41J2/05
    • B41J2/14129B41J2/1603B41J2/1606B41J2/1629B41J2/1631B41J2/1642B41J2202/03
    • An ink jet heater chip having improved thermal. The chip includes a semiconductor substrate, a first metal resistive, a second metal conductive layer on a first portion of the resistive layer and on a second portion of the resistive layer defining a heater resistor element. A passivation layer having a thickness defined by a deposition process is deposited on the second metal conductive layer and heater resistor element. A cavitation layer is deposited on the passivation layer and etched. A dielectric layer is deposited and etched to provide a dielectric layer overlying the first portion of the resistive layer. An electrical conduit via is etched in the dielectric layer. A third metal conductive layer is deposited in the via for electrical contact with the second metal conductive layer. Separately deposited dielectric and passivation layers enable independent control of the thickness of the dielectric and passivation layers.
    • 一种具有改善的热量的喷墨加热器芯片。 该芯片包括半导体衬底,第一金属电阻,第二金属导电层,位于电阻层的第一部分上,以及限定加热电阻元件的电阻层的第二部分。 具有由沉积工艺限定的厚度的钝化层沉积在第二金属导电层和加热电阻元件上。 空穴层沉积在钝化层上并被蚀刻。 沉积和蚀刻电介质层以提供覆盖电阻层的第一部分的电介质层。 在电介质层中蚀刻电导管。 第三金属导电层沉积在通孔中以与第二金属导电层电接触。 单独沉积的介电层和钝化层可以独立控制电介质层和钝化层的厚度。
    • 46. 发明授权
    • Heater configuration for tri-color heater chip
    • 加热器配置为三色加热器芯片
    • US06764163B2
    • 2004-07-20
    • US10161426
    • 2002-05-31
    • Frank Edward AndersonGeorge Keith Parish
    • Frank Edward AndersonGeorge Keith Parish
    • B41J215
    • B41J2/14072B41J2/14129B41J2/15B41J2202/20
    • A heater chip has a substrate with one inner and two outer ink vias adjacently arranged. Each via has a first and second longitudinal side. A plurality of heaters, formed by thin film layers, are grouped together in six rows where two of the six rows are arranged adjacent to the first longitudinal side of one of the two outer ink vias, two rows are arranged adjacent to either the first or second longitudinal side of the inner via, and two rows are arranged adjacent to the second longitudinal side of the other of the two outer ink vias. Each of the first, second, and third two rows have one row of near heaters and one row of far heaters. The near heaters are closer in distance to their respective ink via than the far heaters. Printheads containing the heater chip and printers are also disclosed.
    • 加热器芯片具有一个内部和两个外部墨水通孔相邻布置的基板。 每个通孔具有第一和第二纵向侧。 由薄膜层形成的多个加热器被组合在一起,六排排列,其中六排中的两排布置成与两个外部墨水通孔中的一个的第一纵向侧相邻,两行布置成与第一或第 内通孔的第二纵向侧,两排布置成与两个外部墨水通孔中另一个的第二纵向侧相邻。 第一,第二和第三行中的每一列具有一排近加热器和一排远加热器。 靠近加热器的距离远远高于远处加热器。 还公开了包含加热器芯片和打印机的打印头。
    • 47. 发明授权
    • Linear substrate heater for ink jet print head chip
    • 用于喷墨打印头芯片的线性基板加热器
    • US06357863B1
    • 2002-03-19
    • US09453104
    • 1999-12-02
    • Frank Edward AndersonShirish Padmakar MulayGeorge Keith Parish
    • Frank Edward AndersonShirish Padmakar MulayGeorge Keith Parish
    • B41J205
    • B41J2/04541B41J2/04548B41J2/0455B41J2/0458B41J2/14072B41J2/14088
    • An ink jet print head includes a nozzle plate having a substantially linear array of ink jet nozzles through which ink droplets are ejected toward a print medium. An integrated circuit chip, which is disposed adjacent the nozzle plate on the print head, includes a semiconductor substrate, a source voltage conductor connected to a source voltage, and a ground return conductor. A substantially linear array of ink heating resistors are disposed on the substrate substantially parallel to the length of the chip, each associated with a corresponding one of the ink jet nozzles. The chip also includes a plurality of substrate heater resistors disposed on the substrate in a substantially linear arrangement and aligned substantially parallel with the nozzles. The substrate heater resistors are electrically connected in parallel, with one node of each being connected to the source voltage conductor and another node of each being connected to the ground return conductor. Preferably, the substrate heater resistors include first substrate heater resistors disposed near a lengthwise center of the chip and second substrate heater resistors that are distally disposed relative to the lengthwise center of the chip. The first and second substrate heater resistors have different first and second electrical resistance values, respectively, that are determined by thermal dissipation patterns of the chip. The difference between the first and second electrical resistance values cause the first and second substrate heater resistors to generate different amounts of heat when supplied with the source voltage. The different amounts of heat generated by the first and second substrate heater resistors and the relative positions of the first and second substrate heater resistors compensate for differing thermal dissipation patterns across the chip.
    • 喷墨打印头包括喷嘴板,喷嘴板具有基本上线性的喷墨喷嘴阵列,墨滴通过该喷墨喷嘴喷向打印介质。 与打印头上的喷嘴板相邻设置的集成电路芯片包括半导体衬底,连接到源极电压的源极电压导体和接地返回导体。 基本上线性阵列的油墨加热电阻器设置在基板上,基本上平行于芯片的长度,每个与相应的一个喷墨喷嘴相关联。 该芯片还包括多个基板加热电阻器,其基本上线性地布置在基板上并且基本上平行于喷嘴排列。 基板加热电阻器并联电连接,其中一个节点连接到源极电压导体,并且每个节点连接到接地返回导体。 优选地,衬底加热器电阻器包括设置在芯片的纵向中心附近的第一衬底加热电阻器和相对于芯片的纵向中心向远侧设置的第二衬底加热器电阻器。 第一和第二衬底加热器电阻器分别具有由芯片的散热图案确定的不同的第一和第二电阻值。 第一和第二电阻值之间的差异导致第一和第二衬底加热电阻器在被提供源电压时产生不同的热量。 由第一和第二基板加热电阻器产生的不同的热量以及第一和第二基板加热电阻器的相对位置补偿跨芯片的不同散热图案。
    • 48. 发明授权
    • Transitional ink jet heater addressing
    • US06176569B1
    • 2001-01-23
    • US09368666
    • 1999-08-05
    • Frank Edward AndersonBruce David GibsonGeorge Keith ParishThomas Jon Eade
    • Frank Edward AndersonBruce David GibsonGeorge Keith ParishThomas Jon Eade
    • B41J205
    • B41J2/04541B41J2/04543B41J2/0458B41J2/15
    • An apparatus addresses ink jet heating elements based on image data to cause ejection of ink droplets toward a print medium. The apparatus includes a controller for generating address signals, power signals, and first and second bank signals. The first and second bank signals, which are carried on first and second bank lines, alternate between on and off states. The first bank signal is off when the second bank signal is on, and the second bank signal is off when the first bank signal is on. The apparatus has m address lines and n power lines connected to the controller for carrying the address signals and the power signals. A print head has m×n number of first driver circuits, each of which is connected to the first bank line and to a corresponding one of the m address lines. The first driver circuits enable flow of a first driving current when the first bank signal and the address signal are simultaneously on on the first bank line and the corresponding address line. The print head has m×n number of second driver circuits, each of which is connected to the second bank line and to a corresponding one of the m address lines. The second driver circuits enable flow of a second driving current when the second bank signal and the address signal are simultaneously on on the second bank line and the corresponding address line. First heating elements are each connected to a corresponding one of the first driver circuits and to one of the n power lines. A first heating element is activated by the first driving current when the power signal is on on the connected power line and the corresponding first driver circuit enables flow of the first driving current. Second heating elements are each connected to a corresponding one of the second driver circuits and to one of the n power lines. A second heating element is activated by the second driving current when the power signal is on on the connected power line and the corresponding second driver circuit enables flow of the second driving current.