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41. 发明授权

US08605380B1 Technique for fixing tap coefficients in a programmable finite-impulse-response equalizer 失效
标题翻译：在可编程有限脉冲响应均衡器中固定抽头系数的技术
公开(公告)号：US08605380B1
公开(公告)日：2013-12-10
申请号：US13550603
申请日：2012-07-17
申请人： Eric Rolf Christensen , Ernest Stewart Gale , Robert Allen Hutchins , Sedat Oelcer
发明人： Eric Rolf Christensen , Ernest Stewart Gale , Robert Allen Hutchins , Sedat Oelcer
IPC分类号： G11B5/035
CPC分类号： G11B5/00817 , G11B5/09 , G11B20/10009 , G11B20/10046 , G11B2220/90
摘要： A method for selecting which tap coefficients of a programmable finite-impulse-response (FIR) equalizer to fix includes performing an initial calibration to determine an initial value for each tap coefficient of a FIR equalizer. Using these initial values, a “total” FIR equalizer is determined which sets the tap coefficients to their initial values. The method further determines multiple sets of tap coefficients that may potentially be fixed in the FIR equalizer. For each set of tap coefficients that may potentially be fixed, the method determines a “fixed” FIR equalizer that sets the tap coefficients in the set to their initial values and other tap coefficients to zero. The method then determines a phase-difference energy between the “total” FIR equalizer and the “fixed” FIR equalizer for each set of tap coefficients that may potentially be fixed. The set of tap coefficients associated with the lowest phase-difference energy are then fixed.
摘要翻译：用于选择要修复的可编程有限脉冲响应（FIR）均衡器的抽头系数的方法包括执行初始校准以确定FIR均衡器的每个抽头系数的初始值。使用这些初始值，确定“总共”FIR均衡器，其将抽头系数设置为其初始值。该方法还确定可能在FIR均衡器中可能固定的多组抽头系数。对于潜在固定的每组抽头系数，该方法确定一个“固定”FIR均衡器，其将集合中的抽头系数设置为其初始值和其他抽头系数为零。该方法然后确定可能可能固定的每组抽头系数的“总”FIR均衡器和“固定”FIR均衡器之间的相位差能量。然后，与最低相位差能量相关联的抽头系数的集合是固定的。

42. 发明授权

US08254048B2 Dual gain control for magnetic data storage system 有权
标题翻译：磁数据存储系统的双增益控制
公开(公告)号：US08254048B2
公开(公告)日：2012-08-28
申请号：US13101969
申请日：2011-05-05
申请人： Jacob Lee Dahle , Robert Allen Hutchins , Sedat Oelcer , Larry LeeRoy Tretter
发明人： Jacob Lee Dahle , Robert Allen Hutchins , Sedat Oelcer , Larry LeeRoy Tretter
IPC分类号： G11B5/09
CPC分类号： G11B5/09 , G11B20/10009 , G11B20/10027
摘要： A system according to one embodiment includes an analog input for receiving an analog signal; a variable gain amplifier coupled to the analog input; a first gain control circuit coupled to the variable gain amplifier for controlling the gain of the analog signal; an analog to digital converter for converting the analog signal to a digital signal; a first gain error generation circuit for generating a first gain error signal based on an output of the analog to digital converter, the first gain error signal or derivative thereof being received by the first gain control circuit; and a second gain error generation circuit for generating a second gain error signal based on the digital signal, the second gain error signal or derivative thereof being received by the first gain control circuit, wherein the first gain control circuit uses at least one of the gain error signals to control the gain of the analog signal.
摘要翻译：根据一个实施例的系统包括用于接收模拟信号的模拟输入; 耦合到模拟输入的可变增益放大器; 耦合到可变增益放大器的第一增益控制电路，用于控制模拟信号的增益; 用于将模拟信号转换成数字信号的模数转换器; 第一增益误差产生电路，用于基于所述模数转换器的输出产生第一增益误差信号，所述第一增益误差信号或其导数由所述第一增益控制电路接收; 以及第二增益误差产生电路，用于根据由第一增益控制电路接收的数字信号，第二增益误差信号或其导数产生第二增益误差信号，其中第一增益控制电路使用增益中的至少一个误差信号来控制模拟信号的增益。

43. 发明申请

US20110228424A1 DUAL GAIN CONTROL FOR MAGNETIC DATA STORAGE SYSTEM 有权
标题翻译：磁数据存储系统的双增益控制
公开(公告)号：US20110228424A1
公开(公告)日：2011-09-22
申请号：US13101969
申请日：2011-05-05
申请人： Jacob Lee Dahle , Robert Allen Hutchins , Sedat Oelcer , Larry LeeRoy Tretter
发明人： Jacob Lee Dahle , Robert Allen Hutchins , Sedat Oelcer , Larry LeeRoy Tretter
IPC分类号： G11B5/78 , H03L7/06
CPC分类号： G11B5/09 , G11B20/10009 , G11B20/10027
摘要： A system according to one embodiment includes an analog input for receiving an analog signal; a variable gain amplifier coupled to the analog input; a first gain control circuit coupled to the variable gain amplifier for controlling the gain of the analog signal; an analog to digital converter for converting the analog signal to a digital signal; a first gain error generation circuit for generating a first gain error signal based on an output of the analog to digital converter, the first gain error signal or derivative thereof being received by the first gain control circuit; and a second gain error generation circuit for generating a second gain error signal based on the digital signal, the second gain error signal or derivative thereof being received by the first gain control circuit, wherein the first gain control circuit uses at least one of the gain error signals to control the gain of the analog signal.
摘要翻译：根据一个实施例的系统包括用于接收模拟信号的模拟输入; 耦合到模拟输入的可变增益放大器; 耦合到可变增益放大器的第一增益控制电路，用于控制模拟信号的增益; 用于将模拟信号转换成数字信号的模数转换器; 第一增益误差产生电路，用于基于所述模数转换器的输出产生第一增益误差信号，所述第一增益误差信号或其导数由所述第一增益控制电路接收; 以及第二增益误差产生电路，用于根据由第一增益控制电路接收的数字信号，第二增益误差信号或其导数产生第二增益误差信号，其中第一增益控制电路使用增益中的至少一个误差信号来控制模拟信号的增益。

44. 发明授权

US07773327B2 Multi-channel data detection phase locked loop frequency error combination logic 失效
标题翻译：多通道数据检测锁相环频率误差组合逻辑
公开(公告)号：US07773327B2
公开(公告)日：2010-08-10
申请号：US11870921
申请日：2007-10-11
申请人： Robert Allen Hutchins , Jens Jelitto , Sedat Oelcer
发明人： Robert Allen Hutchins , Jens Jelitto , Sedat Oelcer
IPC分类号： G11B5/09
CPC分类号： G11B20/10009 , G11B20/10037 , G11B20/10425
摘要： Frequency error combination for a multi-channel data detection system with a phase locked loop for each channel, comprises receiving frequency error information with respect to each channel; combination logic configured to combine the received frequency error information and generate a combined phase error, weighting the received frequency error information from each channel; and a frequency error output configured to apply the combined frequency error to at least one channel phase locked loop.
摘要翻译：针对每个通道的具有锁相环的多通道数据检测系统的频率误差组合包括接收关于每个通道的频率误差信息; 组合逻辑，其被配置为组合所接收的频率误差信息并产生组合的相位误差，从每个信道对所接收的频率误差信息进行加权; 以及频率误差输出，被配置为将组合的频率误差应用于至少一个通道锁相环。

45. 发明申请

US20100176865A1 GAIN CONTROL WITH MULTIPLE INTEGRATORS 有权
标题翻译：增益控制与多个积分器
公开(公告)号：US20100176865A1
公开(公告)日：2010-07-15
申请号：US12351403
申请日：2009-01-09
申请人： Jacob Lee Dahle , Robert Allen Hutchins , Sedat Oelcer , Larry LeeRoy Tretter
发明人： Jacob Lee Dahle , Robert Allen Hutchins , Sedat Oelcer , Larry LeeRoy Tretter
IPC分类号： G06G7/18
CPC分类号： G11B20/10009 , G11B5/09 , G11B20/10027 , G11B20/10037 , G11B20/10046 , G11B20/10055 , G11B20/10074 , G11B20/10175 , G11B20/10212 , G11B20/10425 , G11B2220/90
摘要： A system according to one embodiment includes an analog input for receiving an analog signal; a variable gain amplifier coupled to the analog input; a first integrator coupled to the variable gain amplifier for controlling the gain of the analog signal; a second integrator generating control signals for controlling functions of the first integrator; a serializer for serializing the control signals; and a deserializer coupled to the serializer for deserializing the control signals and passing the deserialized control signals to the first integrator.
摘要翻译：根据一个实施例的系统包括用于接收模拟信号的模拟输入; 耦合到模拟输入的可变增益放大器; 耦合到可变增益放大器的第一积分器，用于控制模拟信号的增益; 产生用于控制第一积分器的功能的控制信号的第二积分器; 用于串行化控制信号的串行器; 以及耦合到串行器的解串器，用于反序列化控制信号并将反序列化的控制信号传递给第一积分器。

46. 发明申请

US20090097604A1 METHODS FOR MULTI-CHANNEL DATA DETECTION PHASE LOCKED LOOP ERROR COMBINATION 失效
标题翻译：多通道数据检测方法锁相环路错误组合方法
公开(公告)号：US20090097604A1
公开(公告)日：2009-04-16
申请号：US11870885
申请日：2007-10-11
申请人： Robert Allen Hutchins , Jens Jelitto , Sedat Oelcer
发明人： Robert Allen Hutchins , Jens Jelitto , Sedat Oelcer
IPC分类号： H03D3/24 , H04L27/00
CPC分类号： H04L7/0029 , G11B20/10009 , G11B20/10222 , G11B20/10425 , G11B2220/90 , H03L7/07 , H03L7/087 , H03L7/091 , H04L7/0025 , H04L7/0054
摘要： Phase-error combination methods for a multi-channel data detection system with a phase locked loop for each channel, comprises receiving phase error information with respect to each channel; combining the received phase error information and generating a combined phase error; and applying the combined phase error to at least one channel phase locked loop. Error signal combination comprises receiving error information of a signal relevant to a phase locked loop with respect to each channel; combining the received error signal information and generating a combined error signal, weighting the received error signal information from each channel, for example with reliability information. The combined, weighted error signal is applied to at least one channel phase locked loop.
摘要翻译：具有用于每个通道的锁相环的多通道数据检测系统的相位误差组合方法包括接收关于每个通道的相位误差信息; 组合所接收的相位误差信息并产生组合相位误差; 以及将组合的相位误差应用于至少一个通道锁相环。误差信号组合包括相对于每个通道接收与锁相环相关的信号的误差信息; 组合接收到的误差信号信息并产生组合误差信号，例如用可靠性信息对来自每个信道的接收到的误差信号进行加权。组合的加权误差信号被施加到至少一个通道锁相环。

47. 发明申请

US20090097535A1 MULTI-CHANNEL DATA DETECTION PHASE LOCKED LOOP ERROR COMBINATION LOGIC 失效
标题翻译：多通道数据检测相位锁定环路错误组合逻辑
公开(公告)号：US20090097535A1
公开(公告)日：2009-04-16
申请号：US11870853
申请日：2007-10-11
申请人： Robert Allen Hutchins , Jens Jelitto , Sedat Oelcer
发明人： Robert Allen Hutchins , Jens Jelitto , Sedat Oelcer
IPC分类号： H04Q1/20
CPC分类号： G11B20/10009 , G11B20/10037 , G11B20/10425
摘要： Phase-error combination for a multi-channel data detection system with a phase locked loop for each channel, comprises receiving phase error information with respect to each channel; combination logic configured to combine the received phase error information and generate a combined phase error; and a phase-error output configured to apply the combined phase error to at least one channel phase locked loop. Additionally, error signal combination comprises receiving error information of a signal relevant to a phase locked loop with respect to each channel; combination logic configured to combine the received error signal information and generate a combined error signal, weighting the received error signal information from each channel, for example with reliability information. An error compensation output is configured to apply the combined, weighted error signal to at least one channel phase locked loop.
摘要翻译：具有用于每个通道的锁相环的多通道数据检测系统的相位误差组合包括接收关于每个通道的相位误差信息; 组合逻辑，被配置为组合所接收的相位误差信息并产生组合的相位误差; 以及被配置为将组合的相位误差应用于至少一个通道锁相环的相位误差输出。另外，误差信号组合包括相对于每个信道接收与锁相环相关的信号的误差信息; 组合逻辑，其被配置为组合所接收的误差信号信息并产生组合误差信号，例如用可靠性信息对来自每个信道的接收到的误差信号信息进行加权。误差补偿输出被配置为将组合的加权误差信号应用于至少一个通道锁相环。

48. 发明授权

US07813077B2 Apparatus, system, and method for detecting a periodic sequence of servo signals 有权
标题翻译：用于检测伺服信号的周期性序列的装置，系统和方法
公开(公告)号：US07813077B2
公开(公告)日：2010-10-12
申请号：US11469133
申请日：2006-08-31
申请人： Nhan Xuan Bui , Roy Daron Cideciyan , Robert Allen Hutchins , Thomas Mittelholzer , Kazuhiro Tsuruta
发明人： Nhan Xuan Bui , Roy Daron Cideciyan , Robert Allen Hutchins , Thomas Mittelholzer , Kazuhiro Tsuruta
IPC分类号： G11B5/596
CPC分类号： G11B20/1407 , G11B5/584 , G11B20/1492 , G11B2020/1284 , G11B2020/1484 , G11B2220/90
摘要： An apparatus, system, and method are disclosed for detecting a periodic sequence. A value detector module detects a plurality of values of a periodic sequence. In one embodiment, a transformation module transforms the plurality of values into transformed values. A confinement module confines the values to a limited set of confined values. A correlation module correlates the confined values with a plurality of instances of the periodic sequence. In addition, a selection module selects an instance of the periodic sequence with the highest correlation to the confined values as an observed periodic sequence.
摘要翻译：公开了用于检测周期性序列的装置，系统和方法。值检测器模块检测周期性序列的多个值。在一个实施例中，变换模块将多个值转换为变换值。限制模块将值限制为有限的一组限制值。相关模块将约束值与周期性序列的多个实例相关联。此外，选择模块选择具有与限定值的最高相关性的周期性序列的实例作为观察到的周期性序列。

49. 发明授权

US07436609B2 Apparatus method and system for concurrent gain control in a magnetic read channel 失效
标题翻译：磁读取通道中并发增益控制的装置方法和系统
公开(公告)号：US07436609B2
公开(公告)日：2008-10-14
申请号：US11014475
申请日：2004-12-15
申请人： Robert Allen Hutchins
发明人： Robert Allen Hutchins
IPC分类号： G11B5/09
CPC分类号： G11B20/10009 , G11B2020/1275 , G11B2020/1292
摘要： An apparatus, system, and method are disclosed for controlling gain in a magnetic media read channel. In one embodiment, a sampling module provides an asynchronous digital stream corresponding to encoded signals on a streaming magnetic medium, a stream synchronization module converts the asynchronous digital stream to a synchronous digital stream, and a gain control module processes the asynchronous digital stream and provides a gain control signal concurrent to synchronization of the asynchronous digital stream. The described apparatus, method, and system enables calibration of a read channel using a calibration signal (such as a VFO waveform) of shorter duration than attainable with currently available calibration means and methods.
摘要翻译：公开了一种用于控制磁介质读取通道中的增益的装置，系统和方法。在一个实施例中，采样模块提供与流式磁介质上的编码信号相对应的异步数字流，流同步模块将异步数字流转换为同步数字流，增益控制模块处理异步数字流并提供增益控制信号与异步数字流的同步并发。所描述的装置，方法和系统使得能够使用比当前可用的校准装置和方法可获得的持续时间更短的校准信号（例如VFO波形）来校准读取通道。

50. 发明授权

US06525898B1 Detection of indexed servo positions displaced from servo track edges 失效
标题翻译：检测从伺服磁道边缘移位的索引伺服位置
公开(公告)号：US06525898B1
公开(公告)日：2003-02-25
申请号：US09413327
申请日：1999-10-07
申请人： Alex Chliwnyj , John James Gniewek , Robert Allen Hutchins , Steven Carter Wills
发明人： Alex Chliwnyj , John James Gniewek , Robert Allen Hutchins , Steven Carter Wills
IPC分类号： G11B5584
CPC分类号： G11B5/584 , G11B20/10
摘要： A servo position detector and a method for detecting and following an index position displaced at an offset with respect to an edge of a servo track, an edge comprising an interface between two dissimilar recorded servo signals. The servo track has two edges on opposite lateral sides of a middle recorded servo signal, the edges separated by a predetermined distance. A servo read element has an active sensing region which is no more than and is substantially the entire predetermined distance separating the edges, thereby.sensing no more than two of the dissimilar recorded servo signals at one of the edges. An independent position sensor senses the coarse position of the servo read element, indicating which edge or which index position is aligned with the servo read element. Logic compares the two sensed servo signals to determine the ratio therebetween, and determines an error between the compared ratio and a predetermined ratio. The predetermined ratio is an offset from a centered on-edge ratio, and identifies the index position. The logic provides the servo position error with respect to the index position. A servo positioner moves the servo read element to reduce the servo position error.
摘要翻译：一种伺服位置检测器和一种用于检测和跟随相对于伺服轨道的边缘偏移的指示位置的边缘，边缘包括两个不同的记录的伺服信号之间的接口。伺服轨道在中间记录的伺服信号的相对侧面具有两个边缘，边缘分开预定距离。伺服读取元件具有不超过并且基本上分开边缘的整个预定距离的有源感测区域，从而在一个边缘处不超过两个不同的记录伺服信号。独立的位置传感器感测伺服读取元件的粗略位置，指示哪个边缘或哪个索引位置与伺服读取元件对准。逻辑比较两个检测到的伺服信号以确定它们之间的比例，并且确定比较率和预定比率之间的误差。预定比率是与中心边缘比率的偏移，并且识别索引位置。该逻辑提供了相对于索引位置的伺服位置误差。伺服定位器移动伺服读取元件以减少伺服位置误差。

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