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    • 43. 发明授权
    • Shift register with six transistors and liquid crystal display using the same
    • 带6个晶体管的移位寄存器和使用相同的液晶显示器
    • US07844026B2
    • 2010-11-30
    • US12012845
    • 2008-02-06
    • Chien-Hsueh ChiangSz-Hsiao Chen
    • Chien-Hsueh ChiangSz-Hsiao Chen
    • G11C19/00
    • G11C19/28
    • An exemplary shift register (20) includes a plurality of shift register units (200) connected one by one. Each of the shift register units includes a clock signal input terminal (TS), a reverse clock signal input terminal (TSB), a high level signal input terminal (VH), a low level signal input terminal (VL), an output terminal (VOUT), a reverse output terminal (VOUTB), a first input terminal (VIN1), a second input terminal (VIN2), a common node (P), a first switch circuit (31) providing a high level signal to the common node, a second switch circuit (32) providing a low level signal to the common node, a third switch circuit (33) providing a clock signal to the output terminal, a fourth switch circuit (34) providing a low level signal to the output terminal, and an inverter (36) connected between the output terminal and the reverse output terminal.
    • 示例性移位寄存器(20)包括一个一个连接的多个移位寄存器单元(200)。 每个移位寄存器单元包括时钟信号输入端(TS),反向时钟信号输入端(TSB),高电平信号输入端(VH),低电平信号输入端(VL),输出端( VOUT),反向输出端子(VOUTB),第一输入端子(VIN1),第二输入端子(VIN2),公共节点(P),向公共节点提供高电平信号的第一开关电路 ,向公共节点提供低电平信号的第二开关电路(32),向输出端提供时钟信号的第三开关电路(33),向输出端提供低电平信号的第四开关电路(34) 和连接在输出端子和反向输出端子之间的反相器(36)。
    • 44. 发明申请
    • Shift register and liquid crystal display using same
    • 移位寄存器和液晶显示器使用相同
    • US20090073105A1
    • 2009-03-19
    • US12283816
    • 2008-09-15
    • Chien-Hsueh ChiangSz-Hsiao Chen
    • Chien-Hsueh ChiangSz-Hsiao Chen
    • G09G3/36G11C19/00
    • G11C19/28G09G3/3677G09G3/3688G09G2310/0286
    • An exemplary shift register includes a plurality of shift register units, each of which includes an output circuit, an input circuit, and a logic circuit. The output circuit includes a clock transistor, a voltage stabilizing transistor, and an input circuit for receiving signals output by a previous shift register unit. The logic circuit receives signals output by the input circuit. When the input circuit outputs signals to switch on the clock transistor, the logic circuit outputs a low level voltage signal to shut off the voltage stabilizing transistor. Thus, the output circuit outputs signals via the clock circuit. On the other hand, when the input circuit outputs signals to shut off the clock transistor, the logic circuit outputs a high level voltage signal to turn on the voltage stabilizing transistor, so as to maintain the output circuit to output low level voltage signal.
    • 示例性移位寄存器包括多个移位寄存器单元,每个移位寄存器单元包括输出电路,输入电路和逻辑电路。 输出电路包括时钟晶体管,稳压晶体管和用于接收由先前移位寄存器单元输出的信号的输入电路。 逻辑电路接收由输入电路输出的信号。 当输入电路输出信号以接通时钟晶体管时,逻辑电路输出低电平电压信号以切断稳压晶体管。 因此,输出电路经由时钟电路输出信号。 另一方面,当输入电路输出关闭时钟晶体管的信号时,逻辑电路输出高电平电压信号以导通稳压晶体管,从而保持输出电路输出低电平电压信号。