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41. 发明申请

US20050068095A1 LOW PASS FILTER 有权
标题翻译：低通滤波器
公开(公告)号：US20050068095A1
公开(公告)日：2005-03-31
申请号：US10709101
申请日：2004-04-14
申请人： Chia-Jun Chang , Chao-Cheng Lee
发明人： Chia-Jun Chang , Chao-Cheng Lee
IPC分类号： H02H3/20 , H03F3/191 , H03H11/12 , H03H11/24 , H03K5/00
CPC分类号： H03H11/245 , H03H11/126
摘要： A low pass filter includes a differential amplifier including a positive input end, a negative input end, a positive output end, and a negative output end. A first resistive device is coupled between the negative input end and a first node. A second resistive device is coupled between the positive input end and the first node. A third resistive device substantially the same as the second resistive device is coupled between the negative input end and a second node. A fourth resistive device substantially the same as the first resistive device is coupled between the positive input end and the second node. A first capacitive device is coupled between the negative input end and the positive output end. Finally, a second capacitive device substantially the same as the first capacitive device is coupled between the positive input end and the negative output end.
摘要翻译：低通滤波器包括具有正输入端，负输入端，正输出端和负输出端的差分放大器。第一电阻器件耦合在负输入端和第一节点之间。第二电阻器件耦合在正输入端和第一节点之间。与第二电阻装置基本相同的第三电阻装置耦合在负输入端和第二节点之间。与第一电阻器件基本相同的第四电阻器件耦合在正输入端和第二节点之间。第一电容器件耦合在负输入端和正输出端之间。最后，与第一电容性装置基本相同的第二电容性装置耦合在正输入端和负输出端之间。

42. 发明授权

US08817862B2 Equalizer and equalizing method 有权
标题翻译：均衡和均衡方法
公开(公告)号：US08817862B2
公开(公告)日：2014-08-26
申请号：US13048877
申请日：2011-03-16
申请人： Chao-Cheng Lee , Tzu-Chien Tzeng
发明人： Chao-Cheng Lee , Tzu-Chien Tzeng
IPC分类号： H03K5/159 , H04L25/03 , H04B3/04 , H03H7/30 , H03H7/40
CPC分类号： H04B3/04 , H04L25/03885
摘要： An equalizer and a related equalizing method for equalizing signal reflection caused by a stub at a transmitting end are provided. The equalizer includes a summing device and a delay device. The summing device is utilized for adding a feedback delay signal to the input signal to generate the equalized signal. The delay device is coupled to the summing device, and utilized for delaying the equalized signal to generate the feedback delay signal. Wherein the delay device has a variable delay time and the variable delay time is a non-integer multiple of a bit time of the input signal.
摘要翻译：提供了均衡器和相关均衡方法，用于均衡由发送端的短截线引起的信号反射。均衡器包括求和装置和延迟装置。求和装置用于将反馈延迟信号添加到输入信号以产生均衡信号。延迟装置耦合到求和装置，用于延迟均衡信号以产生反馈延迟信号。其中延迟装置具有可变的延迟时间，并且可变延迟时间是输入信号的位时间的非整数倍。

43. 发明授权

US08521105B2 Transmitter for transmitting a transmission signal 有权
标题翻译：用于发送发送信号的发送器
公开(公告)号：US08521105B2
公开(公告)日：2013-08-27
申请号：US11727101
申请日：2007-03-23
申请人： Chao-Cheng Lee
发明人： Chao-Cheng Lee
IPC分类号： H01Q11/12
CPC分类号： H03F3/45206 , H03F1/0283 , H03F3/245 , H03F2200/451 , H03F2203/45028 , H03F2203/45511 , H03F2203/45638
摘要： A transmitter for transmitting a transmission signal is disclosed. The transmitter includes: a gain stage, for receiving an input signal and amplifying the input signal according to a gain to generate an amplified signal; and an output stage, coupled to the gain stage, for receiving a first reference voltage signal and the amplified signal and utilizing the first reference voltage signal to perform a predetermined operation on the amplified signal to generate the output signal.
摘要翻译：公开了用于发送发送信号的发送机。发射机包括：增益级，用于接收输入信号并根据增益放大输入信号以产生放大信号; 以及耦合到增益级的输出级，用于接收第一参考电压信号和放大信号，并利用第一参考电压信号对放大的信号执行预定的操作以产生输出信号。

44. 发明授权

US08306175B2 Clock and data recovery circuit 有权
标题翻译：时钟和数据恢复电路
公开(公告)号：US08306175B2
公开(公告)日：2012-11-06
申请号：US11977984
申请日：2007-10-26
申请人： Chao-Cheng Lee , Tzu-Chien Tzeng
发明人： Chao-Cheng Lee , Tzu-Chien Tzeng
IPC分类号： H04L7/00
CPC分类号： H04L7/033 , H03L7/0898 , H03L7/093 , H03L7/0995 , H03L7/107 , H03L7/1072 , H03L7/1075 , H03L7/113 , H03L7/14 , H03L7/18
摘要： A clock and data recovery circuit includes a voltage controlled oscillator for generating an output clock according to a control voltage signal, a loop filter for outputting the control voltage signal according to a current output, a charge pump unit for outputting the current output according to an error signal, and a controller for determining a run length corresponding to input data based on the output clock from the voltage controlled oscillator. The controller further controls at least one of the voltage controlled oscillator, the loop filter and the charge pump unit according to the run length to dynamically adjust loop bandwidth. A method of adjusting loop bandwidth is also disclosed.
摘要翻译：时钟和数据恢复电路包括用于根据控制电压信号产生输出时钟的压控振荡器，用于根据电流输出输出控制电压信号的环路滤波器，用于根据电流输出输出电流输出的电荷泵单元误差信号，以及用于基于来自压控振荡器的输出时钟确定与输入数据相对应的行程长度的控制器。控制器还根据运行长度进一步控制压控振荡器，环路滤波器和电荷泵单元中的至少一个，以动态地调节环路带宽。还公开了一种调整环路带宽的方法。

45. 发明授权

US07560990B2 Low noise amplifier and low noise amplifying method 有权
标题翻译：低噪声放大器和低噪声放大方法
公开(公告)号：US07560990B2
公开(公告)日：2009-07-14
申请号：US11687671
申请日：2007-03-19
申请人： Ying-Yao Lin , Chao-Cheng Lee , Ying-Hsi Lin
发明人： Ying-Yao Lin , Chao-Cheng Lee , Ying-Hsi Lin
IPC分类号： H03G3/10
CPC分类号： H03G1/0088 , H03G1/0029
摘要： A low noise amplifier for operating in response to different gain modes is disclosed. The low noise amplifier includes a voltage adjusting circuit, which provides a first bias voltage at a first gain mode and provides a second bias voltage at a second gain mode, where the second bias voltage is different from the first bias voltage; and an amplifying circuit coupled to the voltage adjusting circuit, for providing a first transfer characteristic according to the first bias voltage during the first gain mode in order to amplify an input signal to generate an output signal, and for providing a second transfer characteristic according to the second bias voltage during the second gain mode in order to amplify the input signal to generate the output signal.
摘要翻译：公开了一种用于响应不同增益模式工作的低噪声放大器。低噪声放大器包括电压调节电路，其提供第一增益模式的第一偏置电压，并在第二增益模式提供第二偏置电压，其中第二偏置电压不同于第一偏置电压; 以及耦合到所述电压调节电路的放大电路，用于在所述第一增益模式期间根据所述第一偏置电压提供第一传输特性，以便放大输入信号以产生输出信号，并且用于根据所述第一传输特性提供根据在第二增益模式期间的第二偏置电压，以便放大输入信号以产生输出信号。

46. 发明授权

US07496417B2 Audio processing system for use in multi-channel audio chip 有权
标题翻译：音频处理系统用于多声道音频芯片
公开(公告)号：US07496417B2
公开(公告)日：2009-02-24
申请号：US10734257
申请日：2003-12-15
申请人： Chao-Cheng Lee , Jui-Cheng Huang
发明人： Chao-Cheng Lee , Jui-Cheng Huang
IPC分类号： G06F17/00
CPC分类号： H04S3/00
摘要： An audio processing system for used in a multi-channel audio chip includes a multiplexer, a digital-to-analog converter, a de-multiplexer, a controller and N sample-and-hold circuits. The multiplexer receives N digital signals and outputs the digital signals one by one in a time-division manner. The digital-to-analog converter receives the digital signals from the multiplexer and converts them into corresponding N analog signals. The de-multiplexer outputs the analog signals one by one in a time-division manner. The controller generates control signals to control the selection of the multiplexer and the de-multiplexer. The sample-and-hold circuits hold the analog signals for a predetermined period of time and then outputs the signals, respectively.
摘要翻译：用于多声道音频芯片的音频处理系统包括多路复用器，数模转换器，去多路复用器，控制器和N个采样和保持电路。多路复用器接收N个数字信号并以时分方式逐个输出数字信号。数模转换器从多路复用器接收数字信号并将其转换成相应的N个模拟信号。解复用器以时分方式逐个输出模拟信号。控制器产生控制信号以控制多路复用器和解复用器的选择。采样保持电路将模拟信号保持预定的时间段，然后分别输出信号。

47. 发明授权

US07492215B2 Power managing apparatus 有权
标题翻译：电源管理装置
公开(公告)号：US07492215B2
公开(公告)日：2009-02-17
申请号：US11746059
申请日：2007-05-08
申请人： Chao-Cheng Lee , Tzu-Chien Tzeng
发明人： Chao-Cheng Lee , Tzu-Chien Tzeng
IPC分类号： H02J1/00
CPC分类号： H03K19/0016 , H03K2217/0018 , Y10T307/696 , Y10T307/724
摘要： A power managing apparatus is utilized to control a first supply voltage, a second supply voltage, and a substrate voltage of a digital circuit. The power managing apparatus includes a voltage generating device, for generating a first reference voltage and a second reference voltage; and a voltage switching device, coupled to the voltage generating device, for adjusting the first supply voltage, the second supply voltage, and the substrate voltage. When the digital circuit operates in a first operating mode, the voltage switching device outputs the second reference voltage to be the first supply voltage and the substrate voltage; and when the digital circuit operates in a second operating mode, the voltage switching device outputs the first reference voltage to be the first supply voltage, and outputs the second reference voltage to be the second supply voltage.
摘要翻译：电力管理装置用于控制数字电路的第一电源电压，第二电源电压和基板电压。电源管理装置包括用于产生第一参考电压和第二参考电压的电压产生装置; 以及耦合到电压产生装置的用于调节第一电源电压，第二电源电压和基板电压的电压切换装置。当数字电路在第一操作模式下工作时，电压切换装置将第二参考电压输出为第一电源电压和基板电压; 并且当数字电路在第二操作模式下工作时，电压切换装置将第一参考电压输出为第一电源电压，并将第二参考电压输出为第二电源电压。

48. 发明授权

US07456769B2 Reference voltage generating circuit 有权
标题翻译：基准电压发生电路
公开(公告)号：US07456769B2
公开(公告)日：2008-11-25
申请号：US11459364
申请日：2006-07-24
申请人： Wen-Chi Wang , Chang-Shun Liu , Chao-Cheng Lee , Jui-Yuan Tsai
发明人： Wen-Chi Wang , Chang-Shun Liu , Chao-Cheng Lee , Jui-Yuan Tsai
IPC分类号： H03M3/00
CPC分类号： G11C27/024 , G11C27/026
摘要： A reference voltage generating circuit includes a first capacitor having a first end and a second end; a second capacitor having a third end and a fourth end; a first switch for selectively coupling a predetermined voltage to the first end of the first capacitor; a second switch for selectively coupling the third end of the second capacitor to the first end of the first capacitor; a third switch for selectively coupling the first end of the first capacitor to a reference voltage level; and a fourth switch for selectively coupling the second end of the first capacitor to a reference voltage level; wherein the first capacitor samples the predetermined voltage in a first stage and re-distributes charges to the second capacitor in a second stage.
摘要翻译：参考电压产生电路包括具有第一端和第二端的第一电容器; 具有第三端和第四端的第二电容器; 用于选择性地将预定电压耦合到第一电容器的第一端的第一开关; 第二开关，用于选择性地将第二电容器的第三端耦合到第一电容器的第一端; 用于选择性地将第一电容器的第一端耦合到参考电压电平的第三开关; 以及用于选择性地将第一电容器的第二端耦合到参考电压电平的第四开关; 其中所述第一电容器在第一级中对所述预定电压进行采样，并且在第二级中将电荷重新分配给所述第二电容器。

49. 发明申请

US20080238538A1 RECEIVING DEVICE AND RELATED METHOD FOR CALIBRATING DC OFFSET 有权
标题翻译：接收设备和用于校准DC偏移的相关方法
公开(公告)号：US20080238538A1
公开(公告)日：2008-10-02
申请号：US12060849
申请日：2008-04-01
申请人： Pei-Ju Chiu , Chia-Jun Chang , Chao-Cheng Lee
发明人： Pei-Ju Chiu , Chia-Jun Chang , Chao-Cheng Lee
IPC分类号： H03F1/50
CPC分类号： H03F3/189 , H03F2200/271 , H03F2200/375 , H04B1/30
摘要： A receiving device includes a mixer, an AC coupling circuit, a post-stage circuit, and a DC offset calibration circuit. The mixer is utilized for mixing an input signal with a local oscillating (LO) signal from an oscillator to generate a converted signal. The AC coupling circuit is coupled to the mixer and utilized for reducing at least one portion of DC offset of the converted signal to generate a filtered signal. The post-stage circuit is coupled to the AC coupling circuit and utilized for processing the filtered signal to generate an output signal. The DC offset calibration circuit is coupled to the post-stage circuit and utilized for providing at least a compensation current for the post-stage circuit to reduce DC offset of the output signal.
摘要翻译：接收装置包括混频器，AC耦合电路，后级电路和DC偏移校准电路。混频器用于将输入信号与来自振荡器的本地振荡（LO）信号混合以产生转换的信号。 AC耦合电路耦合到混频器并用于减少转换信号的DC偏移的至少一部分以产生滤波信号。后级电路耦合到AC耦合电路，用于处理滤波后的信号以产生输出信号。 DC偏移校准电路耦合到后级电路，并用于为后级电路提供至少一个补偿电流，以减少输出信号的DC偏移。

50. 发明申请

US20080101521A1 Clock and data recovery circuit 有权
标题翻译：时钟和数据恢复电路
公开(公告)号：US20080101521A1
公开(公告)日：2008-05-01
申请号：US11977984
申请日：2007-10-26
申请人： Chao-Cheng Lee , Tzu-Chien Tzeng
发明人： Chao-Cheng Lee , Tzu-Chien Tzeng
IPC分类号： H04L7/00
CPC分类号： H04L7/033 , H03L7/0898 , H03L7/093 , H03L7/0995 , H03L7/107 , H03L7/1072 , H03L7/1075 , H03L7/113 , H03L7/14 , H03L7/18
摘要： A clock and data recovery circuit includes a voltage controlled oscillator for generating an output clock according to a control voltage signal, a loop filter for outputting the control voltage signal according to a current output, a charge pump unit for outputting the current output according to an error signal, and a controller for determining a run length corresponding to input data based on the output clock from the voltage controlled oscillator. The controller further controls at least one of the voltage controlled oscillator, the loop filter and the charge pump unit according to the run length to dynamically adjust loop bandwidth. A method of adjusting loop bandwidth is also disclosed.
摘要翻译：时钟和数据恢复电路包括用于根据控制电压信号产生输出时钟的压控振荡器，用于根据电流输出输出控制电压信号的环路滤波器，用于根据电流输出输出电流输出的电荷泵单元误差信号，以及用于基于来自压控振荡器的输出时钟确定与输入数据相对应的行程长度的控制器。控制器还根据运行长度进一步控制压控振荡器，环路滤波器和电荷泵单元中的至少一个，以动态地调节环路带宽。还公开了一种调整环路带宽的方法。

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