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41. 发明申请

US20070222537A1 PRINTED CIRCUIT BOARD 有权
标题翻译：印刷电路板
公开(公告)号：US20070222537A1
公开(公告)日：2007-09-27
申请号：US11309638
申请日：2006-09-01
申请人： SHOU-KUO HSU , CHENG-HONG LIU
发明人： SHOU-KUO HSU , CHENG-HONG LIU
IPC分类号： H03H7/38
CPC分类号： H05K1/0219 , H05K1/0237 , H05K2201/09236 , H05K2201/09618
摘要： A printed circuit board (PCB) includes at least one signal layer, a ground layer, at least two signal lines, and at least one grounded line. The signal lines are arranged on the signal layer for transmitting signals. The grounded line is arranged on the signal layer and between the signal lines. A plurality of vias are defined in the grounded line, and the vias are connected to the ground layer. A distance between each two adjacent vias is so arranged that a resonant frequency of an electromagnetic wave transmitted on the grounded line must greater than a highest frequency of the signals transmitted on the signal lines. A related method for designing the PCB is also provided.
摘要翻译：印刷电路板（PCB）包括至少一个信号层，接地层，至少两条信号线和至少一条接地线。信号线布置在用于发送信号的信号层上。接地线设置在信号层和信号线之间。在接地线中限定多个通孔，并且通孔连接到接地层。每两个相邻通孔之间的距离被布置成使得在接地线上传输的电磁波的谐振频率必须大于在信号线上传输的信号的最高频率。还提供了一种用于设计PCB的相关方法。

42. 发明申请

US20070018751A1 METHOD FOR IMPEDANCE MATCHING BETWEEN DIFFERENTIAL VIAS AND TRANSMISSION LINES 失效
标题翻译：差分线与传输线之间的阻抗匹配方法
公开(公告)号：US20070018751A1
公开(公告)日：2007-01-25
申请号：US11308690
申请日：2006-04-22
申请人： SHOU-KUO HSU , CHENG-HONG LIU
发明人： SHOU-KUO HSU , CHENG-HONG LIU
IPC分类号： H03H7/38
CPC分类号： H01P5/02 , H01L2924/0002 , H01L2924/00
摘要： A method for impedance matching between differential vias and associated transmission lines is provided. The method includes: deducing a relationship of a space between the differential vias, and a radius of the differential vias while a characteristic impedance of the differential vias matches a characteristic impedance of the differential transmission lines; and determining the space and the radius according to the relationship between the space and the radius.
摘要翻译：提供了差分通孔和相关传输线之间的阻抗匹配方法。该方法包括：当差分通孔的特性阻抗与差动传输线的特征阻抗匹配时，推断出差分通孔之间的空间与差动通路的半径之间的关系; 并根据空间和半径之间的关系确定空间和半径。

43. 发明申请

US20130254729A1 DEVICE AND METHOD FOR CHECKING SIGNAL TRANSMISSION LINES OF PCB LAYOUT FILES 审中-公开
标题翻译：检查PCB布局文件的信号传输线的装置和方法
公开(公告)号：US20130254729A1
公开(公告)日：2013-09-26
申请号：US13585855
申请日：2012-08-15
申请人： YA-LING HUANG , CHIA-NAN PAI , SHOU-KUO HSU
发明人： YA-LING HUANG , CHIA-NAN PAI , SHOU-KUO HSU
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G06F2217/82
摘要： A device and a method reads a circuit printed circuit (PCB) layout file, extracts arrangement information of all the interference source components and signal transmission lines of the PCB layout file, and selects a interference source component from the PCB layout file, then determines if there is any signal transmission line is laid under the selected interference source component.
摘要翻译：一种设备和方法读取电路印刷电路（PCB）布局文件，提取PCB布局文件的所有干扰源组件和信号传输线的布置信息，并从PCB布局文件中选择干扰源组件，然后确定是否在所选择的干扰源组件下面有任何信号传输线。

44. 发明申请

US20130158925A1 COMPUTING DEVICE AND METHOD FOR CHECKING DIFFERENTIAL PAIR 审中-公开
标题翻译：计算设备和检查差异对的方法
公开(公告)号：US20130158925A1
公开(公告)日：2013-06-20
申请号：US13585856
申请日：2012-08-15
申请人： YA-LING HUANG , CHIA-NAN PAI , SHOU-KUO HSU
发明人： YA-LING HUANG , CHIA-NAN PAI , SHOU-KUO HSU
IPC分类号： G06F19/00 , G01N37/00
CPC分类号： G06F17/5081
摘要： A computer-based method and a computing device for checking differential pairs of a printed circuit board layout are provided. The computing device determines the via pitch between switching vias of a differential pair according to the coordinates of the centers of the switching vias, determines the via gap between the switching vias of adjacent two differential pairs according to the radius and the coordinates of the centers of the switching vias, and determines that the switching vias does not satisfy design standards if the via pitch does not fall in an input via pitch range, or the via gap does not fall in an input via gap range.
摘要翻译：提供了一种用于检查印刷电路板布局的差分对的基于计算机的方法和计算装置。计算装置根据切换通孔的中心坐标来确定差分对的切换通孔之间的经过间距，根据半径的中心确定相邻两个差分对的切换通孔之间的通孔间隙并且如果通孔间距没有通过间距范围落入输入，或者通孔间隙不通过间隙范围落入输入，则确定开关通孔不满足设计标准。

45. 发明申请

US20130013962A1 COMPUTING DEVICE AND METHOD FOR ANALYZING INTEGRALITY OF SERIAL ATTACHED SCSI SIGNALS 审中-公开
标题翻译：用于分析串行连接SCSI信号的整合的计算设备和方法
公开(公告)号：US20130013962A1
公开(公告)日：2013-01-10
申请号：US13479271
申请日：2012-05-24
申请人： HSIEN-CHUAN LIANG , SHEN-CHUN LI , SHOU-KUO HSU , JUI-HSIUNG HO , CHENG-HSIEN LEE , CHUN-NENG LIAO
发明人： HSIEN-CHUAN LIANG , SHEN-CHUN LI , SHOU-KUO HSU , JUI-HSIUNG HO , CHENG-HSIEN LEE , CHUN-NENG LIAO
IPC分类号： G06F11/28
CPC分类号： G06F11/221
摘要： In a method for analyzing integrality of serial attached SCSI (SAS) signals using a computing device, the computing device connects to a signal measuring device and an electronic device. A group of test parameters, an intensity grade of a SAS signal, and a total number are set for evaluating integrality of the SAS signal. The intensity grade of the SAS signal is adjusted through an SAS interface of the electronic device. The signal measuring device measures test parameters of the SAS signal, and a test number is recorded when the test parameters of the SAS are measured. The method analyzes the integrality of the SAS signal to find an optimal SAS signal when the test number equals the total number, and determines an intensity grade of the optimal SAS signal as a driving parameter of the SAS interface.
摘要翻译：在使用计算设备分析串行连接SCSI（SAS）信号的完整性的方法中，计算设备连接到信号测量设备和电子设备。设置一组测试参数，SAS信号的强度等级和总数，以评估SAS信号的完整性。 SAS信号的强度等级通过电子设备的SAS接口进行调整。信号测量装置测量SAS信号的测试参数，并且在测量SAS的测试参数时记录测试号。该方法分析SAS信号的完整性，当测试数等于总数时，找到最佳SAS信号，并确定最佳SAS信号的强度等级作为SAS接口的驱动参数。

46. 发明申请

US20120304145A1 ELECTRONIC DEVICE AND WIRING METHOD FOR CIRCUIT BOARDS 审中-公开
标题翻译：电子设备和电路板布线方法
公开(公告)号：US20120304145A1
公开(公告)日：2012-11-29
申请号：US13434858
申请日：2012-03-30
申请人： YUNG-CHIEH CHEN , SHOU-KUO HSU , SHIN-TING YEN
发明人： YUNG-CHIEH CHEN , SHOU-KUO HSU , SHIN-TING YEN
IPC分类号： G06F17/50
CPC分类号： G06F17/5077
摘要： An electronic device includes a wiring unit. The wiring unit creates one or more circuit diagrams for a design of a first circuit board, and setting electrical rules for components of the first circuit board in each of the one or more diagrams. Based on the one or more diagrams having the electrical rules, the wiring unit generates a wiring diagram for the design of the first circuit board by executing a wiring application. If a second circuit board desires to use a circuit diagram of the first circuit board, the wiring unit copies the circuit diagram having the electrical rules into the wiring application. Then, based on the copied circuit diagram having the electrical rules and particular circuit diagrams of the second circuit board, and the wiring unit creates a wiring diagram for the design of the second circuit board by executing the wiring application.
摘要翻译：电子设备包括接线单元。接线单元为第一电路板的设计创建一个或多个电路图，并且在一个或多个图中的每一个中为第一电路板的部件设置电气规则。基于具有电气规则的一个或多个图，布线单元通过执行布线应用产生用于设计第一电路板的布线图。如果第二电路板希望使用第一电路板的电路图，则布线单元将具有电气规则的电路图复制到布线应用中。然后，基于具有电气规则的复制电路图和第二电路板的具体电路图，并且布线单元通过执行布线应用来创建用于第二电路板的设计的布线图。

47. 发明申请

US20120273254A1 SOLDERING PAD 有权
标题翻译：焊接垫
公开(公告)号：US20120273254A1
公开(公告)日：2012-11-01
申请号：US13217626
申请日：2011-08-25
申请人： HUA-LI ZHOU , CHIA-NAN PAI , SHOU-KUO HSU
发明人： HUA-LI ZHOU , CHIA-NAN PAI , SHOU-KUO HSU
IPC分类号： H01B5/00
CPC分类号： H05K1/111 , H05K1/0242 , H05K1/025 , H05K2201/09736 , Y02P70/611
摘要： A pad includes a first mating section and a second mating section. The first mating section includes a first horizontal plane and a first inclined plane. The second mating section includes a second horizontal plane and a second inclined plane. The first mating section is a copper foil capable of being connected to a wire. The second mating section is made of insulating material. The first inclined plane and the second inclined plane are bonded together.
摘要翻译：垫包括第一配合部分和第二配合部分。第一配合部分包括第一水平面和第一倾斜平面。第二配合部分包括第二水平面和第二倾斜平面。第一配合部分是能够连接到电线的铜箔。第二配合部分由绝缘材料制成。第一倾斜平面和第二倾斜平面结合在一起。

48. 发明申请

US20120269471A1 GUIDEWAY MECHANISM 失效
标题翻译：指导机制
公开(公告)号：US20120269471A1
公开(公告)日：2012-10-25
申请号：US13182428
申请日：2011-07-13
申请人： SHEN-CHUN LI , HSIEN-CHUAN LIANG , SHOU-KUO HSU
发明人： SHEN-CHUN LI , HSIEN-CHUAN LIANG , SHOU-KUO HSU
IPC分类号： F16C17/26
CPC分类号： F16C29/005 , B61B3/00 , F16C2322/59
摘要： An exemplary guideway mechanism includes two branches, a group of connecting blocks, and a supporting bracket. The group of connecting blocks includes four connecting blocks arranged at four corners of an imaginary square and connecting the supporting bracket. Each branch includes two parallel rails. Adjacent ends of the rails of each branch respectively connect two adjacent connecting blocks.
摘要翻译：示例性导轨机构包括两个分支，一组连接块和支撑托架。该组连接块包括布置在假想方形的四个角处并连接支撑托架的四个连接块。每个分支包括两个平行导轨。每个分支的轨道的相邻端分别连接两个相邻的连接块。

49. 发明申请

US20120268283A1 CIRCUIT BOARD HAVING CURRENT BALANCE FUNCTION 审中-公开
标题翻译：具有当前平衡功能的电路板
公开(公告)号：US20120268283A1
公开(公告)日：2012-10-25
申请号：US13167719
申请日：2011-06-24
申请人： SHOU-KUO HSU , YUNG-CHIEH CHEN , HSIEN-CHUAN LIANG , SHEN-CHUN LI , WEN-LAING TSENG , CHIA-NAN PAI
发明人： SHOU-KUO HSU , YUNG-CHIEH CHEN , HSIEN-CHUAN LIANG , SHEN-CHUN LI , WEN-LAING TSENG , CHIA-NAN PAI
IPC分类号： G08B21/00 , G01R17/02
CPC分类号： H05K1/0201 , G01R31/043 , H05K1/0263 , H05K1/029 , H05K2201/0979 , H05K2201/10212
摘要： A circuit board includes a current balancing unit that receives a number of current values from ammeters. A minimum current value between the current values is determined by the current balancing unit. Resistance of one or more variable resistors of the current balancing unit is adjusted by the current balancing unit to make the current value from one or more the ammeters serially connected to the one or more the variable resistors to be substantially equal to the minimum current value.
摘要翻译：电路板包括从电流表接收多个电流值的电流平衡单元。当前值之间的最小电流值由电流平衡单元确定。通过电流平衡单元调整电流平衡单元的一个或多个可变电阻器的电阻，使来自一个或多个串联连接到一个或多个可变电阻器的电流器的电流值基本上等于最小电流值。

50. 发明申请

US20120221989A1 ELECTRONIC DEVICE AND METHOD OF AUTOMATICALLY TESTING TRANSMISSION LINES 失效
标题翻译：电子设备及自动测试传输线路的方法
公开(公告)号：US20120221989A1
公开(公告)日：2012-08-30
申请号：US13326652
申请日：2011-12-15
申请人： HSIEN-CHUAN LIANG , SHEN-CHUN LI , SHIN-TING YEN , CHUN-NENG LIAO , SHOU-KUO HSU
发明人： HSIEN-CHUAN LIANG , SHEN-CHUN LI , SHIN-TING YEN , CHUN-NENG LIAO , SHOU-KUO HSU
IPC分类号： G06F17/50
CPC分类号： G01R31/2822 , G01R31/2805 , G01R31/2834
摘要： An electronic device and method of automatically testing the transmission lines of a PCB. Design requirements of transmission lines are predetermined and a wiring diagram is acquired according to a designated wiring diagram storage path. Some basic parameters of each transmission line of the diagram are applied in excluding one or more transmission lines which may not meet the design requirements, then, the excluded transmission lines are marked and/or highlighted. A report of the transmission lines is generated using a report template.
摘要翻译：一种自动测试PCB传输线的电子设备和方法。预定传输线的设计要求，并根据指定的接线图存储路径获取接线图。应用图中每条传输线的一些基本参数，排除可能不符合设计要求的一条或多条传输线，然后将排除的传输线标记和/或突出显示。使用报告模板生成传输线的报告。

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