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41. 发明授权

US07795682B2 Semiconductor device and method manufacturing semiconductor device 有权
标题翻译：半导体器件和方法制造半导体器件
公开(公告)号：US07795682B2
公开(公告)日：2010-09-14
申请号：US11700147
申请日：2007-01-31
申请人： Akio Kaneko , Atsushi Yagishita , Satoshi Inaba
发明人： Akio Kaneko , Atsushi Yagishita , Satoshi Inaba
IPC分类号： H01L29/786
CPC分类号： H01L29/785 , H01L21/845 , H01L27/1211 , H01L29/045 , H01L29/6681 , H01L29/7843
摘要： The disclosure concerns a method of manufacturing a semiconductor device including forming a plurality of fins made of a semiconductor material on an insulating layer; forming a gate insulating film on side surfaces of the plurality of fins; and forming a gate electrode on the gate insulating film in such a manner that a compressive stress is applied to a side surface of a first fin which is used in an NMOSFET among the plurality of fins in a direction perpendicular to the side surface and a tensile stress is applied to a side surface of a second fin which is used in a PMOSFET among the plurality of fins in a direction perpendicular to the side surface.
摘要翻译：本公开涉及一种制造半导体器件的方法，包括在绝缘层上形成由半导体材料制成的多个鳍片; 在所述多个翅片的侧面上形成栅极绝缘膜; 以及在所述栅极绝缘膜上形成栅电极，使得在与所述侧面垂直的方向上在所述多个翅片中的NMOSFET中使用的第一鳍片的侧面施加压缩应力，在垂直于侧面的方向上，在多个翅片中的PMOSFET中使用的第二鳍片的侧面施加应力。

42. 发明授权

US07608890B2 Semiconductor device and method of manufacturing semiconductor device 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07608890B2
公开(公告)日：2009-10-27
申请号：US11451318
申请日：2006-06-13
申请人： Atsushi Yagishita
发明人： Atsushi Yagishita
IPC分类号： H01L27/108
CPC分类号： H01L21/845 , H01L27/1211 , H01L29/41791 , H01L29/66795 , H01L29/785 , H01L2029/7858
摘要： A method of manufacturing a semiconductor device includes forming a plurality of Fins including a semiconductor material on an insulation layer; forming gate insulation films on sidewalls of the Fins; forming a gate electrode which extends in a direction of arrangement of the Fins and which is electrically insulated from the Fins, the gate electrode is common in the Fins on the gate insulation film; implanting an impurity into portions of the Fins by using the gate electrode as a mask to form a source-drain diffusion layer, the portions of the Fins extending on both sides of the gate electrodes; and depositing a conductive material on both sides of the Fins to connect the Fins to each other.
摘要翻译：制造半导体器件的方法包括在绝缘层上形成包括半导体材料的多个金属丝; 在金属丝的侧壁上形成栅极绝缘膜; 形成栅极电极，所述栅电极在所述鳍片的布置方向上延伸并且与所述鳍状物电绝缘，所述栅极电极在所述栅极绝缘膜上的所述鳍片中是共同的; 通过使用栅电极作为掩模将杂质注入到薄片的部分中以形成源 - 漏扩散层，所述鳍的部分在栅电极的两侧延伸; 以及在所述金属丝的两侧上沉积导电材料以将所述金属丝彼此连接。

43. 发明授权

US07488631B2 Semiconductor device having a schottky source/drain transistor 失效
标题翻译：具有肖特基源极/漏极晶体管的半导体器件
公开(公告)号：US07488631B2
公开(公告)日：2009-02-10
申请号：US11808467
申请日：2007-06-11
申请人： Atsushi Yagishita
发明人： Atsushi Yagishita
IPC分类号： H01L21/84 , H01L21/336
CPC分类号： H01L29/66772 , H01L21/84 , H01L27/1203 , H01L29/458 , H01L29/785 , H01L29/78618
摘要： A semiconductor device comprises an island shaped channel layer formed on a substrate, the channel later being composed of a semiconductor material, a gate insulation film formed on the channel layer, a gate electrode formed on the gate insulation film, an insulation film formed on both side faces opposite to one direction of the channel layer, a source electrode and a drain electrode made of a metal material and formed on a side face of the insulation layer.
摘要翻译：半导体器件包括形成在基板上的岛状沟道层，沟道层由半导体材料构成，栅极绝缘膜形成在沟道层上，栅电极形成在栅极绝缘膜上，绝缘膜形成在两者上与沟道层的一个方向相反的侧面，由金属材料制成并形成在绝缘层的侧面上的源电极和漏电极。

44. 发明授权

US07405449B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07405449B2
公开(公告)日：2008-07-29
申请号：US11236723
申请日：2005-09-28
申请人： Atsushi Yagishita
发明人： Atsushi Yagishita
IPC分类号： H01L27/088
CPC分类号： H01L29/785 , H01L29/42392 , H01L29/66628 , H01L29/66643 , H01L29/66795 , H01L29/78618 , H01L2029/7857
摘要： A semiconductor device includes a semiconductor substrate, and a MOS transistor provided on the semiconductor substrate and having a channel type of a first conductivity, the MOS transistor comprising a semiconductor region of the first conductivity type including first and second channel regions, gate insulating films provided on the first and second channel regions, a gate electrode provided on the gate insulating films, and first and second source/drain regions which are located at a distance from each other so as to sandwich the first and second channel regions, the first and second source/drain regions contacting the semiconductor region of the first conductivity type and forming a Schottky junction.
摘要翻译：半导体器件包括半导体衬底和设置在半导体衬底上并且具有沟道类型的第一导电性的MOS晶体管，所述MOS晶体管包括第一导电类型的包括第一和第二沟道区的半导体区，提供栅极绝缘膜在第一和第二沟道区上，设置在栅极绝缘膜上的栅电极以及彼此间隔一定距离的第一和第二源极/漏极区，以夹持第一和第二沟道区，第一和第二沟道区源极/漏极区域与第一导电类型的半导体区域接触并形成肖特基结。

45. 发明授权

US07314787B2 Method of manufacturing a semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07314787B2
公开(公告)日：2008-01-01
申请号：US11058190
申请日：2005-02-16
申请人： Atsushi Yagishita
发明人： Atsushi Yagishita
IPC分类号： H01L21/336
CPC分类号： H01L29/785 , H01L21/84 , H01L29/42384 , H01L29/665 , H01L29/66795
摘要： A manufacturing method of a semiconductor device disclosed herein comprises: forming a convex first protrusion; forming a first film, of which a surface is higher than the first protrusion; forming a mask portion on the first film; and etching the first film with the mask portion as a mask.
摘要翻译：本文公开的半导体器件的制造方法包括：形成凸起的第一突起; 形成第一膜，其表面高于第一突起; 在所述第一膜上形成掩模部分; 并用掩模部分作为掩模蚀刻第一膜。

46. 发明申请

US20070243677A1 Semiconductor device having a schottky source/drain transistor 失效
标题翻译：具有肖特基源极/漏极晶体管的半导体器件
公开(公告)号：US20070243677A1
公开(公告)日：2007-10-18
申请号：US11808467
申请日：2007-06-11
申请人： Atsushi Yagishita
发明人： Atsushi Yagishita
IPC分类号： H01L21/8238
CPC分类号： H01L29/66772 , H01L21/84 , H01L27/1203 , H01L29/458 , H01L29/785 , H01L29/78618
摘要： A semiconductor device comprises an island shaped channel layer formed on a substrate, the channel later being composed of a semiconductor material, a gate insulation film formed on the channel layer, a gate electrode formed on the gate insulation film, an insulation film formed on both side faces opposite to one direction of the channel layer, a source electrode and a drain electrode made of a metal material and formed on a side face of the insulation layer.
摘要翻译：半导体器件包括形成在衬底上的岛状沟道层，该沟道稍后由半导体材料构成，形成在沟道层上的栅极绝缘膜，形成在栅极绝缘膜上的栅电极，形成在二极管上的绝缘膜与沟道层的一个方向相反的侧面，由金属材料制成并形成在绝缘层的侧面上的源电极和漏电极。

47. 发明申请

US20070120204A1 Semiconductor device and manufacturing method thereof 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070120204A1
公开(公告)日：2007-05-31
申请号：US11657614
申请日：2007-01-25
申请人： Atsushi Yagishita
发明人： Atsushi Yagishita
IPC分类号： H01L29/94 , H01L21/336
CPC分类号： H01L21/823443 , H01L21/28194 , H01L21/823418 , H01L21/84 , H01L27/1203 , H01L29/4908 , H01L29/4975 , H01L29/517 , H01L29/7839
摘要： A semiconductor device includes a semiconductor substrate containing silicon, a p-type semiconductor active region formed on the semiconductor substrate, a first gate insulating film containing at least one of Zr and Hf and formed on the p-type semiconductor active region, a first gate electrode formed on the first gate insulating film and formed of first silicide containing silicon and a first metal material and having a work function level lower than the central position of a band gap of the p-type semiconductor active region, and a first source region and first drain region configured by a second silicide containing silicon and the first metal material and formed to sandwich the p-type semiconductor active region.
摘要翻译：半导体器件包括含硅的半导体衬底，形成在半导体衬底上的p型半导体有源区，包含至少一个Zr和Hf并形成在p型半导体有源区上的第一栅极绝缘膜，第一栅极电极，形成在第一栅极绝缘膜上，并且由含有硅和第一金属材料的第一硅化物形成，并且具有低于p型半导体有源区的带隙的中心位置的功函数级，以及第一源极区和第一漏极区域由包含硅的第二硅化物和第一金属材料构成并形成为夹持p型半导体有源区。

48. 发明授权

US07208353B2 Semiconductor device and manufacturing method thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07208353B2
公开(公告)日：2007-04-24
申请号：US11137539
申请日：2005-05-26
申请人： Atsushi Yagishita , Ichiro Mizushima , Tsutomu Sato
发明人： Atsushi Yagishita , Ichiro Mizushima , Tsutomu Sato
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： H01L29/66772 , H01L21/84 , H01L27/1203 , H01L29/66545 , H01L29/78639 , H01L29/78648
摘要： A semiconductor device comprises a support layer made of semiconductor, a diffusion layer formed by implanting impurities in a surface layer of the support layer, a buried insulating layer provided on the diffusion layer, an island-like active layer provided on the buried insulating layer, a channel region formed in the active layer, source and drain regions formed in the active layer, sandwiching the channel region, a gate insulating film formed on the channel region, a gate electrode formed on the gate insulating film and on side surfaces of the island-like active layer, and insulated and isolated from the channel, source, and drain regions, and an electrode connected to the active layer.
摘要翻译：半导体器件包括由半导体制成的支撑层，通过在支撑层的表面层中注入杂质形成的扩散层，设置在扩散层上的掩埋绝缘层，设置在掩埋绝缘层上的岛状有源层，形成在有源层中的沟道区域，形成在有源层中的源极和漏极区域，夹持沟道区域，形成在沟道区域上的栅极绝缘膜，形成在栅极绝缘膜上的栅电极和岛的侧表面类型的有源层，并且与沟道，源极和漏极区域绝缘和隔离，以及连接到有源层的电极。

49. 发明申请

US20070023795A1 Semiconductor device and method of fabricating the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070023795A1
公开(公告)日：2007-02-01
申请号：US11486004
申请日：2006-07-14
申请人： Hajime Nagano , Atsushi Yagishita
发明人： Hajime Nagano , Atsushi Yagishita
IPC分类号： H01L29/76 , H01L21/336
CPC分类号： H01L29/66545 , H01L21/823807 , H01L21/823814 , H01L29/66628 , H01L29/7842 , H01L29/7848
摘要： A semiconductor device includes a metal oxide semiconductor (MOS) transistor including two source/drain regions located at a surface layer side of the semiconductor substrate, a stress-inducing film formed so as to cover the source/drain region of the MOS transistor, the stress-inducing film applying stress to a channel region formed between the source/drain regions and having an opening corresponding to an electrical connection region of the source/drain regions, the opening having a first dimension with respect to a propagation direction of a charge carrier moving within the channel region of the MOS transistor and a second dimension with respect to a direction perpendicular to the propagation direction of the MOS transistor, the first dimension being larger than the second dimension.
摘要翻译：半导体器件包括金属氧化物半导体（MOS）晶体管，其包括位于半导体衬底的表面层侧的两个源极/漏极区域，形成为覆盖MOS晶体管的源极/漏极区域的应力诱导膜，应力诱导膜对形成在源/漏区之间的沟道区施加应力，并且具有对应于源极/漏极区的电连接区的开口，该开口相对于电荷载流子的传播方向具有第一维度在所述MOS晶体管的沟道区域内移动，并且相对于与所述MOS晶体管的传播方向垂直的方向为第二尺寸，所述第一尺寸大于所述第二尺寸。

50. 发明申请

US20060071291A1 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060071291A1
公开(公告)日：2006-04-06
申请号：US11236723
申请日：2005-09-28
申请人： Atsushi Yagishita
发明人： Atsushi Yagishita
IPC分类号： H01L31/07 , H01L21/28
CPC分类号： H01L29/785 , H01L29/42392 , H01L29/66628 , H01L29/66643 , H01L29/66795 , H01L29/78618 , H01L2029/7857
摘要： A semiconductor device includes a semiconductor substrate, and a MOS transistor provided on the semiconductor substrate and having a channel type of a first conductivity, the MOS transistor comprising a semiconductor region of the first conductivity type including first and second channel regions, gate insulating films provided on the first and second channel regions, a gate electrode provided on the gate insulating films, and first and second source/drain regions which are located at a distance from each other so as to sandwich the first and second channel regions, the first and second source/drain regions contacting the semiconductor region of the first conductivity type and forming a Schottky junction.
摘要翻译：半导体器件包括半导体衬底和设置在半导体衬底上并且具有沟道类型的第一导电性的MOS晶体管，所述MOS晶体管包括第一导电类型的包括第一和第二沟道区的半导体区，提供栅极绝缘膜在第一和第二沟道区上，设置在栅极绝缘膜上的栅电极以及彼此间隔一定距离的第一和第二源极/漏极区，以夹持第一和第二沟道区，第一和第二沟道区源极/漏极区域与第一导电类型的半导体区域接触并形成肖特基结。

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