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41. 发明授权

US08131056B2 Constructing variability maps by correlating off-state leakage emission images to layout information 失效
标题翻译：通过将非状态泄漏图像与布局信息相关联来构建变异性图
公开(公告)号：US08131056B2
公开(公告)日：2012-03-06
申请号：US12241926
申请日：2008-09-30
申请人： Stanislav Polonsky , Peilin Song , Franco Stellari , Alan J. Weger
发明人： Stanislav Polonsky , Peilin Song , Franco Stellari , Alan J. Weger
IPC分类号： G06K9/00
CPC分类号： G06T7/001 , G06T2207/30148
摘要： Improved techniques are disclosed for monitoring or sensing process variations in integrated circuit designs. Such techniques provide such improvements by constructing variability maps correlating leakage emission images to layout information. By way of example, a method for monitoring one or more manufacturing process variations associated with a device under test (e.g., integrated circuit) comprises the following steps. An emission image representing an energy emission associated with a leakage current of the device under test is obtained. The emission image is correlated with a layout of the device under test to form a cross emission image. Common structures on the cross emission image are selected and identified as regions of interest. One or more variability measures (e.g., figures of merit) are calculated based on the energy emissions associated with the regions of interest. A variability map is created based on the calculated variability measures, wherein the variability map is useable to monitor the one or more manufacturing process variations associated with the device under test.
摘要翻译：公开了用于监测或感测集成电路设计中的工艺变化的改进的技术。这样的技术通过构建将泄漏发射图像与布局信息相关联的可变性图来提供这样的改进。作为示例，用于监测与被测器件（例如，集成电路）相关联的一个或多个制造工艺变化的方法包括以下步骤。获得表示与被测设备的泄漏电流相关联的能量发射的发射图像。发射图像与待测器件的布局相关，以形成交叉发射图像。选择交叉发射图像上的共同结构并将其识别为感兴趣的区域。基于与感兴趣区域相关联的能量排放来计算一个或多个可变性度量（例如，品质因素）。基于所计算的变异性度量创建变异性图，其中可变性图可用于监测与被测设备相关联的一个或多个制造过程变化。

42. 发明申请

US20100025249A1 Systems and Methods for Controlling the Position of a Charged Polymer Inside a Nanopore 审中-公开
标题翻译：控制纳米孔内电荷聚合物位置的系统和方法
公开(公告)号：US20100025249A1
公开(公告)日：2010-02-04
申请号：US12540553
申请日：2009-08-13
申请人： Stanislav Polonsky , Stephen M. Rossnagel , Gustavo A. Stolovitzky
发明人： Stanislav Polonsky , Stephen M. Rossnagel , Gustavo A. Stolovitzky
IPC分类号： B01D61/46
CPC分类号： G01N33/48721 , B82Y15/00 , B82Y30/00 , C12Q1/6825 , C12Q1/6869 , G01N2015/0038 , Y10S977/924 , C12Q2565/631 , C12Q2565/607 , C12Q2563/155
摘要： Techniques for controlling the position of a charged polymer inside a nanopore are provided. For example, one technique includes using electrostatic control to position a linear charged polymer inside a nanopore, and creating an electrostatic potential well inside the nanopore, wherein the electrostatic potential well controls a position of the linear charged polymer inside the nanopore.
摘要翻译：提供了用于控制纳米孔内带电聚合物位置的技术。例如，一种技术包括使用静电控制将线性带电聚合物定位在纳米孔内，并在纳米孔内产生静电势阱，其中静电势阱控制纳米孔内线性带电聚合物的位置。

43. 发明授权

US07446550B2 Enhanced signal observability for circuit analysis 有权
标题翻译：电路分析增强的信号可观测性
公开(公告)号：US07446550B2
公开(公告)日：2008-11-04
申请号：US11949325
申请日：2007-12-03
申请人： Chandler Todd McDowell , Stanislav Polonsky , Peilin Song , Franco Stellari , Alan J. Weger
发明人： Chandler Todd McDowell , Stanislav Polonsky , Peilin Song , Franco Stellari , Alan J. Weger
IPC分类号： G01R31/02
CPC分类号： G01R31/311
摘要： Methods and arrangements to enhance photon emissions responsive to a signal within an integrated circuit (IC) for observability of signal states utilizing, e.g., picosecond imaging circuit analysis (PICA), are disclosed. Embodiments attach a beacon to the signal of interest and apply a voltage across the beacon to enhance photon emissions responsive to the signal of interest. The voltage is greater than the operable circuit voltage, Vdd, to enhance photon emissions with respect to intensity and energy. Thus, the photon emissions are more distinguishable from noise. In many embodiments, the beacon includes a transistor and, in several embodiments, the beacon includes an enablement device to enable and disable photon emissions from the beacon. Further, a PICA detector may capture photon emissions from the beacon and process the photons to generate time traces.
摘要翻译：公开了利用例如皮秒成像电路分析（PICA）来增强响应于集成电路（IC）内的信号的信号状态的可观察性的光子发射的方法和装置。实施例将信标连接到感兴趣的信号，并在信标之间施加电压以增强响应于感兴趣的信号的光子发射。电压大于可操作电路电压Vdd，以增强相对于强度和能量的光子发射。因此，光子发射与噪声更为区别。在许多实施例中，信标包括晶体管，并且在几个实施例中，信标包括启用和禁用来自信标的光子发射的启用装置。此外，PICA检测器可以捕获来自信标的光子发射并处理光子以产生时间迹线。

44. 发明申请

US20080187915A1 Systems and Methods for Controlling the Position of a Charged Polymer Inside a Nanopore 有权
标题翻译：控制纳米孔内电荷聚合物位置的系统和方法
公开(公告)号：US20080187915A1
公开(公告)日：2008-08-07
申请号：US11670621
申请日：2007-02-02
申请人： Stanislav Polonsky , Stephen M. Rossnagel , Gustavo A. Stolovitzky
发明人： Stanislav Polonsky , Stephen M. Rossnagel , Gustavo A. Stolovitzky
IPC分类号： C12Q1/68 , G01N27/30
CPC分类号： G01N33/48721 , B82Y15/00 , B82Y30/00 , C12Q1/6825 , C12Q1/6869 , G01N2015/0038 , Y10S977/924 , C12Q2565/631 , C12Q2565/607 , C12Q2563/155
摘要： Techniques for controlling the position of a charged polymer inside a nanopore are provided. For example, one technique includes using electrostatic control to position a linear charged polymer inside a nanopore, and creating an electrostatic potential well inside the nanopore, wherein the electrostatic potential well controls a position of the linear charged polymer inside the nanopore.
摘要翻译：提供了用于控制纳米孔内带电聚合物位置的技术。例如，一种技术包括使用静电控制将线性带电聚合物定位在纳米孔内，并在纳米孔内产生静电势阱，其中静电势阱控制纳米孔内线性带电聚合物的位置。

45. 发明授权

US07114136B2 Method for VLSI system debug and timing analysis 有权
标题翻译： VLSI系统调试和时序分析方法
公开(公告)号：US07114136B2
公开(公告)日：2006-09-26
申请号：US10663020
申请日：2003-09-16
申请人： Harold W. Chase , Daniel R. Knebel , Dennis G. Menzer , Stanislav Polonsky , Pia N. Sanda
发明人： Harold W. Chase , Daniel R. Knebel , Dennis G. Menzer , Stanislav Polonsky , Pia N. Sanda
IPC分类号： G06F17/50
CPC分类号： G06F17/5031
摘要： A method for characterizing circuit activity in an IC. Generally, the method comprises the steps of activating an IC, resolving the switching activity in space and time, and generating a representation of the switching behavior which differentiates the time that circuits or transistors switch. One embodiment of the invention, utilizes a method such as, but not limited to, time resolved photon emission to observe transistor level switching activity in an integrated circuit (IC).
摘要翻译：一种用于表征IC中的电路活动的方法。通常，该方法包括以下步骤：激活IC，解决空间和时间的切换活动，以及生成区分电路或晶体管切换时间的开关行为的表示。本发明的一个实施例利用诸如但不限于时间分辨光子发射的方法来观察集成电路（IC）中的晶体管级切换活动。

46. 发明申请

US20060028219A1 Enhanced signal observability for circuit analysis 有权
标题翻译：电路分析增强的信号可观测性
公开(公告)号：US20060028219A1
公开(公告)日：2006-02-09
申请号：US10912493
申请日：2004-08-05
申请人： Chandler McDowell , Stanislav Polonsky , Peilin Song , Franco Stellari , Alan Weger
发明人： Chandler McDowell , Stanislav Polonsky , Peilin Song , Franco Stellari , Alan Weger
IPC分类号： G01R31/28 , G06K9/00
CPC分类号： G01R31/311
摘要： Methods and arrangements to enhance photon emissions responsive to a signal within an integrated circuit (IC) for observability of signal states utilizing, e.g., picosecond imaging circuit analysis (PICA), are disclosed. Embodiments attach a beacon to the signal of interest and apply a voltage across the beacon to enhance photon emissions responsive to the signal of interest. The voltage is greater than the operable circuit voltage, Vdd, to enhance photon emissions with respect to intensity and energy. Thus, the photon emissions are more distinguishable from noise. In many embodiments, the beacon includes a transistor and, in several embodiments, the beacon includes an enablement device to enable and disable photon emissions from the beacon. Further, a PICA detector may capture photon emissions from the beacon and process the photons to generate time traces.
摘要翻译：公开了利用例如皮秒成像电路分析（PICA）来增强响应于集成电路（IC）内的信号的信号状态的可观察性的光子发射的方法和装置。实施例将信标连接到感兴趣的信号，并在信标之间施加电压以增强响应于感兴趣的信号的光子发射。电压大于可操作电路电压Vdd，以增强相对于强度和能量的光子发射。因此，光子发射与噪声更为区别。在许多实施例中，信标包括晶体管，并且在几个实施例中，信标包括启用和禁用来自信标的光子发射的启用装置。此外，PICA检测器可以捕获来自信标的光子发射并处理光子以产生时间迹线。

47. 发明申请

US20050189655A1 Integrated circuit chip utilizing carbon nanotube composite interconnection vias 有权
标题翻译：使用碳纳米管复合互连通孔的集成电路芯片
公开(公告)号：US20050189655A1
公开(公告)日：2005-09-01
申请号：US10787640
申请日：2004-02-26
申请人： Toshiharu Furukawa , Mark Hakey , David Horak , Charles Koburger , Mark Masters , Peter Mitchell , Stanislav Polonsky
发明人： Toshiharu Furukawa , Mark Hakey , David Horak , Charles Koburger , Mark Masters , Peter Mitchell , Stanislav Polonsky
IPC分类号： H01L21/285 , H01L21/768 , H01L23/522 , H01L23/48
CPC分类号： B82Y10/00 , H01L21/28562 , H01L21/76877 , H01L23/5226 , H01L2221/1094 , H01L2924/0002 , Y10S977/742 , Y10S977/842 , H01L2924/00
摘要： Conductive paths in an integrated circuit are formed using multiple undifferentiated carbon nanotubes embedded in a conductive metal, which is preferably copper. Preferably, conductive paths include vias running between conductive layers. Preferably, composite vias are formed by forming a metal catalyst pad on a conductor at the via site, depositing and etching a dielectric layer to form a cavity, growing substantially parallel carbon nanotubes on the catalyst in the cavity, and filling the remaining voids in the cavity with copper. The next conductive layer is then formed over the via hole.
摘要翻译：集成电路中的导电路径使用嵌入导电金属中的多个未分化碳纳米管形成，优选为铜。优选地，导电路径包括在导电层之间延伸的通孔。优选地，通过在通孔位置的导体上形成金属催化剂垫，沉积和蚀刻介电层以形成空腔，在空腔中的催化剂上基本上平行地生长碳纳米管，并填充其中的剩余空隙来形成复合通孔有铜的腔。然后在通孔上形成下一导电层。

48. 发明授权

US08407632B2 Detecting dose and focus variations during photolithography 失效
标题翻译：在光刻期间检测剂量和聚焦变化
公开(公告)号：US08407632B2
公开(公告)日：2013-03-26
申请号：US12881548
申请日：2010-09-14
申请人： Ibrahim M. Elfadel , Ying Liu , Stanislav Polonsky , Amith Singhee
发明人： Ibrahim M. Elfadel , Ying Liu , Stanislav Polonsky , Amith Singhee
IPC分类号： G06F17/50
CPC分类号： G03F7/705 , G03F7/70658
摘要： A method, system, and computer usable program product for detecting dose and focus variations during photolithography are provided in the illustrative embodiments. A test shape is formed on a wafer, the wafer being used to manufacture integrated circuits, the test shape being formed using a dose value and a focus value that are predetermined for the manufacturing. A capacitance of the test shape is measured. The capacitance is resolved to a second dosing value and a second focus value using an extraction model. A difference between the dosing value and the second dosing value is computed. A recommendation is made for dosing adjustment in the manufacturing based on the difference.
摘要翻译：在说明性实施例中提供了用于在光刻期间检测剂量和聚焦变化的方法，系统和计算机可用程序产品。在晶片上形成测试形状，该晶片用于制造集成电路，该测试形状使用为制造预定的剂量值和聚焦值形成。测量测试形状的电容。使用提取模型将电容解析为第二计量值和第二焦点值。计算给药值和第二给药值之间的差异。基于差异，建议制造中的剂量调整。

49. 发明申请

US20110179852A1 Molecule Detection Device Formed in a Semiconductor Structure 有权
标题翻译：形成在半导体结构中的分子检测装置
公开(公告)号：US20110179852A1
公开(公告)日：2011-07-28
申请号：US12694712
申请日：2010-01-27
申请人： Stanislav Polonsky , Frank Suits
发明人： Stanislav Polonsky , Frank Suits
IPC分类号： G01N30/60 , G01N30/74 , G01N30/88 , H01L21/02
CPC分类号： B82Y15/00 , G01N30/6095
摘要： Semiconductor devices, chromatography devices and integrated circuits for detecting one or more molecules and methods for forming a semiconductor device for detecting one or more molecules are presented. For example, a semiconductor device for detecting one or more molecules includes a channel formed within a semiconductor structure, and at least one detector formed within the semiconductor structure. The at least one detector detects the one or more molecules in the channel The semiconductor device may optionally comprise one or more additional channels formed within the semiconductor structure. The semiconductor device may, for example, be operative to detect a single molecule.
摘要翻译：提供用于检测一个或多个分子的半导体器件，色谱装置和集成电路以及用于形成用于检测一个或多个分子的半导体器件的方法。例如，用于检测一个或多个分子的半导体器件包括形成在半导体结构内的沟道和形成在半导体结构内的至少一个检测器。所述至少一个检测器检测通道中的一个或多个分子。半导体器件可以可选地包括在半导体结构内形成的一个或多个附加通道。例如，半导体器件可以用于检测单个分子。

50. 发明授权

US07473633B2 Method for making integrated circuit chip having carbon nanotube composite interconnection vias 有权
标题翻译：制造具有碳纳米管复合互连通孔的集成电路芯片的方法
公开(公告)号：US07473633B2
公开(公告)日：2009-01-06
申请号：US11458726
申请日：2006-07-20
申请人： Toshiharu Furukawa , Mark Charles Hakey , David Vaclav Horak , Charles William Koburger, III , Mark Eliot Masters , Peter H Mitchell , Stanislav Polonsky
发明人： Toshiharu Furukawa , Mark Charles Hakey , David Vaclav Horak , Charles William Koburger, III , Mark Eliot Masters , Peter H Mitchell , Stanislav Polonsky
IPC分类号： H01L21/4763
CPC分类号： B82Y10/00 , H01L21/28562 , H01L21/76877 , H01L23/5226 , H01L2221/1094 , H01L2924/0002 , Y10S977/742 , Y10S977/842 , H01L2924/00
摘要： Conductive paths in an integrated circuit are formed using multiple undifferentiated carbon nanotubes embedded in a conductive metal, which is preferably copper. Preferably, conductive paths include vias running between conductive layers. Preferably, composite vias are formed by forming a metal catalyst pad on a conductor at the via site, depositing and etching a dielectric layer to form a cavity, growing substantially parallel carbon nanotubes on the catalyst in the cavity, and filling the remaining voids in the cavity with copper. The next conductive layer is then formed over the via hole.
摘要翻译：集成电路中的导电路径使用嵌入导电金属中的多个未分化碳纳米管形成，优选为铜。优选地，导电路径包括在导电层之间延伸的通孔。优选地，通过在通孔位置的导体上形成金属催化剂垫，沉积和蚀刻介电层以形成空腔，在空腔中的催化剂上基本上平行地生长碳纳米管，并填充其中的剩余空隙来形成复合通孔有铜的腔。然后在通孔上形成下一导电层。

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