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    • 42. 发明申请
    • OVERVOLTAGE AND OVERCURRENT PROTECTION CIRCUIT
    • 过电流和过流保护电路
    • US20130021701A1
    • 2013-01-24
    • US13207431
    • 2011-08-11
    • JI-XIANG YINYANG XINYIN-ZHAN WANGJUN ZHANGTSUNG-JEN CHUANGSHIH-FANG WONG
    • JI-XIANG YINYANG XINYIN-ZHAN WANGJUN ZHANGTSUNG-JEN CHUANGSHIH-FANG WONG
    • H02H3/00
    • H02H3/08H02H3/20
    • An overvoltage and overcurrent protection circuit includes a connection jack, an overvoltage protection switch connected to the connection jack, an overcurrent protection switch, a voltage reference module, an overvoltage and overcurrent detection module, a comparing module, and a current control module. The overcurrent protection switch is connected to the overvoltage protection switch in serials, and further connected to a load. The voltage reference module is to output a reference voltage. The overvoltage and overcurrent detection module is to detect the voltage of the load and the current of the path. The comparing module is to compare the voltage of the load with the reference voltage, when greater, turns off the overvoltage protection switch, when not greater, turns on the overvoltage protection switch. The current control module is to turn off the overcurrent protection switch if greater than the preset value, and turn on the overcurrent protection switch if not greater.
    • 过电压和过流保护电路包括连接插座,连接插座的过电压保护开关,过流保护开关,电压参考模块,过电压和过电流检测模块,比较模块和电流控制模块。 过流保护开关连接到过压保护开关,并连接到负载。 电压基准模块输出参考电压。 过电压和过流检测模块用于检测负载电压和路径电流。 比较模块是将负载电压与参考电压进行比较,当较大时,关断过电压保护开关,当不大时,接通过电压保护开关。 当前的控制模块是关闭过流保护开关,如果大于预设值,并且如果不是更大的话,打开过流保护开关。
    • 44. 发明授权
    • Testing device and method for SM memory connector
    • SM存储器连接器的测试装置和方法
    • US08248078B2
    • 2012-08-21
    • US12617943
    • 2009-11-13
    • Yang-Xin Chen
    • Yang-Xin Chen
    • G01R31/04G01R31/00
    • G11C29/56G11C29/022
    • A testing device for testing surface-mounted (SM) memory connectors on a circuit board is provided. The testing device includes a main control circuit storing standard pin information of the SM memory connectors. A data collecting circuit is connected to the main control circuit and to at least one SM memory connector of the circuit board. A display unit is connected to the main control unit. The main control circuit directs the at least one data collecting circuit to read pin information of the SM memory connector and transmit the pin information to the main control circuit. The main control circuit manages the collected pin information in accordance with the standard pin information and shows the results on the display unit.
    • 提供了一种用于测试电路板上表面安装(SM)存储器连接器的测试装置。 测试装置包括存储SM存储器连接器的标准引脚信息的主控制电路。 数据采集​​电路连接到主控制电路和电路板的至少一个SM存储器连接器。 显示单元连接到主控制单元。 主控制电路引导至少一个数据采集电路读取SM存储器连接器的引脚信息,并将引脚信息发送到主控制电路。 主控电路根据标准引脚信息管理收集的引脚信息,并在显示单元上显示结果。
    • 45. 发明申请
    • TESTING APPARATUS FOR TESTING PORTS OF PRINTED CIRCUIT BOARD
    • 印刷电路板测试台的测试装置
    • US20120153985A1
    • 2012-06-21
    • US13170969
    • 2011-06-28
    • BO ZHANGYANG-XIN CHEN
    • BO ZHANGYANG-XIN CHEN
    • G01R31/304
    • G06F11/221
    • A test assembly includes a printed circuit board, a first subsidiary test chipset, a second subsidiary test chipset, and a main test chipset. The printed circuit board includes a first CPU socket and a second CPU socket. The first CPU socket includes a first socket pin. The second CPU socket includes a second socket pin. The first subsidiary test chipset connects to the first CPU socket. The second subsidiary test chipset connects to the second CPU socket. The main test chipset connects to the first subsidiary test chipset and the second subsidiary test chipset. The first subsidiary test chipset outputs a first signal to the first socket pin. The second subsidiary test chipset receives a second signal from the second socket pin. The main test chipset compares the first signal and the second signal to test a connection of the first socket pin and the second socket pin.
    • 测试组件包括印刷电路板,第一辅助测试芯片组,第二辅助测试芯片组和主测试芯片组。 印刷电路板包括第一CPU插槽和第二CPU插槽。 第一个CPU插座包括一个第一个插座引脚。 第二个CPU插座包括一个第二个插座引脚。 第一个附属测试芯片组连接到第一个CPU插槽。 第二个辅助测试芯片组连接到第二个CPU插槽。 主要测试芯片组连接到第一个辅助测试芯片组和第二个辅助测试芯片组。 第一辅助测试芯片组向第一插座引脚输出第一信号。 第二辅助测试芯片组从第二插座引脚接收第二信号。 主测试芯片组比较第一信号和第二信号以测试第一插座销和第二插座销的连接。