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41. 发明授权

US08951855B2 Manufacturing method for semiconductor device having metal gate 有权
标题翻译：具有金属栅极的半导体器件的制造方法
公开(公告)号：US08951855B2
公开(公告)日：2015-02-10
申请号：US13454337
申请日：2012-04-24
申请人： Chien-Ming Lai , Rai-Min Huang , Tong-Jyun Huang , Che-Hua Hsu , Yi-Wen Chen
发明人： Chien-Ming Lai , Rai-Min Huang , Tong-Jyun Huang , Che-Hua Hsu , Yi-Wen Chen
IPC分类号： H01L21/8238
CPC分类号： H01L21/823842 , H01L29/66545
摘要： A manufacturing method for a semiconductor device having a metal gate is provided. First and second gate trenches are respectively formed in first and second semiconductor devices. A work-function metal layer is formed in the first and second gate trenches. A shielding layer is formed on the substrate. A first removing step is performed, so that the remaining shielding layer is at bottom of the second gate trench and fills up the first gate trench. A second removing step is performed, so that the remaining shielding layer is at bottom of the first gate trench to expose the work-function metal layer at sidewall of the first gate trench and in the second gate trench. The work-function metal layer not covered by the remaining shielding layer is removed, so that the remaining work-function metal layer is only at bottom of the first gate trench. The remaining shielding layer is removed.
摘要翻译：提供一种具有金属栅极的半导体器件的制造方法。第一和第二栅极沟槽分别形成在第一和第二半导体器件中。工作功能金属层形成在第一和第二栅极沟槽中。在基板上形成屏蔽层。执行第一去除步骤，使得剩余的屏蔽层位于第二栅极沟槽的底部并填充第一栅极沟槽。执行第二去除步骤，使得剩余的屏蔽层位于第一栅极沟槽的底部，以在第一栅极沟槽的侧壁和第二栅极沟槽中露出功函数金属层。除去未被剩余屏蔽层覆盖的功函数金属层，使剩余的功函数金属层仅在第一栅极沟槽的底部。剩下的屏蔽层被去除。

42. 发明申请

US20140176904A1 Ophthalmic Aberrometer Capable of Subjective Refraction 审中-公开
$Ophthalmic Aberrometer Capable of Subjective Refraction$
标题翻译：具有主观折射能力的眼科测试仪
公开(公告)号：US20140176904A1
公开(公告)日：2014-06-26
申请号：US14076276
申请日：2013-11-11
申请人： Ming Lai
发明人： Ming Lai
IPC分类号： A61B3/103
CPC分类号： A61B3/1035
摘要： The present invention contemplates an ophthalmic aberrometer combining measurements of wavefront aberrations and subjective refraction into a single instrument and refers both measurements to the same corneal plane The present invention also contemplates an ophthalmic aberrometer employing an open field and subjective correction to overcome instrument myopia and to ensure accurate measurement of the best-corrected visual acuity in addition to measurement of wavefront aberrations. The present invention further contemplates an ophthalmic aberrometer implementing an optical relay with adjustable optical power compensation to eliminate the need for flipping plurality sets of trial lenses for defocus correction. The present invention also further contemplates an ophthalmic aberrometer making wavefront measurement along a viewing path of the subject eye and enabling accurate measurement of the residual wavefront aberrations after compensating for the subjective refraction.
摘要翻译：本发明考虑了将眼波像差和主观折射的测量结合到单个仪器中并将两个测量结合到同一角膜平面上的眼科像差仪。本发明还考虑采用开放场和主观矫正以克服仪器近视并确保除了测量波前像差以外，精确测量最佳矫正视力。本发明进一步考虑了一种实现具有可调光功率补偿的光学继电器的眼科畸变器，以消除对多组试镜进行离焦校正的翻转的需要。本发明还进一步考虑了一种眼科像差仪，沿着被检眼的观察路线进行波前测量，并且能够在补偿主观折射之后准确测量残留波前像差。

43. 发明授权

US08759186B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08759186B2
公开(公告)日：2014-06-24
申请号：US13354334
申请日：2012-01-20
申请人： Yung-Hui Yeh , Chih-Ming Lai
发明人： Yung-Hui Yeh , Chih-Ming Lai
IPC分类号： H01L33/08
CPC分类号： H01L29/7869 , H01L27/1225 , H01L27/1248 , H01L29/66969
摘要： A method for manufacturing a semiconductor device includes forming a metal oxide semiconductor layer and a first insulating layer on a substrate. A gate is formed on the first insulating layer. The first insulating layer is patterned by using the gate as an etching mask so as to expose the metal oxide semiconductor layer to serve as a source region and a drain region. A dielectric layer is formed on the substrate to cover the gate and the oxide semiconductor layer, where the dielectric layer has at least one of hydrogen group and hydroxyl group. A heating treatment is performed so that the at least one of hydrogen group and hydroxyl group reacts with the source region and the drain region. A source electrode and a drain electrode electrically connected to the source region and the drain region respectively are formed on the dielectric layer.
摘要翻译：一种制造半导体器件的方法包括在衬底上形成金属氧化物半导体层和第一绝缘层。在第一绝缘层上形成栅极。通过使用栅极作为蚀刻掩模来对第一绝缘层进行构图，以使金属氧化物半导体层暴露于源极区和漏极区。在基板上形成介电层以覆盖栅极和氧化物半导体层，其中电介质层具有氢基和羟基中的至少一个。进行加热处理，使得氢基和羟基中的至少一个与源极区和漏极区反应。在电介质层上分别形成与源极区域和漏极区域电连接的源极电极和漏极电极。

44. 发明授权

US08721113B2 Lamp cover and lamp structure 有权
标题翻译：灯罩和灯泡结构
公开(公告)号：US08721113B2
公开(公告)日：2014-05-13
申请号：US13240723
申请日：2011-09-22
申请人： Chun-Ming Lai , Shih-Chin Chou , Chin-Kun Hsieh , Mei-Fen Lin
发明人： Chun-Ming Lai , Shih-Chin Chou , Chin-Kun Hsieh , Mei-Fen Lin
IPC分类号： F21V21/00 , F21V29/00 , F21V5/04 , F21V5/00
CPC分类号： F21V3/049 , F21K9/27 , F21K9/66 , F21K9/69 , F21V5/002 , F21Y2103/10 , F21Y2115/10
摘要： A cover and a lamp structure. The cover whose curvature has a light incident surface and a light outgoing surface, and includes a plurality of 3D micro-structures disposed thereon and arranged in the form of an array. When a light is emitted into the light outgoing surface from the light incident surface, the light emitting angle of the light outgoing surface is increased through the refraction of the 3D micro-structures, so that the occurrence of mura or spots due to uneven distribution of the light is avoid.
摘要翻译：盖和灯结构。其曲率具有光入射表面和光出射表面的盖，并且包括布置在其上并以阵列形式布置的多个3D微结构。当光从光入射面发射到光出射面时，通过3D微结构的折射，光出射面的光发射角度增加，使得由于不均匀分布引起的光斑或斑点的发生灯光是避免的。

45. 发明申请

US20140070377A1 COMPOUND SEMICONDUCTOR EPITAXIAL STRUCTURE AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：化合物半导体外延结构及其制备方法
公开(公告)号：US20140070377A1
公开(公告)日：2014-03-13
申请号：US13606007
申请日：2012-09-07
申请人： Tien-Wei YU , Chin-Cheng CHIEN , I-Ming LAI , Shin-Chi CHEN , Chih-Yueh LI , Fong-Lung CHUANG , Chin-I LIAO , Kuan-Yu LIN
发明人： Tien-Wei YU , Chin-Cheng CHIEN , I-Ming LAI , Shin-Chi CHEN , Chih-Yueh LI , Fong-Lung CHUANG , Chin-I LIAO , Kuan-Yu LIN
IPC分类号： C30B25/14 , H01L29/36
CPC分类号： H01L21/02639 , C30B25/165 , C30B29/52 , H01L21/02381 , H01L21/0245 , H01L21/02505 , H01L21/0251 , H01L21/02532 , H01L21/02579 , H01L21/0262 , H01L29/66628 , H01L29/66636 , H01L29/7848
摘要： A method for fabricating a compound semiconductor epitaxial structure includes the following steps. Firstly, a first compound epitaxial layer is formed on a substrate. Then, a continuous epitaxial deposition process is performed to form a second compound epitaxial layer on the first compound epitaxial layer, so that the second compound epitaxial layer has a linearly-decreased concentration gradient of metal. Afterwards, a semiconductor material layer is formed on the second compound epitaxial layer.
摘要翻译：一种制备化合物半导体外延结构的方法包括以下步骤。首先，在基板上形成第一复合外延层。然后，进行连续的外延沉积工艺以在第一复合外延层上形成第二化合物外延层，使得第二化合物外延层具有线性降低的金属浓度梯度。之后，在第二复合外延层上形成半导体材料层。

46. 发明申请

US20140024183A1 METHOD OF FORMING SEMICONDUCTOR STRUCTURE 有权
标题翻译：形成半导体结构的方法
公开(公告)号：US20140024183A1
公开(公告)日：2014-01-23
申请号：US13632162
申请日：2012-10-01
申请人： Chen-Chiu Hsu , Tung-Ming Lai , Kai-An Hsueh , Ming-De Huang
发明人： Chen-Chiu Hsu , Tung-Ming Lai , Kai-An Hsueh , Ming-De Huang
IPC分类号： H01L21/8239
CPC分类号： H01L27/11541 , H01L27/0629 , H01L27/11524 , H01L27/11543 , H01L28/20 , H01L28/40
摘要： A method of forming a semiconductor structure is provided. A substrate having a cell area and a periphery area is provided. An oxide material layer and a first conductive material layer are sequentially formed on the substrate in the cell and periphery areas. A patterning step is performed to form first and second stacked structures on the substrate respectively in the cell and periphery areas. First and second spacers are formed respectively on sidewalls of the first and second stacked structures. At least two first doped regions are formed in the substrate beside the first stacked structure, and two second doped regions are formed in the substrate beside the second stacked structure. A dielectric layer and a second conductive layer are formed at least on the first stacked structure. The first stacked structure, the dielectric layer, and the second conductive layer in the cell area constitute a charge storage structure.
摘要翻译：提供一种形成半导体结构的方法。提供具有单元区域和周边区域的基板。氧化物材料层和第一导电材料层依次形成在电池和周边区域的基板上。执行图案化步骤以在基板和外围区域中分别在基板上形成第一和第二堆叠结构。分别在第一和第二堆叠结构的侧壁上形成第一和第二间隔物。在第一层叠结构旁边的基板中形成至少两个第一掺杂区域，在第二层叠结构旁边的基板上形成两个第二掺杂区域。至少在第一堆叠结构上形成电介质层和第二导电层。电池区域中的第一堆叠结构，电介质层和第二导电层构成电荷存储结构。

47. 发明授权

US08587862B2 Second-harmonic generation nonliner frenquency converter 有权
标题翻译：二次谐波发生非线性频率转换器
公开(公告)号：US08587862B2
公开(公告)日：2013-11-19
申请号：US13218462
申请日：2011-08-26
申请人： Jiun-Wei Liou , Jun-Ying Li , Chih-Ming Lai , Chern-Lin Chen , Way-Seen Wang , Lung-Han Peng
发明人： Jiun-Wei Liou , Jun-Ying Li , Chih-Ming Lai , Chern-Lin Chen , Way-Seen Wang , Lung-Han Peng
IPC分类号： G02F1/37 , G02F1/35
CPC分类号： G02F1/37 , G02F1/3558 , G02F1/3775
摘要： A second-harmonic generation nonlinear frequency converter includes a nonlinear optical crystal. The nonlinear optical crystal includes a plurality of sections. The sections connect to each other in sequence, and each section has a phase different from others. Each of the phases includes a positive domain and a negative domain. Each of the sections includes a plurality of quasi-phase-matching structures. The quasi-phase-matching structures connect to each other in sequence and have the same phase in one section.
摘要翻译：二次谐波发生非线性频率转换器包括非线性光学晶体。非线性光学晶体包括多个部分。这些部分依次相互连接，每个部分的阶段与其他部分不同。每个相包括正域和负域。每个部分包括多个准相位匹配结构。准相位匹配结构依次相互连接，在一个部分中具有相同的相位。

48. 发明授权

US08569389B2 Organic/inorganic hybrid composite proton exchange membrane 有权
标题翻译：有机/无机杂化复合质子交换膜
公开(公告)号：US08569389B2
公开(公告)日：2013-10-29
申请号：US12981464
申请日：2010-12-29
申请人： Li-Duan Tsai , Yong-Hong Liao , Shih-Wen Chen , Jiunn-Nan Lin , Chien-Ming Lai , Chiu-Ping Huang , Sung-Chun Chang
发明人： Li-Duan Tsai , Yong-Hong Liao , Shih-Wen Chen , Jiunn-Nan Lin , Chien-Ming Lai , Chiu-Ping Huang , Sung-Chun Chang
IPC分类号： C08J5/22 , B82Y30/00
CPC分类号： H01M8/1048 , H01M8/1023 , H01M8/1025 , H01M8/1027 , H01M8/103 , H01M8/1032 , H01M8/1039 , H01M8/1051
摘要： An organic/inorganic hybrid composite proton exchange membrane is provided. The proton exchange membrane includes an inorganic material of about 0.5-30 parts by weight and an organic material of about 99.5-70 parts by weight per 100 parts by weight of the proton exchange membrane. A surface area of the inorganic material is about 50-3000 m2/g. The organic material includes a sulfonated polymer or a phosphoric acid doped polymer.
摘要翻译：提供有机/无机杂化复合质子交换膜。质子交换膜包括约0.5-30重量份的无机材料和每100重量份质子交换膜约99.5-70重量份的有机材料。无机材料的表面积为约50-3000m 2 / g。有机材料包括磺化聚合物或掺磷酸的聚合物。

49. 发明申请

US20130250523A1 HEAT DISSIPATING ASSEMBLY AND ELASTIC FASTENING MEMBER THEREOF 有权
标题翻译：热灭火组件及其弹性紧固件
公开(公告)号：US20130250523A1
公开(公告)日：2013-09-26
申请号：US13620781
申请日：2012-09-15
申请人： JENG-MING LAI , SHENG-FU LIU , TSUNG-YU CHIU , WEI-CHUNG HSIAO
发明人： JENG-MING LAI , SHENG-FU LIU , TSUNG-YU CHIU , WEI-CHUNG HSIAO
IPC分类号： H05K7/20 , F16B39/22
CPC分类号： H01L23/4093 , H01L23/3672 , H01L23/4006 , H01L2924/0002 , H01L2924/00
摘要： A heat dissipating assembly which releases heat produced by an electronic device comprising a heat dissipating device and a plurality of elastic fastening members. The heat dissipating assembly includes a base plate having a plurality of engaging holes formed thereon. Each elastic fastening member includes a connecting member and a spring. The connecting member has a head portion and a bolt body that extends therefrom. The bolt body has an outer thread formed on the surface thereof and is being insertable into the respective engaging hole. The spring includes a winding portion woundable around the outer periphery of the bolt body, a clutching portion outwardly extended and downwardly bent from the bottom end of the winding portion to the base surface of the base plate, and a fastening segment extending from the clutching portion back under the winding portion. The instant disclosure further provides an elastic fastening member.
摘要翻译：一种散热组件，其散发由包括散热装置和多个弹性紧固构件的电子装置产生的热量。该散热组件包括一个底板，其上形成有多个接合孔。每个弹性紧固构件包括连接构件和弹簧。连接构件具有从其延伸的头部和螺栓体。螺栓体具有形成在其表面上的外螺纹并且可插入到相应的接合孔中。弹簧包括围绕螺栓体的外周缠绕的缠绕部分，从卷绕部分的底端向外延伸和向下弯曲到基板的基面的抓取部分，以及从抓紧部分延伸的紧固部分在卷绕部分之下。本公开进一步提供弹性紧固构件。

50. 发明申请

US20130126859A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20130126859A1
公开(公告)日：2013-05-23
申请号：US13354334
申请日：2012-01-20
申请人： Yung-Hui Yeh , Chih-Ming Lai
发明人： Yung-Hui Yeh , Chih-Ming Lai
IPC分类号： H01L33/08 , H01L33/44
CPC分类号： H01L29/7869 , H01L27/1225 , H01L27/1248 , H01L29/66969
摘要： A method for manufacturing a semiconductor device includes forming a metal oxide semiconductor layer and a first insulating layer on a substrate. A gate is formed on the first insulating layer. The first insulating layer is patterned by using the gate as an etching mask so as to expose the metal oxide semiconductor layer to serve as a source region and a drain region. A dielectric layer is formed on the substrate to cover the gate and the oxide semiconductor layer, where the dielectric layer has at least one of hydrogen group and hydroxyl group. A heating treatment is performed so that the at least one of hydrogen group and hydroxyl group reacts with the source region and the drain region. A source electrode and a drain electrode electrically connected to the source region and the drain region respectively are formed on the dielectric layer.
摘要翻译：一种制造半导体器件的方法包括在衬底上形成金属氧化物半导体层和第一绝缘层。在第一绝缘层上形成栅极。通过使用栅极作为蚀刻掩模来对第一绝缘层进行构图，以使金属氧化物半导体层暴露于源极区和漏极区。在基板上形成介电层以覆盖栅极和氧化物半导体层，其中电介质层具有氢基和羟基中的至少一个。进行加热处理，使得氢基和羟基中的至少一个与源极区和漏极区反应。在电介质层上分别形成与源极区域和漏极区域电连接的源极电极和漏极电极。

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