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41. 发明申请

US20120180006A1 GENERATING CUT MASK FOR DOUBLE-PATTERNING PROCESS 失效
标题翻译：生成双面图案的切割面膜
公开(公告)号：US20120180006A1
公开(公告)日：2012-07-12
申请号：US12985643
申请日：2011-01-06
申请人： Zachary Baum , Henning Haffner , Scott M. Mansfield
发明人： Zachary Baum , Henning Haffner , Scott M. Mansfield
IPC分类号： G06F17/50
CPC分类号： G03F1/36 , G03F1/70
摘要： Aspects of the invention include a computer-implemented method of designing a photomask. In one embodiment, the method comprises: simulating a first photomask patterning process using a first photomask design to create simulated contours; comparing the simulated contours to a desired design; identifying regions not common to the simulated contours and the desired design; creating desired target shapes for a second photomask patterning process subsequent to the first photomask patterning process based upon the identified regions; and providing the desired target shapes for forming of a second photomask design based upon the desired target shapes.
摘要翻译：本发明的方面包括设计光掩模的计算机实现的方法。在一个实施例中，该方法包括：使用第一光掩模设计来模拟第一光掩模图案化工艺以产生模拟轮廓; 将模拟轮廓与期望的设计进行比较; 识别不同于模拟轮廓和所需设计的区域; 在基于所识别的区域的第一光掩模图案化工艺之后，为第二光掩模图案化工艺创建期望的目标形状; 以及基于期望的目标形状提供用于形成第二光掩模设计的期望的目标形状。

42. 发明授权

US08039203B2 Integrated circuits and methods of design and manufacture thereof 有权
标题翻译：集成电路及其设计和制造方法
公开(公告)号：US08039203B2
公开(公告)日：2011-10-18
申请号：US12126741
申请日：2008-05-23
申请人： Helen Wang , Scott D. Halle , Henning Haffner , Haoren Zhuang , Klaus Herold , Matthew E. Colburn , Allen H. Gabor , Zachary Baum , Scott M. Mansfield , Jason E. Meiring
发明人： Helen Wang , Scott D. Halle , Henning Haffner , Haoren Zhuang , Klaus Herold , Matthew E. Colburn , Allen H. Gabor , Zachary Baum , Scott M. Mansfield , Jason E. Meiring
IPC分类号： H01L21/027
CPC分类号： H01L21/32139 , G03F1/36 , G03F1/70 , H01L21/0274 , H01L21/28123 , H01L21/823437 , Y10S438/942
摘要： Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes depositing a gate material over a semiconductor substrate, and depositing a first resist layer over the gate material. A first mask is used to pattern the first resist layer to form first and second resist features. The first resist features include pattern for gate lines of the semiconductor device and the second resist features include printing assist features. A second mask is used to form a resist template; the second mask removes the second resist features.
摘要翻译：公开了集成电路及其制造和设计方法。例如，制造方法包括在半导体衬底上沉积栅极材料，并且在栅极材料上沉积第一抗蚀剂层。使用第一掩模来图案化第一抗蚀剂层以形成第一和第二抗蚀剂特征。第一抗蚀剂特征包括半导体器件的栅极线的图案，第二抗蚀剂特征包括印刷辅助特征。使用第二掩模形成抗蚀剂模板; 第二掩模移除第二抗蚀剂特征。

43. 发明申请

US20100297398A1 Lithography Masks and Methods of Manufacture Thereof 有权
标题翻译：光刻面具及其制造方法
公开(公告)号：US20100297398A1
公开(公告)日：2010-11-25
申请号：US12847641
申请日：2010-07-30
申请人： Chandrasekhar Sarma , Alois Gutmann , Henning Haffner , Sajan Marokkey , Josef Maynollo
发明人： Chandrasekhar Sarma , Alois Gutmann , Henning Haffner , Sajan Marokkey , Josef Maynollo
IPC分类号： B32B3/00 , G03F7/20 , G03B27/54 , G03B27/72
CPC分类号： G03F1/50 , G02B5/3083 , Y10T428/24479
摘要： Lithography masks and methods of manufacture thereof are disclosed. A preferred embodiment comprises a method of manufacturing a lithography mask. The method includes providing a substrate, forming a first pattern in a first region of the substrate, and forming a second pattern in a second region of the substrate, the second pattern comprising patterns for features oriented differently than patterns for features of the first pattern. The method includes affecting a polarization rotation of light differently in the first region than in the second region of the substrate.
摘要翻译：公开了平版印刷掩模及其制造方法。优选实施例包括制造光刻掩模的方法。所述方法包括提供衬底，在所述衬底的第一区域中形成第一图案，以及在所述衬底的第二区域中形成第二图案，所述第二图案包括不同于第一图案特征的图案的图案。该方法包括在第一区域中比在衬底的第二区域中影响光的偏振旋转。

44. 发明申请

US20070207394A1 Test pattern and method of evaluating the transfer properties of a test pattern 有权
标题翻译：测试图案的测试模式和评估测试图案的转移特性的方法
公开(公告)号：US20070207394A1
公开(公告)日：2007-09-06
申请号：US11713962
申请日：2007-03-05
申请人： Uwe Dersch , Henning Haffner
发明人： Uwe Dersch , Henning Haffner
IPC分类号： G03F1/00 , G03C5/00
CPC分类号： G03F7/70616 , G03F1/36 , G03F1/44 , G03F7/70433
摘要： A test pattern or set of patterns, a method of evaluating the transfer properties of the pattern, and a method of determining a parameter of a transfer process (e.g., imaging process) making use of the test pattern is provided. With the test pattern, the impact of line edge roughness on a transferred pattern may be analyzed. For example, the test pattern may be based upon a lines/spaces pattern, wherein periodic structures having a well-defined period and amplitude are adjacent to the lines. A photomask is provided with the test pattern and an image of the pattern is obtained. Edges of the image are determined and, therefrom, a set of edge position data are obtained. Edge position data are fitted to a straight line to determine edge position residuals. An amplitude spectrum is calculated dependent upon spatial frequencies to obtain a amplitude/spatial frequency relationship. A ratio of determined maximum is formed.
摘要翻译：提供了一种测试图案或一组图案，评估图案的转印特性的方法以及使用该测试图案确定转印处理（例如，成像处理）的参数的方法。利用测试图案，可以分析线边缘粗糙度对转移图案的影响。例如，测试图案可以基于线/间隔图案，其中具有明确定义的周期和幅度的周期结构与线相邻。光掩模被提供有测试图案并且获得图案的图像。确定图像的边缘，由此获得一组边缘位置数据。边缘位置数据拟合到一条直线上以确定边缘位置残差。根据空间频率计算振幅谱，以获得幅度/空间频率关系。形成确定的最大值的比率。

45. 发明申请

US20060276019A1 Method for production of contacts on a wafer 审中-公开
标题翻译：在晶片上生产触点的方法
公开(公告)号：US20060276019A1
公开(公告)日：2006-12-07
申请号：US11503557
申请日：2006-08-11
申请人： Werner Graf , Henning Haffner , Johannes Kowalewski , Lars Heineck
发明人： Werner Graf , Henning Haffner , Johannes Kowalewski , Lars Heineck
IPC分类号： H01L21/3205 , H01L21/44
CPC分类号： H01L27/10888 , H01L21/76897
摘要： The invention relates to a method for production of contacts on a wafer, preferably with the aid of a lithographic process. The preferred embodiment provides a method which overcomes the disadvantages of the complex point/hole lithography process, and which avoids any increase in the process complexity. This method is achieved in that a strip structure extending over two layers is used to structure the contacts. The strip structure in the first layer is rotated at a predetermined angle with respect to the strip structure in the second layer, and the contacts are formed in the mutually overlapping areas of the strip structures in the two layers.
摘要翻译：本发明涉及一种用于在晶片上生产触点的方法，优选借助于光刻工艺。优选实施例提供一种克服复杂点/孔光刻工艺的缺点的方法，并且避免了工艺复杂性的任何增加。该方法的实现是使用两层延伸的条状结构来构造触点。第一层中的带状结构相对于第二层中的带状结构以预定角度旋转，并且触点形成在两层中条带结构的相互重叠的区域中。

46. 发明授权

US07124379B2 Method for communicating a measuring position of a structural element that is to be formed on a mask 有权
标题翻译：用于传递要形成在掩模上的结构元件的测量位置的方法
公开(公告)号：US07124379B2
公开(公告)日：2006-10-17
申请号：US10675772
申请日：2003-09-30
申请人： Bettine Buechner , Christian Rotsch , Henning Haffner
发明人： Bettine Buechner , Christian Rotsch , Henning Haffner
IPC分类号： G06F17/50
CPC分类号： G03F1/84 , G03F1/68
摘要： A measuring position for finding a structural element for measuring a characteristic dimension, for instance, the critical dimension CD, which element is about to be formed on a mask, is inserted as second data information into an exchange file containing the circuit layout in a hierarchical configuration of first data information or cells representing the structural elements. To prevent the second data information, which are virtual structural elements, from being incorporated in the control instructions for mask exposure, like the first data information, as structural elements that are to be formed, the second data information does not include an allocation of a geometric shape to the measuring position, or a shape that is allocated thereto has the transparency of the background, so that there is no contrast during the exposure. The second data information can be inserted as allocated to a plane that is not converted into a control instruction.
摘要翻译：用于找到用于测量特征尺寸的结构元件的测量位置，例如将要在掩模上形成该元件的临界尺寸CD作为第二数据信息插入到包含分层的电路布局的交换文件中构成第一数据信息或表示结构要素的单元。为了防止作为虚拟结构要素的第二数据信息被并入作为掩模曝光的控制指令，如第一数据信息，作为要形成的结构元件，第二数据信息不包括或者分配给其的形状具有背景的透明度，使得在曝光期间不存在对比度。可以将第二数据信息分配给未转换为控制指令的平面。

47. 发明申请

US20050214658A1 Method for alleviating tolerance restrictions for feature sizes during fabrication of photomasks 审中-公开
标题翻译：用于减轻光掩模制造期间特征尺寸的公差限制的方法
公开(公告)号：US20050214658A1
公开(公告)日：2005-09-29
申请号：US11086668
申请日：2005-03-23
申请人： Henning Haffner , Peter Marek , Bernd Hay , Nina Doehr , Frank Katzwinkel , Carmen Jaehnert
发明人： Henning Haffner , Peter Marek , Bernd Hay , Nina Doehr , Frank Katzwinkel , Carmen Jaehnert
IPC分类号： G03C5/00 , G03F1/00 , G03F7/20 , G03F9/00
CPC分类号： G03F7/70433 , G03F1/76 , G03F7/70425 , G03F7/70625
摘要： Tolerances to be communicated to the manufacturer for a photomask fabrication process that are assigned as desired values of feature sizes to be realized on the photomask, are freed of restrictions by predefining, for a first feature size, a first desired value and a first tolerance assigned to the first desired value. The real discrepancy between the first feature size and the first desired value is taken into account when predefining desired values assigned to the further feature sizes to be provided on the photomask. As a result, a value which corresponds to a first approximation to the permitted feature size tolerance on the semiconductor wafer is provided for the tolerances of the desired values.
摘要翻译：要传送给制造商的光掩模制造工艺的公差被分配为要在光掩模上实现的特征尺寸的期望值，通过对第一特征尺寸预先定义第一期望值和分配的第一公差来解除限制达到第一个期望值。当预先分配给要在光掩模上提供的另外的特征尺寸的期望值时，考虑第一特征尺寸和第一期望值之间的真实差异。结果，对于期望值的公差提供对应于半导体晶片上允许的特征尺寸公差的第一近似的值。

48. 发明申请

US20050002554A1 Method of inspecting a mask or reticle for detecting a defect, and mask or reticle inspection system 有权
标题翻译：检查掩模或掩模版以检测缺陷的方法，以及掩模或掩模版检查系统
公开(公告)号：US20050002554A1
公开(公告)日：2005-01-06
申请号：US10611067
申请日：2003-07-01
申请人： Steffen Schulze , Henning Haffner
发明人： Steffen Schulze , Henning Haffner
IPC分类号： G01N21/956 , G06K9/00 , G06T7/00 , G09F1/00 , H01L21/66
CPC分类号： G06T7/001 , G06T2207/30148
摘要： A method of inspecting a mask or reticle, the mask or reticle being provided with a pattern to be transferred onto a semiconductor wafer, the pattern having a defect, includes the step of creating a plurality of logical zones and uniquely associating each of said logical zones with a surface area of said pattern. Then, an inspection rule representing a characteristic sensitivity for detecting a defect is associated with each of said logical zones. An image of said pattern is then recorded and compared with a reference image of an ideal pattern for locating a defect within said pattern. One of said logical zones is then identified with said located defect and that inspection rule which is associated with said identified logical zone is retrieved from a memory. The inspection rule is then applied to a characteristic of said defect for determining, whether said defect is to be repaired. A signal can be issued in response to said determination.
摘要翻译：一种检查掩模或掩模版的方法，所述掩模或掩模版具有要转印到半导体晶片上的图案，所述图案具有缺陷，所述方法包括以下步骤：创建多个逻辑区并将每个所述逻辑区域具有所述图案的表面积。然后，表示用于检测缺陷的特征灵敏度的检查规则与每个所述逻辑区域相关联。然后记录所述图案的图像，并与用于定位所述图案内的缺陷的理想图案的参考图像进行比较。然后用所述定位的缺陷识别所述逻辑区域中的一个，并且从存储器检索与所述识别的逻辑区域相关联的检查规则。然后将检查规则应用于所述缺陷的特征，以确定是否修复所述缺陷。可以响应于所述确定而发出信号。

49. 发明授权

US06756164B2 Exposure mask with repaired dummy structure and method of repairing an exposure mask 失效
标题翻译：具有修复虚拟结构的曝光掩模和修复曝光掩模的方法
公开(公告)号：US06756164B2
公开(公告)日：2004-06-29
申请号：US10186113
申请日：2002-06-28
申请人： Torsten Franke , Henning Haffner , Armin Semmler , Martin Verbeek
发明人： Torsten Franke , Henning Haffner , Armin Semmler , Martin Verbeek
IPC分类号： G03F900
CPC分类号： G03F1/32 , G03F1/72
摘要： An exposure mask has a phase mask and a phase-shifting dummy structure. The exposure mask can be repaired with regard to defects in the dummy structure. For that purpose, repair structures are applied on the exposure mask substrate material which have a lower phase shift compared to the dummy structures. The repair structure is preferably produced from carbon, the carbon being applied in a suitable layer thickness such that the repair structure no longer permits any transmission. In a preferred embodiment, the repair structure is arranged laterally offset with respect to the defect in the dummy structure.
摘要翻译：曝光掩模具有相位掩模和相移虚拟结构。关于虚拟结构中的缺陷，可以修复曝光掩模。为了这个目的，将修复结构应用于与虚拟结构相比具有较低相移的曝光掩模基板材料上。修复结构优选由碳制成，碳以适当的层厚施加，使得修复结构不再允许任何传输。在优选实施例中，修复结构相对于虚拟结构中的缺陷横向偏移设置。

50. 发明授权

US06586308B2 Method for producing circuit structures on a semiconductor substrate and semiconductor configuration with functional circuit structures and dummy circuit structures 有权
公开(公告)号：US06586308B2
公开(公告)日：2003-07-01
申请号：US09981856
申请日：2001-10-18
申请人： Sabine Kling , Dominique Savignac , Hans-Peter Moll , Henning Haffner , Elke Hietschold , Ines Anke
发明人： Sabine Kling , Dominique Savignac , Hans-Peter Moll , Henning Haffner , Elke Hietschold , Ines Anke
IPC分类号： H01L2120
CPC分类号： H01L27/0203 , H01L21/768 , H01L23/528 , H01L27/105 , H01L27/10894 , H01L2924/0002 , Y10S438/947 , H01L2924/00
摘要： A method for producing circuit structures on a semiconductor substrate is described. Photoresist structures are formed, which define functional circuit structures and dummy circuit structures, whereby the dummy circuit structures which are smaller than a minimum structural size are joined to an additional second dummy circuit structure. The additional circuit structure is provided in such a way that the minimum structural size, which is determined by a smallest required joint surface of the photoresist on the substrate, is exceeded. A semiconductor circuit is also provided, which includes functional circuit structures and dummy circuit structures, the dummy circuit structures being joined to the additional dummy circuit structures.

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