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41. 发明授权

US06838731B1 Microwave transistor structure having step drain region 有权
标题翻译：具有阶跃漏极区域的微波晶体管结构
公开(公告)号：US06838731B1
公开(公告)日：2005-01-04
申请号：US10410908
申请日：2003-04-09
申请人： Pablo D'Anna , Joseph H. Johnson
发明人： Pablo D'Anna , Joseph H. Johnson
IPC分类号： H01L29/06 , H01L29/08 , H01L29/417 , H01L29/76 , H01L29/78
CPC分类号： H01L29/41766 , H01L29/0657 , H01L29/0847 , H01L29/402 , H01L29/4175 , H01L29/7835
摘要： A microwave transistor structure having a step drain region comprising: (A) a substrate having a top surface; (B) a silicon semiconductor material of a first conductivity type, having a first dopant concentration and a top surface; (C) a conductive gate overlying and insulated from the top surface of the silicon semiconductor material; (D) at least one horizontal drain extension region of a second conductivity type and having a horizontal drain extension dopant concentration; (E) a step drain region formed in the silicon semiconductor material, and contacting the horizontal drain extension region; (F) a body region of the first conductivity type and having a body region dopant concentration; (G) a source region of the second conductivity type and having a source region dopant concentration; (H) a shield plate region formed on the top surface of the silicon semiconductor material over a portion of the horizontal drain extension region, the shield plate being adjacent and parallel to the horizontal drain extension region; the shield plate being adjacent and parallel to the conductive gate region; and (I) a conductive plug region.
摘要翻译：一种具有阶跃漏极区域的微波晶体管结构，包括：（A）具有顶表面的衬底; （B）具有第一掺杂剂浓度和顶表面的第一导电类型的硅半导体材料; （C）覆盖并与硅半导体材料的顶表面绝缘的导电栅极; （D）至少一个第二导电类型的水平漏极延伸区域并具有水平漏极延伸掺杂剂浓度; （E）形成在所述硅半导体材料中并与所述水平漏极延伸区域接触的阶跃漏极区域; （F）具有第一导电类型并具有体区掺杂浓度的体区; （G）第二导电类型的源极区域，并具有源极区掺杂剂浓度; （H）在所述水平漏极延伸区域的一部分上形成在所述硅半导体材料的顶表面上的屏蔽板区域，所述屏蔽板与所述水平漏极延伸区域相邻并平行; 所述屏蔽板与所述导电栅极区域相邻并平行; 和（I）导电塞区域。

42. 发明申请

US20040150473A1 Distortion cancellation for RF amplifiers using complementary biasing circuitry 有权
标题翻译：使用互补偏置电路的RF放大器的失真消除
公开(公告)号：US20040150473A1
公开(公告)日：2004-08-05
申请号：US10360028
申请日：2003-02-05
申请人： SIRENZA MICRODEVICES, INC
发明人： Gregg Alan Hollingsworth , Khalid Paul Shallal , Dean T. Muellenberg
IPC分类号： H03F003/68
CPC分类号： H03F3/602 , H03F1/30 , H03F1/32 , H03F2200/468
摘要： An apparatus for improving linearity of an RF signal comprising: (a) a splitter configured to receive an input RF signal, and configured to split the input RF signal into two RF signals comprising a first input RF signal, and a second input RF signal; (b) an over-biased non-linear RF power amplifier configured to receive the first input RF signal and configured to generate an over-biased non-linear output signal having an over-biased non-linear distortion component; (c) an under-biased non-linear RF power amplifier configured to receive the second input RF signal and configured to generate an under-biased non-linear output signal having an under-biased non-linear distortion component; and (d) a combiner configured to combine the over-biased non-linear output signal and the under-biased non-linear output signal, and configured to output the RF signal having substantially cancelled over-biased and under-biased distortion components. The over-biased non-linear RF power amplifier is configured to receive an over-biased DC signal being greater than an optimum bias DC voltage. The under-biased non-linear RF power amplifier is configured to receive an under-biased DC signal being lower than the optimum bias DC voltage.
摘要翻译：一种用于改善RF信号的线性度的装置，包括：（a）分配器，被配置为接收输入RF信号，并且被配置为将输入RF信号分成包括第一输入RF信号和第二输入RF信号的两个RF信号; （b）过偏置非线性RF功率放大器，被配置为接收第一输入RF信号并被配置为产生具有过偏置非线性失真分量的过偏置非线性输出信号; （c）欠偏置非线性RF功率放大器，被配置为接收所述第二输入RF信号并被配置为产生具有欠偏置非线性失真分量的欠偏置非线性输出信号; 以及（d）组合器，其被配置为组合过偏置非线性输出信号和欠偏置非线性输出信号，并且被配置为输出具有基本上消除的过偏置和欠偏置失真分量的RF信号。过偏置非线性RF功率放大器被配置为接收大于最佳偏置DC电压的过偏置DC信号。欠偏置非线性RF功率放大器被配置为接收低于最佳偏压DC电压的欠偏置DC信号。

43. 发明授权

US06972630B2 Self-biased darlington amplifier 有权
标题翻译：自偏置的达林顿放大器
公开(公告)号：US06972630B2
公开(公告)日：2005-12-06
申请号：US11115794
申请日：2005-04-27
申请人： Kevin W. Kobayashi
发明人： Kevin W. Kobayashi
IPC分类号： H03F1/30 , H03F3/04 , H03F3/343
CPC分类号： H03F1/302 , H03F3/04 , H03F3/3435
摘要： An apparatus comprising a Darlington transistor pair and a bias circuit. The Darlington transistor pair may be configured to generate an output signal at an output node in response to an input signal received through an input node. The bias circuit may be coupled between an output transistor of said Darlington transistor pair and the input node. The bias circuit generally comprises (a) a bias transistor, (b) a bypass capacitor, and (c) a resistor connected between a base of the bias transistor and base of the output transistor.
摘要翻译：一种包括达林顿晶体管对和偏置电路的装置。达林顿晶体管对可以被配置为响应于通过输入节点接收的输入信号在输出节点处产生输出信号。偏置电路可以耦合在所述达林顿晶体管对的输出晶体管和输入节点之间。偏置电路通常包括（a）偏置晶体管，（b）旁路电容器，以及（c）连接在偏置晶体管的基极和输出晶体管的基极之间的电阻器。

44. 发明授权

US06967531B1 Multi-output amplifier with isolation between outputs 失效
标题翻译：多输出放大器，输出间隔离
公开(公告)号：US06967531B1
公开(公告)日：2005-11-22
申请号：US10378233
申请日：2003-02-28
申请人： David J. Seymour
发明人： David J. Seymour
IPC分类号： H03F3/189 , H03F3/68 , H03F3/00
CPC分类号： H03F3/68 , H03F3/189
摘要： An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate an intermediate signal in response to an input signal. The second circuit may be configured to generate a plurality of output signals in response to the intermediate signal. Each of the output signals may be (i) an amplified versions of the input signal and (ii) isolated between each of the other output signals.
摘要翻译：一种包括第一电路和第二电路的装置。第一电路可以被配置为响应于输入信号产生中间信号。第二电路可以被配置为响应于中间信号而产生多个输出信号。每个输出信号可以是（i）输入信号的放大版本和（ii）在每个其它输出信号之间隔离。

45. 发明授权

US07218175B1 Dynamic feedback linearization 有权
标题翻译：动态反馈线性化
公开(公告)号：US07218175B1
公开(公告)日：2007-05-15
申请号：US11103149
申请日：2005-04-11
申请人： Kevin W. Kobayashi
发明人： Kevin W. Kobayashi
IPC分类号： H03F1/30
CPC分类号： H03F3/189 , H03F1/0288 , H03F1/30 , H03F1/34
摘要： An apparatus comprising an amplifier comprising at least one amplifier transistor, a threshold detection network and a bypass capacitor. The amplifier may be configured to generate an output signal at a collector in response to an input signal received at a base. The threshold detection network may be coupled between the collector and the base of the amplifier transistor. The threshold detection network may include a bias transistor having a collector coupled to the collector of the amplifier transistor and an emitter coupled to the base of the amplifier transistor. The threshold detection circuit may be configured to (i) sense a feedback current and (ii) provide a DC signal to the base of the amplifier transistor for dynamically sourcing bias current to the amplifier. The bypass capacitor may be coupled to the base of the bias transistor.
摘要翻译：一种包括放大器的装置，包括至少一个放大器晶体管，阈值检测网络和旁路电容器。放大器可以被配置为响应于在基座处接收的输入信号而在收集器处产生输出信号。阈值检测网络可以耦合在放大器晶体管的集电极和基极之间。阈值检测网络可以包括偏置晶体管，其具有耦合到放大器晶体管的集电极的集电极和耦合到放大器晶体管的基极的发射极。阈值检测电路可以被配置为（i）感测反馈电流，并且（ii）向放大器晶体管的基极提供DC信号，用于动态地将偏置电流提供给放大器。旁路电容器可以耦合到偏置晶体管的基极。

46. 发明授权

US06933787B1 Linearized darlington amplifier 有权
标题翻译：线性化的达林顿放大器
公开(公告)号：US06933787B1
公开(公告)日：2005-08-23
申请号：US10742098
申请日：2003-12-19
申请人： Kevin W. Kobayashi
发明人： Kevin W. Kobayashi
IPC分类号： H03F1/08 , H03F1/22 , H03F1/30 , H03F1/32 , H03F3/04 , H03F3/19 , H03F3/343
CPC分类号： H03F3/3435 , H03F1/083 , H03F1/22 , H03F1/30 , H03F1/32 , H03F3/19 , H03F2200/18 , H03F2200/36
摘要： An apparatus comprising a Darlington transistor pair and a common-base transistor. The Darlington transistor pair may be configured to generate an output signal in response to an input signal. The common-base transistor may (i) be coupled between an output transistor of the Darlington transistor pair and the output signal and (ii) have a base configured to receive a frequency dependent reference voltage.
摘要翻译：一种包括达林顿晶体管对和公共基极晶体管的装置。达林顿晶体管对可以被配置为响应于输入信号而产生输出信号。公共基极晶体管可以（i）耦合在达林顿晶体管对的输出晶体管和输出信号之间，并且（ii）具有被配置为接收频率依赖参考电压的基极。

47. 发明申请

US20040124462A1 MULTIPLE CONDUCTIVE PLUG STRUCTURE INCLUDING AT LEAST ONE CONDUCTIVE PLUG REGION AND AT LEAST ONE BETWEEN-CONDUCTIVE-PLUG REGION FOR LATERAL RF MOS DEVICES 有权
标题翻译：多个导电插头结构，包括至少一个导电插头区域，以及至少一个用于横向RF MOS器件的导电插入区域
公开(公告)号：US20040124462A1
公开(公告)日：2004-07-01
申请号：US10360365
申请日：2003-02-08
申请人： SIRENZA MICRODEVICES, INC.
发明人： Pablo D'Anna , Alan Lai-Wai Yan
IPC分类号： H01L029/76 , H01L029/94 , H01L031/062 , H01L031/113 , H01L031/119
CPC分类号： H01L29/0847 , H01L21/743 , H01L21/76898 , H01L29/1045 , H01L29/4175 , H01L29/41766 , H01L29/7835
摘要： A lateral RF MOS transistor with at least one conductive plug structure comprising: (1) a semiconductor material of a first conductivity type having a first dopant concentration and a top surface; (2) a conductive gate overlying and insulated from the top surface of the semiconductor material; (3) at least two enhanced drain drift regions of the second conductivity type of the RF MOS transistor; the first region laying partially underneath the gate; the second enhanced drain drift region contacting the first enhanced drain drift region, the dopant concentration of the second enhanced drain drift region is higher than the dopant concentration of the first enhanced drain drift region; (4) a drain region of the second conductivity type contacting the second enhanced drain drift region; (5) a body region of said RF MOS transistor of the first conductivity type with the dopant concentration being at least equal to the dopant concentration of the semiconductor epi layer; (6) a source region of the second conductivity type located within the body region; (7) a body contact region of the first conductivity type contacting the body region; and (8) a plug region further comprising at least one conductive plug region, and at least one between-conductive-plug region.
摘要翻译：一种具有至少一个导电插塞结构的横向RF MOS晶体管，包括：（1）具有第一掺杂剂浓度和顶表面的第一导电类型的半导体材料; （2）覆盖并与半导体材料的顶表面绝缘的导电栅极; （3）RF MOS晶体管的第二导电类型的至少两个增强的漏极漂移区; 第一个部分放置在门下面的区域; 所述第二增强漏极漂移区域与所述第一增强漏极漂移区域接触，所述第二增强漏极漂移区域的掺杂剂浓度高于所述第一增强漏极漂移区域的掺杂剂浓度; （4）第二导电类型的漏极区域与第二增强漏极漂移区域接触; （5）所述第一导电类型的RF MOS晶体管的体区域，其掺杂剂浓度至少等于所述半导体外延层的掺杂剂浓度; （6）位于体区内的第二导电类型的源区; （7）接触身体区域的第一导电类型的身体接触区域; 和（8）还包括至少一个导电插塞区域和至少一个导电插塞区域之间的塞子区域。

48. 发明授权

US07020452B1 Actively matched center-tapped marchand balanced mixer 失效
标题翻译：主动匹配中心攻击行军平衡混音器
公开(公告)号：US07020452B1
公开(公告)日：2006-03-28
申请号：US10425335
申请日：2003-04-29
申请人： Kevin W. Kobayashi
发明人： Kevin W. Kobayashi
IPC分类号： H04B1/25
CPC分类号： H03D9/0633
摘要： An apparatus comprising an amplifier circuit, a tuning circuit and a mixer circuit. The amplifier circuit may be configured to generate an output signal at a first node in response to an input signal received through a second node. A tuning circuit may be (i) coupled between said second node of the amplifier circuit and third node and (ii) configured to adjust an impedance presented to the third node in response to a tuning voltage. A mixer circuit may have a center tap coupled to the third node.
摘要翻译：一种包括放大器电路，调谐电路和混频器电路的装置。放大器电路可以被配置为响应于通过第二节点接收的输入信号而在第一节点处产生输出信号。调谐电路可以（i）耦合在放大器电路的第二节点和第三节点之间，并且（ii）被配置为响应于调谐电压来调整呈现给第三节点的阻抗。混频器电路可以具有耦合到第三节点的中心抽头。

49. 发明授权

US06927634B1 Self-biased Darlington amplifier 有权
标题翻译：自偏置达林顿放大器
公开(公告)号：US06927634B1
公开(公告)日：2005-08-09
申请号：US10623070
申请日：2003-07-18
申请人： Kevin W. Kobayashi
发明人： Kevin W. Kobayashi
IPC分类号： H03F1/30 , H03F3/04 , H03F3/343
CPC分类号： H03F1/302 , H03F3/04 , H03F3/3435
摘要： An apparatus comprising a Darlington transistor pair and a bias circuit. The Darlington transistor pair may be configured to generate an output signal at an output node in response to an input signal received through an input node. The bias circuit may be coupled between an output transistor of said Darlington transistor pair and the input node. The bias circuit generally comprises (a) a bias transistor, (b) a bypass capacitor, and (c) a resistor connected between a base of the bias transistor and base of the output transistor.
摘要翻译：一种包括达林顿晶体管对和偏置电路的装置。达林顿晶体管对可以被配置为响应于通过输入节点接收的输入信号在输出节点处产生输出信号。偏置电路可以耦合在所述达林顿晶体管对的输出晶体管和输入节点之间。偏置电路通常包括（a）偏置晶体管，（b）旁路电容器，以及（c）连接在偏置晶体管的基极和输出晶体管的基极之间的电阻器。

50. 发明授权

US06861909B1 High voltage-wide band amplifier 有权
标题翻译：高电压宽带放大器
公开(公告)号：US06861909B1
公开(公告)日：2005-03-01
申请号：US10173296
申请日：2002-06-17
申请人： Kevin W. Kobayashi
发明人： Kevin W. Kobayashi
IPC分类号： H03F3/19 , H03F3/04
CPC分类号： H03F3/19
摘要： An apparatus comprising a Darlington transistor pair, a first common-base transistor and a second common-base transistor. The Darlington transistor pair may be configured to generate an output signal in response to an input signal. The first common-base transistor may be coupled between the Darlington transistor pair and the output signal. The second common-base transistor may also be coupled between the Darlington transistor pair and the output signal. The first and second common-base transistors may each have a base configured to receive a reference voltage.
摘要翻译：一种包括达林顿晶体管对，第一公共基极晶体管和第二共用基极晶体管的装置。达林顿晶体管对可以被配置为响应于输入信号而产生输出信号。第一公共基极晶体管可以耦合在达林顿晶体管对和输出信号之间。第二公共基极晶体管也可以耦合在达林顿晶体管对和输出信号之间。第一和第二公共基极晶体管可以各自具有被配置为接收参考电压的基极。

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