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    • 32. 发明申请
    • CURRENT MEASUREMENT CIRCUIT AND METHOD
    • 电流测量电路和方法
    • WO2007069102A2
    • 2007-06-21
    • PCT/IB2006/054233
    • 2006-11-14
    • KONINKLIJKE PHILIPS ELECTRONICS N.V.EDWARDS, Martin, J.
    • EDWARDS, Martin, J.
    • G01R19/255
    • G01R19/255Y10T292/106
    • Apparatus (1) and corresponding method for measuring a current (10) in which a charge integrating circuit (2) integrates charge from the current to be measured (10) and applies a resulting change in voltage to a comparator circuit (4) that compares the input voltage (12) with a threshold voltage level (Vthreshoid) and provides an output (14) responsive thereto to a logic circuit (6) that generates a feedback signal (16) dependent upon the comparator output (14) and provides the feedback signal (16) to the charge integrating circuit (2) that integrates charge from the received feedback signal (16) in opposition to the integrating of the charge from the current to be measured (10). The logic circuit (6) generates an output signal (18), based upon the comparator circuit output (14) and dependent upon the level of the current to be measured (10), for example a pulse (50) of a width (TOUT) dependent upon the level of the current (10). A converter circuit (8) may convert the output signal (18) to digital output data (20).
    • 用于测量电流(10)的装置(1)和相应的方法,其中电荷积分电路(2)将来自待测电流(10)的电荷积分,并将所得的电压变化应用于比较电路(4),比较电路 所述输入电压(12)具有阈值电压电平(Vth threshold),并且响应于逻辑电路(6)提供输出(14),所述逻辑电路产生取决于所述比较器输出(14)的反馈信号(16),并提供所述反馈 信号(16)连接到电荷积分电路(2),该电荷积分电路(2)将来自接收的反馈信号(16)的电荷与从被测量电流(10)的电荷积分相反。 逻辑电路(6)基于比较器电路输出(14)产生输出信号(18),并且取决于待测电流(10)的电平,例如宽度(TOUT)的脉冲(50) )取决于当前(10)的水平。 A转换器电路(8)可以将输出信号(18)转换成数字输出数据(20)。
    • 34. 发明专利
    • Digital multimeter
    • 数字多媒体
    • JPS5970975A
    • 1984-04-21
    • JP18062782
    • 1982-10-15
    • Shiojiri Kogyo Kk
    • OZAWA MASAKI
    • G01R31/26G01R19/255
    • G01R19/255
    • PURPOSE:To obtain a digital multimeter in which errors are determined by errors in the sense resistance and division resistance by measuring a threshold voltage of a diode once divided and inputted into an IC to hold the input level within the limit of input operation. CONSTITUTION:A measuring voltage 2 for a diode is incorporated into an IC1 to serve as a voltage for measuring resistance as well. A bias resistance 3 also serves as a reference resistance for measuring resistance and a sense resistance 8 constitutes one side of a division resistance while another side division resistance 10 is connected to the sense resistance 8 when during the measurement of the diode with an external switch 9. In the measurement of the diode, a bias current flows out of the bias resistance 3 from the measuring voltage 2 to a diode 5 to be measured connected to input terminals 6 and 7 so that the threshold voltage is divided and damped with the sense 8 and the division resistance 10 down within an IC input operation level and converted with a double integration A/D converter in the IC to measure. In the measurement of resistance, the bias resistance 3 is connected in series to a resistance to be measured.
    • 目的:为了获得一个数字万用表,其中误差由感测电阻和除法电阻的误差决定,通过测量一旦分压并输入到一个二极管的二极管的阈值电压,将输入电平保持在输入操作的极限内。 构成:将二极管的测量电压2并入IC1中,作为测量电阻的电压。 偏置电阻3也用作测量电阻的参考电阻,并且当在具有外部开关9的二极管的测量期间,感测电阻8构成分割电阻的一侧,而另一个分压电阻10连接到感测电阻8 在二极管的测量中,偏置电流3从测量电压2流出到待测量的二极管5,连接到输入端子6和7,使得阈值电压被感测8分压和衰减 和分压电阻10在IC输入操作电平内降低,并用IC中的双积分A / D转换器进行测量。 在电阻测量中,偏置电阻3与要测量的电阻串联。
    • 37. 发明专利
    • Analog/digital converter
    • 模拟/数字转换器
    • JPS5944666A
    • 1984-03-13
    • JP15470782
    • 1982-09-07
    • Toshiba Corp
    • ONO KIYOSHI
    • G01R19/25G01R19/255H03M1/54
    • G01R19/255
    • PURPOSE:To execute A/D conversion without failing to count, even in case of an irregular input signal, by holding plural input pulses which are being A/D-converted, by plural analog holding devices, and comparing them with a single reference voltage waveform. CONSTITUTION:A statistically irregular input waveform from a radiant ray detector, etc. passes through an input terminal 3, its peak is detected by a peak detector PH, and when a peak detecting pulse sets an FF1 through a gate AG1-1, the peak is held by a peak voltage holding circuit PH1. This output is compared with saw tooth reference voltage from a reference voltage generating circuit RVG by a comparator VC1, the FF1 is reset at the time of coincidence, also a latch signal is inputted to a data latch DR through an OR gate OG1 and contents of a counter CN are latched. Also, the detecting pulse is inputted to hold comparator units HCU2, HCU3, is processed in the same way, and each peak is outputted 4 as a digital signal from the data latch DR.
    • 目的:即使在不规则输入信号的情况下,通过多个模拟保持装置保持多个输入脉冲进行A / D转换,执行A / D转换,并将其与单个参考电压进行比较 波形。 构成:来自辐射线检测器等的统计不规则的输入波形通过输入端子3,其峰值由峰值检测器PH检测,并且当峰值检测脉冲通过栅极AG1-1设置FF1时,峰值 由峰值电压保持电路PH1保持。 通过比较器VC1将该输出与来自基准电压发生电路RVG的锯齿参考电压进行比较,FF1在重合时复位,锁存信号也通过OR门OG1输入到数据锁存器DR, 计数器CN被锁存。 此外,检测脉冲被输入到保持比较器单元HCU2,HCU3以相同的方式被处理,并且每个峰值作为数字信号从数据锁存器DR输出4。