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31. 发明专利

JP2006085894A Unified control and memory for combined dvd/hdd system 审中-公开
标题翻译：用于组合DVD / HDD系统的统一控制和存储器
公开(公告)号：JP2006085894A
公开(公告)日：2006-03-30
申请号：JP2005252816
申请日：2005-08-31
申请人： Marvell World Trade Ltd , マーベルワールドトレードリミテッド
发明人： SUTARDJA SEHAT
IPC分类号： G11B20/10 , G11B19/00 , H04N19/89
CPC分类号： G11B20/00086 , G11B19/02 , G11B20/10 , G11B20/10527 , G11B2020/10722 , G11B2220/455
摘要： PROBLEM TO BE SOLVED: To improve convenience by combining a DVD system and a HDD system.
SOLUTION: This system is a disk(DVD)/hard disk drive (HDD) combined system controlling the HDD assembly and the DVD assembly, and provided with the DVD/HDD control module controlling operation of the HDD assembly and the DVD assembly, a volatile memory storing volatile data relating to operation of the DVD assembly and the HDD assembly, and a nonvolatile memory communicating with the DVD/HDD control module and storing nonvolatile data relating to operation of the DVD assembly and the HDD assembly.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：通过组合DVD系统和HDD系统来提高方便性。
解决方案：该系统是控制HDD组件和DVD组件的盘（DVD）/硬盘驱动器（HDD）组合系统，并且配备有控制HDD组件和DVD组件的操作的DVD / HDD控制模块存储与DVD组件和HDD组件的操作有关的易失性数据的易失性存储器，以及与DVD / HDD控制模块通信并存储与DVD组件和HDD组件的操作有关的非易失性数据的非易失性存储器。版权所有（C）2006，JPO＆NCIPI

32. 发明专利

JP2006085893A Unified control and memory for combined dvd/hdd system 审中-公开
标题翻译：用于组合DVD / HDD系统的统一控制和存储器
公开(公告)号：JP2006085893A
公开(公告)日：2006-03-30
申请号：JP2005252815
申请日：2005-08-31
申请人： Marvell World Trade Ltd , マーベルワールドトレードリミテッド
发明人： SUTARDJA SEHAT
IPC分类号： G11B20/10 , G11B20/12 , H04N19/89
CPC分类号： G11B20/00797 , G11B20/00086 , G11B20/00666 , G11B20/0084 , G11B20/10 , G11B25/10 , G11B2220/455
摘要： PROBLEM TO BE SOLVED: To improve convenience by combining a DVD system and a HDD system. SOLUTION: This system is the combined DVD/HDD system for the digital versatile disk (DVD) and the hard disk drive (HDD), and provided with a DVD read channel communicating with the DVD, a DVD control module communicating with the DVD read channel, an HDD read channel communicating with the HDD, an HDD control module communicating with the HDD read channel, and an interface communicating with the DVD control module and the HDD control module and connecting an external host apparatus and the DVD/HDD combined system. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：通过组合DVD系统和HDD系统来提高方便性。解决方案：该系统是用于数字通用盘（DVD）和硬盘驱动器（HDD）的组合DVD / HDD系统，并且具有与DVD通信的DVD读取通道，与该DVD通信的DVD控制模块 DVD读通道，与HDD通信的HDD读通道，与HDD读通道通信的HDD控制模块，以及与DVD控制模块和HDD控制模块通信的接口，并连接外部主机设备和DVD / HDD组合系统。版权所有（C）2006，JPO＆NCIPI

33. 发明专利

JP2006040255A Low power computer with main and auxiliary processors 有权
标题翻译：低功耗计算机与主要和辅助处理器
公开(公告)号：JP2006040255A
公开(公告)日：2006-02-09
申请号：JP2005144894
申请日：2005-05-18
申请人： Marvell World Trade Ltd , マーベルワールドトレードリミテッド
发明人： SUTARDJA SEHAT , CHEN HONG-YI
IPC分类号： G06F1/32 , G06F12/08
CPC分类号： G06F1/3293 , G06F1/3203 , G06F1/324 , G06F1/3275 , G06F12/08 , G06F12/0866 , G06F12/0897 , G06F13/28 , G06F2212/222 , Y02D10/122 , Y02D10/126 , Y02D10/13 , Y02D10/14 , Y02D50/20
摘要： PROBLEM TO BE SOLVED: To reduce power consumption of a computer. SOLUTION: An architecture for the computer includes a primary processor that consumes power at a first rate, that is operated when the computer is in an high power mode and that is not powered when the computer is in a low power mode. A primary graphics processor communicates with the primary processor, is operated when the computer is in the high power mode and is not powered when the computer is in the low power mode. A secondary graphics processor communicates with a secondary processor. The secondary processor consumes power at a second rate that is less than the first rate. The secondary processor and the secondary graphics processor are operated when the computer is in the low power mode. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：降低计算机的功耗。解决方案：计算机的架构包括主处理器，其以第一速率消耗功率，当计算机处于高功率模式时运行，并且当计算机处于低功率模式时不供电。主要图形处理器与主处理器通信，当计算机处于高功率模式时被操作，并且当计算机处于低功率模式时不被供电。辅助图形处理器与二级处理器进行通信。辅助处理器以小于第一速率的第二速率消耗功率。当计算机处于低功耗模式时，辅助处理器和辅助图形处理器被操作。版权所有（C）2006，JPO＆NCIPI

34. 发明专利

JP2006014590A Voltage regulator feedback protecting method and apparatus 审中-公开
标题翻译：电压调节器反馈保护方法和装置
公开(公告)号：JP2006014590A
公开(公告)日：2006-01-12
申请号：JP2005180008
申请日：2005-06-20
申请人： Marvell World Trade Ltd , マーベルワールドトレードリミテッド
发明人： SUTARDJA SEHAT
IPC分类号： G05F1/56 , H02M3/00 , G01R31/02 , G05F1/10 , G05F1/569 , G05F1/575 , G05F1/613 , H02M1/08
CPC分类号： H02M1/08 , G05F1/613
摘要： PROBLEM TO BE SOLVED: To prevent generation of the output overvoltage or the like of a voltage regulator, and shutdown of an electronic system due to increase in the impedance, accompanying defective soldering or the like of the feedback line of the voltage regulator.
SOLUTION: An output distribution power source system 30, which supplies adjusting voltage to the electronic system 35, is provided with the voltage regulator which inputs an adjusting output voltage signal via the feedback line 32, and adjusts the output voltage, and a feedback protecting system 50 which detects increase in the impedance of the feedback signal. The feedback protecting system 50 applies a voltage to the feedback line 32 via a pull-up resistor 46 from a voltage generator 54, and the increase in impedance of the feedback line 32 is monitored by a feedback monitor 56.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了防止电压调节器的输出过电压等的产生，以及由于阻抗的增加而导致的电子系统的关断，伴随着电压调节器的反馈线的不良焊接等。解决方案：向电子系统35提供调整电压的输出分配电源系统30设置有经由反馈线32输入调整输出电压信号并调节输出电压的电压调节器，反馈保护系统50，其检测反馈信号的阻抗的增加。反馈保护系统50通过来自电压发生器54的上拉电阻器46向反馈线路32施加电压，反馈线路32的阻抗的增加由反馈监视器56监视。 C）2006，JPO＆NCIPI

35. 发明专利

JP2006012139A Disk drive system on chip equipped with assistance for access to integrated buffer memory and host memory 审中-公开
标题翻译：用于访问集成缓冲存储器和主机存储器的辅助芯片上的磁盘驱动器系统
公开(公告)号：JP2006012139A
公开(公告)日：2006-01-12
申请号：JP2005159376
申请日：2005-05-31
申请人： Marvell World Trade Ltd , マーベルワールドトレードリミテッド
发明人： SUTARDJA SEHAT
IPC分类号： G06F3/06 , G06F13/12 , G11B20/10
CPC分类号： G06F5/12 , G06F3/0613 , G06F3/0656 , G06F3/0676 , G11B20/10527 , G11B2020/10675
摘要： PROBLEM TO BE SOLVED: To increase a buffer memory of one HDD system-on-chip (SOC), and to provide a plurality of improved business devices including the HDDSOC.
SOLUTION: A circuit for a storage device that communicates with a host device comprises a first high speed interface. A storage controller communicates with the high speed interface. A buffer communicates with the storage controller. The storage device generates storage buffer data during operation. The storage controller is adapted to selectively store the buffer data in at least one of the buffer and/or the host device via the high speed interface. A bridge chip for enterprise applications couples the circuit to a business device.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：增加一个HDD片上系统（SOC）的缓冲存储器，并提供包括HDDSOC在内的多个改进的商业设备。解决方案：用于与主机设备通信的存储设备的电路包括第一高速接口。存储控制器与高速接口通信。缓冲区与存储控制器通信。存储设备在操作期间生成存储缓冲区数据。存储控制器适于经由高速接口选择性地将缓冲器数据存储在缓冲器和/或主机设备中的至少一个中。用于企业应用的桥芯片将电路耦合到业务设备。版权所有（C）2006，JPO＆NCIPI

36. 发明专利

JP2005354896A Method and device for protecting feedback in voltage regulator 有权
标题翻译：用于保护电压调节器中的反馈的方法和装置
公开(公告)号：JP2005354896A
公开(公告)日：2005-12-22
申请号：JP2005180009
申请日：2005-06-20
申请人： Marvell World Trade Ltd , マーベルワールドトレードリミテッド
发明人： SUTARDJA SEHAT
IPC分类号： G05F1/56 , G01R31/02 , G05F1/569 , G05F1/575 , G05F1/613 , H02M1/08 , H02M3/00
CPC分类号： H02M1/08 , G05F1/613
摘要： PROBLEM TO BE SOLVED: To provide a method and device for protecting feedback in a voltage regulator, in which the problem is resolved, wherein if a line carrying feedback signals to a voltage regulator is electrically deteriorated, the adjusting output of the voltage regulator drifts beyond the adjustment frame, and operation may be stopped.
SOLUTION: One integrated circuit includes one feedback terminal for receiving one feedback signal. One voltage regulator has one feedback input for receiving a feedback signal from the feedback terminal and has one electric power output for communicating with one output terminal, and causes electric power output to be generated, in response to a feedback signal. The integrated circuit includes a voltage generator for generating a pull-up voltage, having a larger amplitude than a DC-voltage amplitude of an electric power output, and a pull-up resistance communicating with a pull-up voltage, obtained separated from the electric power output and a feedback input of the pull-up voltage generator and the voltage regulator.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了提供一种用于保护电压调节器中的反馈的方法和装置，其中解决了问题，其中如果向电压调节器传送反馈信号的线路电气劣化，则电压的调节输出调节器漂移超出调整框架，并且可能停止操作。解决方案：一个集成电路包括一个用于接收一个反馈信号的反馈端。一个电压调节器具有一个反馈输入，用于从反馈端接收反馈信号，并且具有一个电力输出，用于与一个输出端通信，并响应于反馈信号而产生电力输出。集成电路包括用于产生上拉电压的电压发生器，其具有比电力输出的DC电压幅度更大的振幅，以及与电力分离获得的与上拉电压通信的上拉电阻功率输出和上拉电压发生器和电压调节器的反馈输入。版权所有（C）2006，JPO＆NCIPI

37. 发明专利

JP2005287291A Voltage regulator 审中-公开
标题翻译：电压稳压器
公开(公告)号：JP2005287291A
公开(公告)日：2005-10-13
申请号：JP2005059456
申请日：2005-03-03
申请人： Marvell World Trade Ltd , マーベルワールドトレードリミテッド
发明人： SUTARDJA SEHAT
IPC分类号： H02M3/155 , G05F1/652 , H02M3/04 , H02M3/137 , H02M3/156 , H02M3/158
CPC分类号： G05F1/652 , H02M3/155 , H02M3/156
摘要： PROBLEM TO BE SOLVED: To provide a voltage regulator capable of reducing the switching loss of a switching power supply. SOLUTION: In a coupling inductor 36 including a first winding and a second winding each having one polarity, the first winding and the second winding have the same polarities and are connected in series to form one common node with the first winding and the second winding having coupling factors almost equal to 1. A voltage regulator 30 comprises the coupling inductor 36, a conduction switch 32 that has an on-state and an off-state to allow an input voltage to flow controllably to the coupling inductor 36 with a single switching frequency, a free wheeling switch 34 that has an on-state and an off-state and is connected to the common node of the coupling inductor 36 for presenting a path for a current when the conduction switch is in an off-state, and an output capacitor 38 that is connected to the coupling inductor for filtering an output voltage. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供能够降低开关电源的开关损耗的电压调节器。解决方案：在包括具有一个极性的第一绕组和第二绕组的耦合电感器36中，第一绕组和第二绕组具有相同的极性并且串联连接以与第一绕组形成一个公共节点，并且第二绕组具有几乎等于1的耦合因数。电压调节器30包括耦合电感器36，导通开关32，其具有导通状态和截止状态，以允许输入电压可控地流过耦合电感器36，单开关频率，具有导通状态和截止状态并连接到耦合电感器36的公共节点的续流开关34，用于当导通开关处于关闭状态时呈现电流的路径，以及输出电容器38，其连接到用于滤波输出电压的耦合电感器。版权所有（C）2006，JPO＆NCIPI

38. 发明专利

JP2005057986A Split gate driving system for improving reliability of voltage operation range 有权
标题翻译：用于提高电压运行范围可靠性的分闸门驱动系统
公开(公告)号：JP2005057986A
公开(公告)日：2005-03-03
申请号：JP2004114712
申请日：2004-04-08
申请人： Marvell World Trade Ltd , マーベルワールドトレードリミテッド
发明人： SUTARDJA SEHAT , ZHANG JIANCHENG , GOENAWAN SOFJAN
IPC分类号： H02M3/155 , H02M1/00 , H02M1/12 , H02M3/10 , H02M3/158
CPC分类号： H02M3/1588 , H02M1/32 , Y02B70/1466
摘要： PROBLEM TO BE SOLVED: To provide a system and method for a power regulator with high efficiency and improved reliability.
SOLUTION: The power regulator can have a first driver with a first switch and a second switch, and power loss of the first switch is less than that of the second switch. The power regulator can also have a second driver. The first and second switches can be realized as transistors capable of having a breakdown voltage of various on states and/or a drain-source resistance of an on state.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种高效率和可靠性提高的功率调节器的系统和方法。解决方案：功率调节器可以具有带有第一开关和第二开关的第一驱动器，并且第一开关的功率损耗小于第二开关的功率损耗。功率调节器也可以有第二个驱动器。第一和第二开关可以被实现为能够具有各种导通状态的击穿电压和/或导通状态的漏极 - 源极电阻的晶体管。版权所有（C）2005，JPO＆NCIPI

39. 发明专利

JP2005039214A Power inductor decreased in degree of dc current saturation 有权
标题翻译：功率电感降低在直流电流饱和度
公开(公告)号：JP2005039214A
公开(公告)日：2005-02-10
申请号：JP2004146964
申请日：2004-05-17
申请人： Marvell World Trade Ltd , マーベルワールドトレードリミテッド
发明人： SUTARDJA SEHAT
IPC分类号： H01F27/24 , H01F3/10 , H01F3/14 , H01F17/06 , H01F27/255 , H01F27/34 , H01F37/00 , H01F38/02
CPC分类号： H01F17/06 , H01F3/10 , H01F3/14 , H01F27/34 , H01F37/00 , H01F38/023 , Y10T29/4902
摘要： PROBLEM TO BE SOLVED: To provide a power inductor that is reduced in degree of DC current saturation. SOLUTION: The power inductor contains a magnetic core material provided with first and second ends. The internal cavity disposed in the magnetic core material is extended from the first end to the second end. A conductor is passed through the cavity. A slotted air gap disposed in the magnetic core material is also extended from the first end to the second end. COPYRIGHT: (C)2005,JPO&NCIPI

40. 发明专利

JP2004288355A Multiport memory architecture, device, system, and method 审中-公开
公开(公告)号：JP2004288355A
公开(公告)日：2004-10-14
申请号：JP2004071574
申请日：2004-03-12
申请人： Marvell World Trade Ltd , マーベルワールドトレードリミテッド
发明人： LEE WINSTON , SUTARDJA SEHAT , PANNELL DONALD
IPC分类号： G11C11/41 , G11C7/10
CPC分类号： G11C7/1075
摘要： PROBLEM TO BE SOLVED: To provide a high-speed multiport memory architecture suited for a network high speed and high switching flexibility, and a method and a system including the same. SOLUTION: A multiport memory is provided with a plurality of ports (c) for receiving/transmitting the data (b) of a memory array (a), and a plurality of port buffers for transmitting/receiving with one or more ports. The port buffer transmits data to the memory array on a first common bus (1) and receives data from the memory array on a second common bus (2). A data block is written/read, and transferred over the memory. The port buffer is firmly connected to a main memory, inter-point communication is carried out in the long section of a memory reading/writing path, a wait time for data communication is reduced especially by a network switch, whereby the congestion of routing is reduced, and FIFO is eliminated. COPYRIGHT: (C)2005,JPO&NCIPI

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