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31. 发明授权

US5600102A Solder preform wrappable around a printed circuit card edge 失效
标题翻译：焊接预制件围绕印刷电路卡边缘封装
公开(公告)号：US5600102A
公开(公告)日：1997-02-04
申请号：US607795
申请日：1996-02-27
申请人： Paul A. Socha
发明人： Paul A. Socha
IPC分类号： H01R43/02 , H05K1/11 , H05K3/34 , H05K1/02
CPC分类号： H01R12/721 , H01R43/0235 , H05K3/3405 , H01R12/57 , H05K2201/10189 , H05K2201/10424 , H05K2203/0415 , H05K3/3478 , Y10T29/49149 , Y10T29/49151
摘要： An integral solder preform is disclosed for application to a printed circuit card having first and second sides, a first edge and first and second pluralities of conductive pads disposed on the respective first and second sides of the printed circuit card in respective first and second predetermined conductive pad arrangements. The integral solder preform has first and second pluralites of solder pads having respective first and second solder pad arrangements which are maintained in position by a plurality of bridging solder bands. The first and second solder pad arrangements correspond to the first and second predetermined conductive pad arrangements and are spaced apart by a predetermined distance by spacing solder bands. The printed circuit card is aligned over the spacing solder bands and the first and second solder pad arrangements are wrapped around the first edge such that the first and second solder pad pluralities of solder pads overlay respective first and second pluralities of conductive pads on the printed circuit card. A fixture which may be employed to facilitate the alignment of the solder preform for use with the solder preform is also disclosed.
摘要翻译：公开了用于应用于具有第一和第二侧的印刷电路卡的整体焊料预制件，第一边缘以及布置在印刷电路卡的相应第一和第二侧上的第一和第二多个导电焊盘，分别在第一和第二预定导电垫安排。整体焊料预制件具有第一和第二多个焊盘，其具有相应的第一和第二焊料焊盘布置，其通过多个桥接焊料带保持在适当的位置。第一和第二焊盘布置对应于第一和第二预定导电焊盘布置，并且通过间隔焊料带间隔预定距离。印刷电路卡在间隔焊料带上对准，并且第一和第二焊料焊盘装置围绕第一边缘缠绕，使得第一和第二焊料焊盘多个焊盘覆盖印刷电路上相应的第一和第二多个导电焊盘卡。还公开了可用于促进焊料预制件与焊料预制件一起使用的夹具。

32. 发明授权

US5248476A Fusible alloy containing bismuth, indium, lead, tin and gallium 失效
标题翻译：含有铋，铟，铅，锡和镓的易熔合金
公开(公告)号：US5248476A
公开(公告)日：1993-09-28
申请号：US876407
申请日：1992-04-30
申请人： James A. Slattery , Charles E. T. White , George E. Kraeger , John R. Sovinsky
发明人： James A. Slattery , Charles E. T. White , George E. Kraeger , John R. Sovinsky
IPC分类号： C22C12/00 , C22C30/04
CPC分类号： C22C12/00 , C22C30/04
摘要： An alloy composition comprising effective amounts of bismuth, indium, lead, tin, and gallium, which is especially suited for lens blocking.

33. 发明授权

US5108497A Treatment of indium dusts 失效
标题翻译：铟灰处理
公开(公告)号：US5108497A
公开(公告)日：1992-04-28
申请号：US578013
申请日：1990-09-05
申请人： Nicholas B. Gomez , John P. Hager , Charles E. T. White , Laurence G. Stevens
发明人： Nicholas B. Gomez , John P. Hager , Charles E. T. White , Laurence G. Stevens
IPC分类号： C22B7/02 , C22B58/00
CPC分类号： C22B58/00 , C22B7/02 , Y02P10/212 , Y10S75/961
摘要： Indium-containing feedstocks, such as flue dusts from a refining or smelting process, are treated to increase the concentration of indium and at the same time to reduce the concentrations of lead, copper, and arsenic. The flue dusts are treated in a sodium-doped lead bath at temperatures of 675.degree. to 800.degree. C. Soda ash in the amount of 15 to 35 weight percent is blended with the feed stock and added to the sodium-doped lead bullion. The sodium reacts with the dusts to form a liquid dross, which is removed, cooled, and crushed. The powdered dross is water leached to remove the sodium salts. The indium remains in the filler cake and can be processed by conventional methods for the recovery of indium. About 95% of the indium reports to the filter cake, while lead retention in the filter cake is only about 5-15% of the initial lead content in the dust. A majority of the zinc also reports to the filter cake. A majority of the lead, copper, and silver report to the bullion, and a majority of the arsenic reports to the filtrate. Sodium consumption is about one pound of sodium for each five to ten pounds of feedstock.
摘要翻译：处理含铟原料，例如来自精炼或熔炼过程的烟道灰，以增加铟的浓度，同时降低铅，铜和砷的浓度。烟道灰尘在钠掺杂铅浴中在675℃至800℃的温度下处理。以15-35重量％的量将纯碱与原料混合并加入到钠掺杂的铅块中。钠与粉尘反应形成液体渣，将其除去，冷却并粉碎。粉状浮渣是水淋洗以除去钠盐。铟保留在填料块中，并且可以通过用于回收铟的常规方法进行处理。铟的约95％报告在滤饼中，而滤饼中的铅保留量仅为灰尘初始含铅量的约5-15％。大多数锌还报告过滤饼。大多数铅，铜和银向金块报告，大多数砷报告给滤液。每5至10磅原料，钠消耗量约为1磅。

34. 发明授权

US5052611A Method of forming a gasket of indium and braid 失效
标题翻译：形成铟和辫子垫圈的方法
公开(公告)号：US5052611A
公开(公告)日：1991-10-01
申请号：US477158
申请日：1990-02-08
申请人： Paul A. Socha
发明人： Paul A. Socha
IPC分类号： B23K20/04 , B32B15/01 , F16J15/08 , H01R13/6585
CPC分类号： B23K20/04 , B32B15/01 , F16J15/0806 , F16J15/0812 , H01R13/6585 , Y10S29/022 , Y10T29/49297 , Y10T428/12444 , Y10T428/12486 , Y10T428/12681
摘要： An indium-metal braid-indium sandwich is formed by applying indium ribbons to upper and lower surfaces of a metal braid and then working the sandwich, e.g., between rollers. The resulting product has enhanced tensile strength and stiffness, yet retains the attributes of indium for application as a gasket, gland, or seal.
摘要翻译：通过将铟带施加到金属编织物的上表面和下表面，然后在例如辊之间加工三明治来形成铟金属编织铟铟夹层。所得到的产品具有增强的拉伸强度和刚度，但保留铟作为垫圈，密封圈或密封件应用的属性。

35. 发明公开

US20240258262A1 MULTI-BARRIER SYSTEM FOR LOW-VOID THERMAL TRANSFER 审中-公开
公开(公告)号：US20240258262A1
公开(公告)日：2024-08-01
申请号：US18426144
申请日：2024-01-29
申请人： THE INDIUM CORPORATION OF AMERICA
发明人： Milos Lazic , Richard McDonough
IPC分类号： H01L23/00 , H01L23/367
CPC分类号： H01L24/26 , H01L23/367 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/83 , H01L2224/26175 , H01L2224/27013 , H01L2224/2732 , H01L2224/29105 , H01L2224/3207 , H01L2224/32221 , H01L2224/83201 , H01L2924/0103 , H01L2924/01049 , H01L2924/0105
摘要： Described are a double barrier system and method used to contain a thermal interface material to avoid unwanted interactions of the thermal interface material with other metals or components within a semiconductor device. In one implementation, a semiconductor assembly includes: a substrate; a heat generating device including a first surface attached to the substrate; a first barrier surrounding and in touching relation with the heat generating device; a second barrier surrounding the first barrier such that there is an area between the first barrier and the second barrier; a heat transferring device; and a thermal interface material between and in touching relation with the heat transferring device and a second surface of the heat generating device opposite the first surface.

36. 发明申请

US20070048172A1 Technique for increasing the compliance of tin-indium solders 有权
标题翻译：提高锡铟焊料顺应性的技术
公开(公告)号：US20070048172A1
公开(公告)日：2007-03-01
申请号：US11360812
申请日：2006-02-24
申请人： Benlih Huang , Hong-Sik Hwang , Ning-Cheng Lee
发明人： Benlih Huang , Hong-Sik Hwang , Ning-Cheng Lee
IPC分类号： C22C13/00
CPC分类号： C22C11/06 , B23K35/262 , C22C13/00
摘要： A technique for increasing the compliance of tin-indium solders is disclosed. In one particular exemplary embodiment, the technique may be realized as a lead free solder alloy comprising from about 58.0% to about 99.998% by weight tin, from about 0.001% to about 40.0% by weight indium, and from about 0.001% to about 2.0% by weight at least one rare earth element.
摘要翻译：公开了一种提高锡铟焊料顺从性的技术。在一个具体的示例性实施方案中，该技术可以实现为无铅焊料合金，其包含约58.0重量％至约99.998重量％的锡，约0.001重量％至约40.0重量％的铟和约0.001重量％至约2.0重量％重量％至少一种稀土元素。

37. 发明申请

US20020063147A1 Anti-tombstoning solder alloys for surface mount applications 有权
标题翻译：用于表面贴装应用的反墓碑焊料合金
公开(公告)号：US20020063147A1
公开(公告)日：2002-05-30
申请号：US09957196
申请日：2001-09-20
申请人： INDIUM CORPORATION OF AMERICA
发明人： Benlih Huang , Ning C. Lee
IPC分类号： B23K031/00
CPC分类号： B23K35/262 , H05K3/3442 , H05K3/3463
摘要： The object of this invention is to employ a solder alloy comprising tin/lead/silver in order to provide a wider solidification range and achieve balance between the surface tensions of both side of a small leadless component. The expanded solidification range slows the melting and wetting time so as to balance the surface tension of the molten solder, and in turn reduces the tombstoning frequency. The preferred Ag concentration is 0.2-0.5% in weight, the more preferred Ag concentration is 0.3-0.4% in weight. For reflow soldering of small leadless components, the pastes made with the alloy compositions of Sn62.6Pb37Ag0.4 and Sn63Pb36.6Ag0.4 results in improvements in tombstoning.
摘要翻译：本发明的目的是使用包含锡/铅/银的焊料合金，以提供更宽的凝固范围，并实现小型无引线部件的两侧的表面张力之间的平衡。膨胀的固化范围减缓熔融和润湿时间，以平衡熔融焊料的表面张力，进而降低墓碑频率。优选的Ag浓度为0.2-0.5重量％，更优选的Ag浓度为0.3-0.4重量％。对于小型无铅组件的回流焊接，用Sn62.6Pb37Ag0.4和Sn63Pb36.6Ag0.4的合金组成制成的糊料导致了墓碑的改进。

38. 发明授权

US4620661A Corrosion resistant lid for semiconductor package 失效
标题翻译：半导体封装防腐盖
公开(公告)号：US4620661A
公开(公告)日：1986-11-04
申请号：US725673
申请日：1985-04-22
申请人： James A. Slatterly
发明人： James A. Slatterly
IPC分类号： H01L21/48 , H01L21/50 , H01L23/06
CPC分类号： H01L21/50 , H01L21/4817 , H01L2224/48247 , H01L2224/49171 , H01L2924/01014 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/10253 , H01L2924/16195 , H01L2924/3025
摘要： A lid for closing an electronic package that exhibits high resistance to corrosion. The lid includes a metal substrate and a multi-layered protective coating which has low porosity when compared to a single layer coating of the same thickness yet has good soldering properties that enables the lid to be hermetically sealed to the package container. The multi-layer coating includes an initial electroplated layer of nickel followed by a thin interlayer of a noble metal and a second layer of nickel electroplated over noble metal. A top layer of gold is then electroplated over the nickel-noble metal-nickel sandwich to complete the lid structure.
摘要翻译：用于封闭具有高耐腐蚀性的电子封装的盖子。盖子包括金属基底和多层保护涂层，与相同厚度的单层涂层相比，孔隙率低，但具有良好的焊接性能，使盖子能够与包装容器密封。多层涂层包括镍的初始电镀层，随后是贵金属的薄中间层和在贵金属上电镀的第二层镍。然后将顶层金层电镀在镍 - 贵金属 - 镍三明治上，以完成盖结构。

39. 发明授权

US07749340B2 Technique for increasing the compliance of lead-free solders containing silver 有权
标题翻译：增加含银无铅焊料的合格性的技术
公开(公告)号：US07749340B2
公开(公告)日：2010-07-06
申请号：US11550640
申请日：2006-10-18
申请人： Benlih Huang , Hong-Sik Hwang , Ning-Cheng Lee
发明人： Benlih Huang , Hong-Sik Hwang , Ning-Cheng Lee
IPC分类号： C22C13/00 , C22C13/02 , B23K35/34 , C23C22/00
CPC分类号： C22C13/00 , B23K35/262 , B23K35/3006
摘要： A technique for technique for increasing the compliance of lead-free solders containing silver is disclosed. In one particular exemplary embodiment, the technique may be realized as a Sn—Ag—Al alloy composition comprising (0.01-20)% Ag, (0.01-2)% Al, balanced with Sn. In another particular exemplary embodiment, the technique may be realized as a Sn—Ag—Cu—Al alloy composition comprising (0.01-20)% Ag, (0.01-1)% Cu, (0.01-2)% Al, balanced with Sn. In still another particular exemplary embodiment, the technique may be realized as a Sn—Ag—Al—Ni composition comprising (0.01-20)% Ag, (0.01-2)% Al, (0.01-4)% Ni, balanced with Sn. In yet another particular exemplary embodiment, the technique may be realized as a Sn—Ag—Cu—Al—Ni alloy composition comprising (0.01-20)% Ag, (0.01-1)% Cu, (0.01-2)% Al, (0.01-4)% Ni, balanced with Sn.
摘要翻译：公开了一种提高含银无铅焊料柔顺性的技术。在一个具体的示例性实施方案中，该技术可以实现为包含与Sn平衡的（0.01-20）％Ag，（0.01-2）％Al，Sn-Ag-Al合金组合物。在另一特定示例性实施方案中，该技术可以实现为包含（0.01-20）％Ag，（0.01-1）％Cu，（0.01-2）％Al，Sn与Sn平衡的Sn-Ag-Cu-Al合金组合物。在另一个具体的示例性实施方案中，该技术可以实现为包含（0.01-20）％Ag，（0.01-2）％Al，（0.01-4）％Ni，与Sn平衡的Sn-Ag-Al-Ni组合物。在另一个具体的示例性实施方案中，该技术可以实现为包含（0.01-20）％Ag，（0.01-1）％Cu，（0.01-2）％Al，Sn-Ag-Cu-Al- （0.01-4）％Ni，与Sn平衡。

40. 发明申请

US20050028361A1 Integrated underfill process for bumped chip assembly 审中-公开
标题翻译：用于凸起芯片组装的集成底部填充工艺
公开(公告)号：US20050028361A1
公开(公告)日：2005-02-10
申请号：US10636105
申请日：2003-08-07
申请人： Wushing Yin , Ning-Cheng Lee
发明人： Wushing Yin , Ning-Cheng Lee
IPC分类号： H01L21/56 , H01L21/60 , H01L23/29 , H05K3/30
CPC分类号： H01L24/81 , H01L21/563 , H01L23/293 , H01L23/295 , H01L24/29 , H01L24/83 , H01L2224/05568 , H01L2224/05573 , H01L2224/13111 , H01L2224/16225 , H01L2224/29111 , H01L2224/2919 , H01L2224/32225 , H01L2224/73104 , H01L2224/73203 , H01L2224/73204 , H01L2224/81191 , H01L2224/81801 , H01L2224/83191 , H01L2224/83192 , H01L2224/83193 , H01L2224/83856 , H01L2224/83862 , H01L2224/83868 , H01L2224/83885 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01077 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/09701 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/157 , H01L2924/15787 , H01L2924/15788 , H01L2924/1579 , Y10T29/4913 , Y10T29/49144 , Y10T29/49146 , H01L2924/00 , H01L2924/3512 , H01L2224/05599
摘要： An integrated underfilling process for attaching a chip/die having conductive solder bump contacts to a substrate. The process involves B-staging filled underfill on the chip/die, depositing a fluxing unfilled underfill onto the surface of the substrate, mating the chip/die with the B-staged underfill to the substrate and reflowing the assembled chip/substrate. The B-staged filled underfill reduces the coefficient of thermal expansion of the underfill fillet and the fluxing unfilled underfill removes metal oxide from the surface of the solder bump contacts and bond pads to promote the formation of reliable metallurgical joints.
摘要翻译：一种用于将具有导电焊料凸点触点的芯片/芯片附接到基板的集成底部填充工艺。该过程涉及在芯片/管芯上的B阶段填充的底部填充物，在基底表面上沉积未熔化的底部填充物，将芯片/模具与B阶底层填料相配合到衬底上并回流组装的芯片/衬底。 B阶填充的底部填充物减少了底部填充片的热膨胀系数，并且焊剂未填充的底部填充物从焊料凸块接触和接合垫的表面去除金属氧化物，以促进形成可靠的冶金接头。

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