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31. 发明授权

US07915969B2 Distortion compensating circuit 有权
标题翻译：失真补偿电路
公开(公告)号：US07915969B2
公开(公告)日：2011-03-29
申请号：US12342551
申请日：2008-12-23
申请人： Yoshito Shimizu , Noriaki Saito
发明人： Yoshito Shimizu , Noriaki Saito
IPC分类号： H03C3/00 , H03F1/32 , H03F3/24 , H04B1/04 , H04L27/20
CPC分类号： H04L27/367 , H03F1/3282
摘要： A distortion compensating circuit is provided in which, in the polar modulation system, while suppressing increase of compensation data and increase of the circuit scale, a modulated signal can be correctly expressed, or low-distortion characteristics of a power amplifier can be realized. Based on a steady characteristic compensating circuit 11 which stores an output signal amplitude and output phase characteristics with respect to a control voltage in a steady state, amplitude adjustment is executed on amplitude information r11(t) on which amplitude correction is performed, by a first amplitude information adjusting portion 13, whereby the output-response characteristics of an output signal amplitude of an amplifier with respect to a change of the control voltage can be improved.
摘要翻译：提供了一种失真补偿电路，其中在极坐标调制系统中，在抑制补偿数据的增加和电路规模的增加的同时，可以正确地表达调制信号，或者能够实现功率放大器的低失真特性。基于稳定特性补偿电路11，其以相对于稳定状态的控制电压存储输出信号振幅和输出相位特性，对其进行幅度校正的振幅信息r11（t）执行幅度调整，第一幅度信息调整部分13，从而可以提高放大器的输出信号幅度相对于控制电压变化的输出响应特性。

32. 发明授权

US07907589B2 Reception apparatus and reception method 有权
标题翻译：接收方式和接收方式
公开(公告)号：US07907589B2
公开(公告)日：2011-03-15
申请号：US10581036
申请日：2004-11-30
申请人： Yoshito Shimizu , Noriaki Saito
发明人： Yoshito Shimizu , Noriaki Saito
IPC分类号： H04J3/00 , H04B1/04 , H04B1/06 , H04L27/08
CPC分类号： H04W52/08 , H03G3/3052 , H04W52/10 , H04W52/143
摘要： A reception apparatus capable of preventing saturation and sensitivity degradation of a receiver when base transceiver station transmit power control is performed and calibrating offset voltage without increasing the amount of current consumption. In this apparatus, a gain setting section (109) estimates reception field intensity of each time slot in the next frame based on information of the reception field intensity and transmit power information which is information of the transmit power of the base transceiver station and calculates a gain set value according to the estimated reception field intensity. A gain control circuit (110) extracts a maximum gain out of the gains set by the gain setting section (109), uses the maximum gain as a set gain for DC offset voltage calibration and performs gain control at the gain set value corresponding to each time slot. A voltage calibration circuit (111) performs the DC offset voltage calibration of the received signal.
摘要翻译：当基站发射功率控制被执行并且校准失调电压而不增加电流消耗量时，能够防止接收机饱和和灵敏度退化的接收装置。在该装置中，增益设定部（109）基于作为基站的发射功率的信息的接收场强的信息和发送功率信息来估计下一帧中的每个时隙的接收场强，并且计算根据估计的接收场强度增益设定值。增益控制电路（110）从增益设定部（109）提取的增益中提取出最大增益，使用最大增益作为直流偏移电压校准的设定增益，并以对应于每个的增益设定值进行增益控制时隙。电压校准电路（111）对接收到的信号进行DC偏移电压校准。

33. 发明授权

US07778612B2 Polar modulation circuit, integrated circuit and radio apparatus 有权
标题翻译：极性调制电路，集成电路和无线电设备
公开(公告)号：US07778612B2
公开(公告)日：2010-08-17
申请号：US11912169
申请日：2006-04-17
申请人： Yoshito Shimizu , Noriaki Saito
发明人： Yoshito Shimizu , Noriaki Saito
IPC分类号： H04B1/04 , H04B1/62
CPC分类号： H03F1/0222 , H03F1/3282
摘要： An object of the invention is to provide a polar modulation circuit capable of reducing the capacity of data stored in memory and suppressing an increase in the circuit scale related to distortion compensation while assuring the compensation accuracy. The polar modulation circuit according to the invention stores output signal characteristic relative to the control voltage at the steady state after input of the control voltage for a predetermined input amplitude of an input high frequency signal as the basis of distortion compensation of an amplifier separately into an offset storage section 101a which stores data used to add a predetermined DC offset voltage and a coefficient storage section 102 which stores data used for multiplication by a predetermined constant, thus reducing the circuit scale related to distortion compensation while assuring the compensation accuracy.
摘要翻译：本发明的目的是提供一种极性调制电路，其能够降低存储在存储器中的数据的容量，并且在确保补偿精度的同时抑制与失真补偿相关的电路规模的增加。根据本发明的极坐标调制电路将输入的高频信号的预定输入幅度的控制电压输入后的稳定状态下的输出信号特性存储为放大器的失真补偿的基础，偏移存储部分101a，其存储用于添加预定DC偏移电压的数据;以及系数存储部分102，其存储用于乘以预定常数的数据，从而在确保补偿精度的同时减小与失真补偿相关的电路规模。

34. 发明授权

US07272187B2 Filter circuit and radio apparatus 失效
标题翻译：滤波电路和无线电设备
公开(公告)号：US07272187B2
公开(公告)日：2007-09-18
申请号：US10513792
申请日：2003-11-04
申请人： Yoshito Shimizu
发明人： Yoshito Shimizu
IPC分类号： H04B3/00
CPC分类号： H03H11/04
摘要： A distributor 103 distributes an input signal into two lines of distributed signals with equal amplitudes and equal phases. Buffers 104, 105 suppress interference between distributed signals distributed into the two lines. A filter 106 performs a frequency selection which allows only a distributed signal in a predetermined band to pass. A differential amplifier 107 outputs a difference in amplitude components between a distributed signal frequency-selected by the filter 106 and the distributed signal which is not frequency-selected. This allows an attenuation characteristic or passage characteristic in a high-frequency band to be maintained.
摘要翻译：分配器103将输入信号分配成具有相等振幅和相等相位的两行分布信号。缓冲器104,105抑制分布在两条线路中的分布式信号之间的干扰。滤波器106执行仅允许预定频带中的分布式信号通过的频率选择。差分放大器107输出由滤波器106选择的分布式信号与未频率选择的分布式信号之间的振幅分量的差。这允许保持高频带中的衰减特性或通过特性。

35. 发明申请

US20070120617A1 Modulation apparatus and modulation method 审中-公开
标题翻译：调制装置及调制方式
公开(公告)号：US20070120617A1
公开(公告)日：2007-05-31
申请号：US10576304
申请日：2004-10-21
申请人： Junji Sato , Michiaki Matsuo , Noriaki Saito , Yoshito Shimizu
发明人： Junji Sato , Michiaki Matsuo , Noriaki Saito , Yoshito Shimizu
IPC分类号： H03C3/09
CPC分类号： H03F3/24 , H03F1/32 , H03F2200/331 , H04L27/20 , H04L27/36 , H04L2027/003 , H04L2027/0067
摘要： A modulation apparatus which can be applied to the conventional analog PLL modulation system without using an enormous reference table, enables a phase distortion to be compensated accurately without requiring timing control with high accuracy, and can be applied to communication systems that do not perform amplitude modulation. In this apparatus, a signal generation section (101) generates a baseband phase signal. A phase distortion compensation section (102) obtains a phase distortion by multiplying a magnitude of a frequency change at predetermined time or magnitude of phase change between adjacent data of the baseband phase signal by a parameter specific to the apparatus, and thereby compensates the baseband phase signal for the phase distortion. A storage section (103) stores the parameter and calculation equation. A modulation section (105) modulates a frequency converted signal input from a frequency conversion section (104) using the baseband phase signal to generate a modulated signal.
摘要翻译：可以应用于传统的模拟PLL调制系统而不使用庞大的参考表的调制装置使得能够精确地补偿相位失真，而不需要高精度的定时控制，并且可以应用于不执行幅度调制的通信系统。在该装置中，信号生成部（101）生成基带相位信号。相位失真补偿部（102）通过将基带相位信号的相邻数据之间的相位变化的规定时间或相位变化量的频率乘以设备特有的参数来获得相位失真，从而补偿基带相位信号用于相位失真。存储部（103）存储参数和计算式。调制部（105）使用基带相位信号调制从频率变换部（104）输入的变频信号，生成调制信号。

36. 发明授权

US08599968B2 Sampling circuit and receiver utilizing the same 有权
标题翻译：采样电路和接收机利用它
公开(公告)号：US08599968B2
公开(公告)日：2013-12-03
申请号：US13121244
申请日：2009-12-04
申请人： Yohei Morishita , Noriaki Saito , Yoshito Shimizu
发明人： Yohei Morishita , Noriaki Saito , Yoshito Shimizu
IPC分类号： H03D3/00
CPC分类号： H03H19/004 , H03H15/00 , H04B1/28
摘要： A sampling circuit and a receiver have a high level of filter design flexibility and excellent image rejection characteristics. Signals with phases that differ by 90° are sampled using an IQ generating circuit and are weighted by each of multiple parallel-connected discrete-time circuits, and the result of addition by an output adding circuit is ultimately output. Alternatively, a configuration in which the multiple parallel-connected discrete-time circuits and the output adding circuit are cascade-connected is adopted, so that frequency characteristics having an attenuation pole to one side can be achieved and excellent image rejection characteristics can be obtained.
摘要翻译：采样电路和接收器具有高水平的滤波器设计灵活性和出色的图像抑制特性。使用IQ产生电路对相位差90°的信号进行采样，并由多个并联连接的离散时间电路中的每一个进行加权，最后输出输出加法电路的相加结果。或者，采用并联连接的多个并联连接的离散时间电路和输出加法电路串联的结构，从而能够实现具有一侧衰减极点的频率特性，并且可以获得优异的图像抑制特性。

37. 发明授权

US08476952B2 Multiphase mixer 有权
标题翻译：多相混合器
公开(公告)号：US08476952B2
公开(公告)日：2013-07-02
申请号：US13146085
申请日：2010-01-29
申请人： Yoshito Shimizu , Yohei Morishita
发明人： Yoshito Shimizu , Yohei Morishita
IPC分类号： H03H11/16
CPC分类号： H03D7/1441 , H03D7/1466 , H03D7/1483
摘要： Disclosed is a mixer able to simultaneously suppress self-mixing and low-order harmonic response in a charge sampling circuit. Specifically disclosed is a multiphase mixer provided with a transconductance amplifier (101) for converting a voltage signal into a current signal, an N number (where N is a natural number that is 2 or more) of first integrators (401, 402) which are connected in parallel to the subsequent stage of the transconductance amplifier (101), and a 2N number of mixers (102, 103, 104, 105) connected in parallel in pairs to the respective N number of first integrators (401, 402), wherein two mixers connected to the same first integrator of any of the N number of first integrators (401, 402) are controlled by driving signals comprised of pulse trains with the same frequency and phases differing by 180°.
摘要翻译：公开了能够同时抑制充电采样电路中的自混合和低次谐波响应的混频器。具体公开了一种多相混频器，其具有用于将电压信号转换为电流信号的跨导放大器（101），第一积分器（401,402）的N数（其中N为2以上的自然数）为与跨导放大器（101）的后续级并联连接，并且2N个混合器（102,103,104,105）成对并联连接到相应的N个第一积分器（401,402），其中连接到N个第一积分器（401,402）中的任一个的相同第一积分器的两个混频器由具有相同频率和相位相差180°的脉冲串组成的驱动信号来控制。

38. 发明申请

US20090108952A1 DISTORTION COMPENSATING CIRCUIT 有权
标题翻译：失真补偿电路
公开(公告)号：US20090108952A1
公开(公告)日：2009-04-30
申请号：US12342551
申请日：2008-12-23
申请人： Yoshito Shimizu , Noriaki Saito
发明人： Yoshito Shimizu , Noriaki Saito
IPC分类号： H03C1/00
CPC分类号： H04L27/367 , H03F1/3282
摘要： A distortion compensating circuit is provided in which, in the polar modulation system, while suppressing increase of compensation data and increase of the circuit scale, a modulated signal can be correctly expressed, or low-distortion characteristics of a power amplifier can be realized. Based on a steady characteristic compensating circuit 11 which stores an output signal amplitude and output phase characteristics with respect to a control voltage in a steady state, amplitude adjustment is executed on amplitude information r11(t) on which amplitude correction is performed, by a first amplitude information adjusting portion 13, whereby the output-response characteristics of an output signal amplitude of an amplifier with respect to a change of the control voltage can be improved.
摘要翻译：提供了一种失真补偿电路，其中在极坐标调制系统中，在抑制补偿数据的增加和电路规模的增加的同时，可以正确地表达调制信号，或者能够实现功率放大器的低失真特性。基于稳定特性补偿电路11，其以相对于稳定状态的控制电压存储输出信号振幅和输出相位特性，对其进行幅度校正的振幅信息r11（t）执行幅度调整，第一幅度信息调整部分13，从而可以提高放大器的输出信号幅度相对于控制电压变化的输出响应特性。

39. 发明申请

US20090023402A1 POLAR MODULATION CIRCUIT, INTEGRATED CIRCUIT AND RADIO APPARATUS 有权
标题翻译：极性调制电路，集成电路和无线电设备
公开(公告)号：US20090023402A1
公开(公告)日：2009-01-22
申请号：US11912169
申请日：2006-04-17
申请人： Yoshito Shimizu , Noriaki Saito
发明人： Yoshito Shimizu , Noriaki Saito
IPC分类号： H04B1/04 , H04B1/62
CPC分类号： H03F1/0222 , H03F1/3282
摘要： An object of the invention is to provide a polar modulation circuit capable of reducing the capacity of data stored in memory and suppressing an increase in the circuit scale related to distortion compensation while assuring the compensation accuracy. The polar modulation circuit according to the invention stores output signal characteristic relative to the control voltage at the steady state after input of the control voltage for a predetermined input amplitude of an input high frequency signal as the basis of distortion compensation of an amplifier separately into an offset storage section 101a which stores data used to add a predetermined DC offset voltage and a coefficient storage section 102 which stores data used for multiplication by a predetermined constant, thus reducing the circuit scale related to distortion compensation while assuring the compensation accuracy.
摘要翻译：本发明的目的是提供一种极性调制电路，其能够降低存储在存储器中的数据的容量，并且在确保补偿精度的同时抑制与失真补偿相关的电路规模的增加。根据本发明的极坐标调制电路将输入的高频信号的预定输入幅度的控制电压输入后的稳定状态下的输出信号特性存储为放大器的失真补偿的基础，偏移存储部分101a，其存储用于添加预定DC偏移电压的数据;以及系数存储部分102，其存储用于乘以预定常数的数据，从而在确保补偿精度的同时减小与失真补偿相关的电路规模。

40. 发明申请

US20070082629A1 Reception apparatus and reception method 有权
标题翻译：接收方式和接收方式
公开(公告)号：US20070082629A1
公开(公告)日：2007-04-12
申请号：US10581036
申请日：2004-11-30
申请人： Yoshito Shimizu , Noriaki Saito
发明人： Yoshito Shimizu , Noriaki Saito
IPC分类号： H01Q11/12
CPC分类号： H04W52/08 , H03G3/3052 , H04W52/10 , H04W52/143
摘要： A reception apparatus capable of preventing saturation and sensitivity degradation of a receiver when base transceiver station transmit power control is performed and calibrating offset voltage without increasing the amount of current consumption. In this apparatus, a gain setting section (109) estimates reception field intensity of each time slot in the next frame based on information of the reception field intensity and transmit power information which is information of the transmit power of the base transceiver station and calculates a gain set value according to the estimated reception field intensity. A gain control circuit (110) extracts a maximum gain out of the gains set by the gain setting section (109), uses the maximum gain as a set gain for DC offset voltage calibration and performs gain control at the gain set value corresponding to each time slot. A voltage calibration circuit (111) performs the DC offset voltage calibration of the received signal.
摘要翻译：当基站发射功率控制被执行并且校准失调电压而不增加电流消耗量时，能够防止接收机饱和和灵敏度退化的接收装置。在该装置中，增益设定部（109）基于作为基站的发射功率的信息的接收场强的信息和发送功率信息来估计下一帧中的每个时隙的接收场强，并且计算根据估计的接收场强度增益设定值。增益控制电路（110）从增益设定部（109）提取的增益中提取出最大增益，使用最大增益作为直流偏移电压校准的设定增益，并以对应于每个的增益设定值进行增益控制时隙。电压校准电路（111）对接收到的信号进行DC偏移电压校准。

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