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    • 32. 发明申请
    • Twin-Cell Semiconductor Memory Devices
    • 双电池半导体存储器件
    • US20090268515A1
    • 2009-10-29
    • US12498597
    • 2009-07-07
    • Won-Cheol JeongJae-Hyun Park
    • Won-Cheol JeongJae-Hyun Park
    • G11C11/14G11C7/02
    • G11C11/1675G11C11/161G11C11/1659G11C11/1673
    • Twin cell type semiconductor memory devices are provided that include a plurality of main bit lines and a plurality of reference bit lines. Each of the reference bit lines correspond to respective ones of the main bit lines to form a plurality of bit line pairs. A plurality of sense amplifiers are provided that are electrically connected to a respective one of the plurality of bit line pairs. At least one of the plurality of main bit lines or the plurality of reference bit lines is interposed between the main bit line and the corresponding reference bit line of each bit line pair. At least some of the main bit lines may cross respective ones of the reference bit lines in a sense amplifier region of the semiconductor memory device that contains the plurality of sense amplifiers.
    • 提供了包括多个主位线和多个参考位线的双电池型半导体存储器件。 每个参考位线对应于主位线中的相应位线以形成多个位线对。 提供多个读出放大器,其电连接到多个位线对中的相应一个。 多个主位线或多个参考位线中的至少一个被插入在每个位线对的主位线和对应的参考位线之间。 至少一些主位线可以在包含多个读出放大器的半导体存储器件的读出放大器区域中交叉相应的参考位线。