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31. 发明申请

US20090028843A1 IgA allelic variants 审中-公开
标题翻译： IgA等位基因变体
公开(公告)号：US20090028843A1
公开(公告)日：2009-01-29
申请号：US11290928
申请日：2005-11-30
申请人： Chris Jones , Neale Fretwell , Michael Day , Iain Peters
发明人： Chris Jones , Neale Fretwell , Michael Day , Iain Peters
IPC分类号： A61K39/395 , G01N33/563 , G01N33/53 , C07H21/00 , A61K38/16 , A61K31/145 , A61K36/886 , A61P37/00 , G06F7/20 , A23K1/00 , G06F17/30 , A61K31/202 , A61K31/12 , A61K31/375 , C07K16/00 , A61K31/716 , A61K31/195
CPC分类号： C12Q1/6883 , C12Q2600/156
摘要： The invention relates to a method for determining susceptibility to an IgA-related disorder in an animal, the method comprising: a) identifying the or each IgA allelic variant present in a sample from the animal; and b) thereby determining whether the animal is susceptible to an IgA-related disorder.
摘要翻译：本发明涉及一种用于测定动物中与IgA相关疾病的易感性的方法，所述方法包括：a）鉴定来自所述动物的样品中存在的或每个IgA等位基因变体; 和b）从而确定该动物是否易感染IgA相关病症。

32. 发明申请

US20070054169A1 Ceramic membranes with integral seals and support, and electrochemical cells and electrochemical cell stacks including the same 有权
标题翻译：具有整体密封和支撑的陶瓷膜，以及包括其的电化学电池和电化学电池堆
公开(公告)号：US20070054169A1
公开(公告)日：2007-03-08
申请号：US11220361
申请日：2005-09-06
申请人： Michael Day , J. Funk , Todd Lesousky , Matthew Seabaugh
发明人： Michael Day , J. Funk , Todd Lesousky , Matthew Seabaugh
IPC分类号： H01M8/12 , H01M8/02 , H01M8/24
CPC分类号： H01M8/1226 , H01M4/9033 , H01M8/0282 , H01M8/2435 , H01M2008/1293 , H01M2300/0074
摘要： Ceramic membranes with integral seals and support, and related electrochemical cells and cell stacks. The membrane comprises a thin electrolyte layer supported on a porous electrode layer which in turn is supported on a thick ceramic support layer, preferably a ceramic electrolyte support. The support layer is divided into a plurality of self-supporting thin membrane regions by a network of thicker integrated support ribs. The thin electrolyte layer and thick ceramic support layer preferably define a sealing perimeter surrounding the porous electrode layer.
摘要翻译：具有整体密封和支撑的陶瓷膜，以及相关的电化学电池和电池组。膜包括负载在多孔电极层上的薄电解质层，该多孔电极层又被支撑在厚的陶瓷支撑层上，优选陶瓷电解质载体上。通过较厚的整体支撑肋的网络将支撑层分成多个自支撑薄膜区域。薄电解质层和厚陶瓷支撑层优选限定围绕多孔电极层的密封周边。

33. 发明申请

US20060212840A1 Method and system for efficient use of secondary threads in a multiple execution path processor 审中-公开
标题翻译：在多执行路径处理器中有效使用辅助线程的方法和系统
公开(公告)号：US20060212840A1
公开(公告)日：2006-09-21
申请号：US11082040
申请日：2005-03-16
申请人： Danny Kumamoto , Michael Day
发明人： Danny Kumamoto , Michael Day
IPC分类号： G06F9/44
CPC分类号： G06F9/461
摘要： Systems and methods for the efficient utilization of threads in a processor with multiple execution paths are disclosed. These systems and methods alleviate the need to perform context switching in one or more threads while simultaneously allowing these threads to run useful tasks. One or more of these threads may run tasks in a privileged mode, thus there may be no need to save and restore context in these threads. Additionally, by keeping the threads executing in privileged mode at a lower priority, these privileged mode tasks can run exclusively on one or more of these threads without significantly delaying the execution of other threads.
摘要翻译：公开了在具有多个执行路径的处理器中有效利用线程的系统和方法。这些系统和方法减轻了在一个或多个线程中执行上下文切换的需要，同时允许这些线程运行有用的任务。这些线程中的一个或多个可以以特权模式运行任务，因此可能不需要在这些线程中保存和恢复上下文。另外，通过将特权模式下执行的线程保持在较低优先级，这些特权模式任务可以独占于这些线程中的一个或多个，而不会显着延迟其他线程的执行。

34. 发明申请

US20060135361A1 Markable material 审中-公开
标题翻译：可标识材料
公开(公告)号：US20060135361A1
公开(公告)日：2006-06-22
申请号：US11021575
申请日：2004-12-22
申请人： David Markel , Marshall Field , Michael Day , Qin Liu
发明人： David Markel , Marshall Field , Michael Day , Qin Liu
IPC分类号： B41M5/24
CPC分类号： B41M5/26 , B41M5/30 , B41M5/323 , B41M5/3372 , B41M5/3375 , B41M5/3377 , B41M5/465
摘要： A markable material includes a base matrix material, a thermally activated marking material, and at least one colorant.
摘要翻译：可标记材料包括基底材料，热活化标记材料和至少一种着色剂。

35. 发明申请

US20060085791A1 Method for broadcasting a condition to threads executing on a plurality of on-chip processors 有权
标题翻译：用于向多个片上处理器执行的线程广播条件的方法
公开(公告)号：US20060085791A1
公开(公告)日：2006-04-20
申请号：US10965634
申请日：2004-10-14
申请人： Michael Day , Mark Nutter , Daniel Stasiak
发明人： Michael Day , Mark Nutter , Daniel Stasiak
IPC分类号： G06F9/46
CPC分类号： G06F9/542 , G06F2209/544
摘要： The present invention provides for notifying threads. A determination is made whether there is a condition for which a thread is to be notified. If so, a notification indicia is broadcasted. A flag is set in at least one memory storage area as a function of the notification indicia wherein the setting the flag occurs without the intervention of an operating system. Therefore, latencies for notification of threads are minimized.
摘要翻译：本发明提供通知线程。确定是否存在要通知线程的条件。如果是，广播通知标记。作为通知标记的功能的至少一个存储器存储区域中设置标志，其中在没有操作系统的干预的情况下发生标志。因此，线程通知的延迟最小化。

36. 发明申请

US20060069878A1 System and method for virtualization of processor resources 有权
标题翻译：处理器资源虚拟化的系统和方法
公开(公告)号：US20060069878A1
公开(公告)日：2006-03-30
申请号：US10955093
申请日：2004-09-30
申请人： Maximino Aguilar , Michael Day , Mark Nutter , James Xenidis
发明人： Maximino Aguilar , Michael Day , Mark Nutter , James Xenidis
IPC分类号： G06F12/08 , G06F12/00
CPC分类号： G06F12/109 , G06F12/0284 , G06F12/1045
摘要： A system and method for virtualization of processor resources is presented. A thread is created on a processor and the processor's local memory is mapped into an effective address space. In doing so, the processor's local memory is accessible by other processors, regardless of whether the processor is running. Additional threads create additional local memory mappings into the effective address space. The effective address space corresponds to either a physical local memory or a “soft” copy area. When the processor is running, a different processor may access data that is located in the first processor's local memory from the processor's local storage area. When the processor is not running, a softcopy of the processor's local memory is stored in a memory location (i.e. locked cache memory, pinned system memory, virtual memory, etc.) for other processors to continue accessing.
摘要翻译：提出了一种用于处理器资源虚拟化的系统和方法。在处理器上创建线程，并将处理器的本地内存映射到有效的地址空间。这样做，处理器的本地内存可以由其他处理器访问，无论处理器是否正在运行。附加线程会在有效地址空间中创建额外的本地内存映射。有效地址空间对应于物理本地存储器或“软”复制区域。当处理器运行时，不同的处理器可以从处理器的本地存储区域访问位于第一处理器的本地存储器中的数据。当处理器未运行时，处理器的本地存储器的软拷贝存储在其他处理器的存储器位置（即锁定的高速缓冲存储器，固定的系统存储器，虚拟存储器等）中以继续访问。

37. 发明申请

US20060031836A1 Hierarchical management for multiprocessor system with real-time attributes 失效
标题翻译：具有实时属性的多处理器系统的分层管理
公开(公告)号：US20060031836A1
公开(公告)日：2006-02-09
申请号：US10912481
申请日：2004-08-05
申请人： Jeffrey Brown , Michael Day , Harm Hofstee , Charles Johns , James Kahle , Michael Wang
发明人： Jeffrey Brown , Michael Day , Harm Hofstee , Charles Johns , James Kahle , Michael Wang
IPC分类号： G06F9/46
CPC分类号： G06F1/3203
摘要： The present invention provides for controlling the power consumption of an element. A first power control command is issued by software for the element. It is determined if the power control command corresponds to an allowable power control state for that element as defined by the hardware. If the power control command is not an allowable power control state for that element, the hardware sets the power control at a higher level than the power control state issued by the software. The software is real time software, and the software also sets minimally acceptable activity control states. A hierarchy of power consumption is defined for different elements of a chip by software, which provides the minimum level of power consumption by any element or sub-element on a chip.
摘要翻译：本发明提供用于控制元件的功耗。第一个功率控制命令由该元件的软件发出。确定功率控制命令是否对应于由硬件定义的该元件的容许功率控制状态。如果功率控制命令不是该元件的允许功率控制状态，则硬件将功率控制设置在比由软件发出的功率控制状态更高的水平。该软件是实时软件，软件还设置了最低限度可接受的活动控制状态。通过软件为芯片的不同元件定义功耗层级，其通过芯片上的任何元件或子元件提供最低功耗水平。

38. 发明申请

US20060015876A1 Light weight context switching technique 失效
标题翻译：轻量级上下文切换技术
公开(公告)号：US20060015876A1
公开(公告)日：2006-01-19
申请号：US10891773
申请日：2004-07-15
申请人： Michael Day , Mark Nutter
发明人： Michael Day , Mark Nutter
IPC分类号： G06F9/46
CPC分类号： G06F9/461 , G06F9/485
摘要： An apparatus, a method, and a computer program product are provided for more efficiently allowing context switching. Currently, context switching can be costly because of both memory requirements to store data from pre-empted applications, as well as the bus requirements to move the data at pre-emption. To alleviate at least some of the costs associated with context switching, addition fields, either with associated Application Program Interfaces (APIs) or coupled to application modules, can be employed to indicate points of light weight context during the operation of an application. Therefore, an operating system can pre-empt applications at points where the context is relatively light, reducing the costs on both storage and on bus usage.
摘要翻译：提供了一种用于更有效地允许上下文切换的装置，方法和计算机程序产品。目前，上下文切换可能是昂贵的，因为存储器要求存储来自抢占应用的数据，以及总线要求以优先移动数据。为了减轻与上下文切换相关联的至少一些成本，可以使用具有相关联的应用程序接口（API）或耦合到应用模块的附加字段来在应用的操作期间指示轻量级上下文的点。因此，操作系统可以在上下文相对较轻的点预占应用程序，从而降低存储和总线使用的成本。

39. 发明申请

US20060015652A1 Establishing command order in an out of order DMA command queue 失效
标题翻译：在命令行DMA命令队列中建立命令顺序
公开(公告)号：US20060015652A1
公开(公告)日：2006-01-19
申请号：US10891772
申请日：2004-07-15
申请人： Michael Day , Charles Johns , Peichun Liu , Thuong Truong , Takeshi Yamazaki
发明人： Michael Day , Charles Johns , Peichun Liu , Thuong Truong , Takeshi Yamazaki
IPC分类号： G06F13/14
CPC分类号： G06F13/28
摘要： A method, an apparatus, and a computer program are provided for controlling memory access. Direct Memory Access (DMA) units have become commonplace in a number of bus architectures. However, managing limited system resources has become a challenge with multiple DMA units. In order to mange the multitude of commands generated and preserve dependencies, embedded flags in commands or a barrier command are used. These operations then can control the order in which commands are executed so as to preserve dependencies.
摘要翻译：提供了一种用于控制存储器访问的方法，装置和计算机程序。直接存储器访问（DMA）单元已经在许多总线架构中变得普遍。然而，管理有限的系统资源已成为多个DMA单元的挑战。为了管理生成的多个命令并保留依赖关系，使用命令中的嵌入式标志或障碍命令。这些操作然后可以控制执行命令的顺序，以便保留依赖性。

40. 发明申请

US20050097398A1 Program debug method and apparatus 有权
标题翻译：程序调试方法和设备
公开(公告)号：US20050097398A1
公开(公告)日：2005-05-05
申请号：US10697865
申请日：2003-10-30
申请人： Michael Day , Sidney Manning
发明人： Michael Day , Sidney Manning
IPC分类号： G06F11/00
CPC分类号： G06F11/3656
摘要： The present invention provides for an apparatus employed to debug a program operating in a supplemental processor when the processor's registers are not readable directly by the debugging operation of a main processor. A program operating in main memory halts due to operational errors. The program code lines save to a cache. In the main processor, a pool of memory is reserved. A copy of the data from the nominally inaccessible supplementary processor registers also transfers to the reserved storage area for processing of the program needing debugging. After the program debugging is complete, a copy of the contents of the memory pool is restored to the memory of the target supplemental processor. A copy of the local store register state and remaining local store data returns to main memory.
摘要翻译：本发明提供一种用于当处理器的寄存器不能通过主处理器的调试操作直接读取时用于调试在辅助处理器中操作的程序的装置。在主存储器中运行的程序由于操作错误而停止。程序代码行保存到缓存。在主处理器中，保留了一个内存池。来自标称不可访问的补充处理器寄存器的数据的副本也传送到预留的存储区域，以便处理需要调试的程序。程序调试完成后，内存池内容的副本将还原到目标补丁处理器的内存中。本地存储寄存器状态和剩余本地存储数据的副本返回到主存储器。

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