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31. 发明申请

US20070021293A1 SHARED GATE FOR CONVENTIONAL PLANAR DEVICE AND HORIZONTAL CNT 有权
标题翻译：常规平面设备和水平CNT的共享门
公开(公告)号：US20070021293A1
公开(公告)日：2007-01-25
申请号：US11161146
申请日：2005-07-25
申请人： Toshiharu Furukawa , Mark Hakey , Steven Holmes , David Horak , Charles Koburger , Mark Masters
发明人： Toshiharu Furukawa , Mark Hakey , Steven Holmes , David Horak , Charles Koburger , Mark Masters
IPC分类号： B01J29/04 , B01J29/87
CPC分类号： H01L21/823412 , B01J23/74 , B01J37/0238 , B82Y10/00 , H01L21/7624 , H01L21/823437 , H01L27/286 , H01L51/0048 , H01L51/0545 , H01L51/055 , Y10S977/742 , Y10S977/762 , Y10S977/763
摘要： A semiconductor structure in which a planar semiconductor device and a horizontal carbon nanotube transistor have a shared gate and a method of fabricating the same are provided in the present application. The hybrid semiconductor structure includes at least one horizontal carbon nanotube transistor and at least one planar semiconductor device, in which the at least one horizontal carbon nanotube transistor and the at least one planar semiconductor device have a shared gate and the at least one horizontal carbon nanotube transistor is located above a gate of the at least one planar semiconductor device.
摘要翻译：在本申请中提供了其中平面半导体器件和水平碳纳米管晶体管具有共享栅极的半导体结构及其制造方法。所述混合半导体结构包括至少一个水平碳纳米管晶体管和至少一个平面半导体器件，其中所述至少一个水平碳纳米管晶体管和所述至少一个平面半导体器件具有共享栅极，并且所述至少一个水平碳纳米管晶体管位于至少一个平面半导体器件的栅极之上。

32. 发明申请

US20060205123A1 METHODS FOR METAL PLATING OF GATE CONDUCTORS AND SEMICONDUCTORS FORMED THEREBY 有权
标题翻译：用于金属导电体和其形成的半导体金属镀层的方法
公开(公告)号：US20060205123A1
公开(公告)日：2006-09-14
申请号：US10906881
申请日：2005-03-10
申请人： Steven Holmes , Charles Koburger , David Horak , Toshiharu Furukawa , Mark Hakey
发明人： Steven Holmes , Charles Koburger , David Horak , Toshiharu Furukawa , Mark Hakey
IPC分类号： H01L21/84 , H01L21/44 , H01L23/06 , H01L21/00
CPC分类号： H01L29/785 , H01L29/4908 , H01L29/66795
摘要： A method of metal plating a gate conductor on a semiconductor is provided. The method includes defining an organic polymer plating mandrel on the semiconductor, activating one or more sites of the organic polymer plating mandrel, and binding a seed layer to the one or more of the activated sites. A metallic conductive material can then be plated on the seed layer to form the gate conductor. Semiconductor devices having a gate conductor plated thereon to a width of between about 1 to about 7 nanometers are also provided.
摘要翻译：提供了一种对半导体上的栅极导体进行金属镀覆的方法。该方法包括在半导体上限定有机聚合物电镀心轴，激活有机聚合物电镀心轴的一个或多个位点，以及将种子层结合到一个或多个活化位点。然后可以将金属导电材料电镀在种子层上以形成栅极导体。还提供了其上镀有宽度在约1至约7纳米之间的栅极导体的半导体器件。

33. 发明申请

US20060172479A1 Method of forming buried isolation regions in semiconductor substrates and semiconductor devices with buried isolation regions 有权
公开(公告)号：US20060172479A1
公开(公告)日：2006-08-03
申请号：US11374939
申请日：2006-03-14
申请人： Toshiharu Furukawa , Mark Hakey , Steven Holmes , David Horak , Charles Koburger
发明人： Toshiharu Furukawa , Mark Hakey , Steven Holmes , David Horak , Charles Koburger
IPC分类号： H01L21/8234
CPC分类号： H01L29/0653 , B82Y10/00 , H01L21/28114 , H01L21/3086 , H01L21/31144 , H01L21/76224 , H01L21/76243 , H01L21/76267 , H01L21/76283 , H01L29/0649 , H01L29/0657 , H01L29/1083 , H01L29/165 , H01L29/66545 , H01L29/66575 , H01L29/6659 , H01L29/66772 , H01L29/7833 , H01L29/78654 , H01L29/78684
摘要： Semiconductor structures and method of forming semiconductor structures. The semiconductor structures including nano-structures or fabricated using nano-structures. The method of forming semiconductor structures including generating nano-structures using a nano-mask and performing additional semiconductor processing steps using the nano-structures generated.

34. 发明申请

US20060166432A1 PROCESS FOR OXIDE CAP FORMATION IN SEMICONDUCTOR MANUFACTURING 有权
标题翻译：半导体制造中氧化层形成的工艺
公开(公告)号：US20060166432A1
公开(公告)日：2006-07-27
申请号：US10905881
申请日：2005-01-25
申请人： Steven Holmes , Toshiharu Furukawa , Mark Hakey , David Horak , Charles Koburger , Larry Nesbit
发明人： Steven Holmes , Toshiharu Furukawa , Mark Hakey , David Horak , Charles Koburger , Larry Nesbit
IPC分类号： H01L21/8242
CPC分类号： H01L21/022 , H01L21/02164 , H01L21/02282 , H01L21/3165 , H01L21/76829 , H01L21/76897 , H01L27/10855 , H01L27/10888
摘要： A process for forming a semiconductor device having an oxide beanie structure (an oxide cap overhanging an underlying portion of the device). An oxide layer is first provided covering that portion, with the layer having a top surface and a side surface. The top and side surfaces are then exposed to an oxide deposition bath, thereby causing deposition of oxide on those surfaces. Deposition of oxide on the top surface causes growth of the cap layer in a vertical direction and deposition of oxide on the side surface causes growth of the cap layer in a horizontal direction, thereby forming the beanie structure.
摘要翻译：一种用于形成具有氧化物结构的氧化物半导体器件的方法（在器件的下面突出的氧化物盖）。首先设置覆盖该部分的氧化物层，该层具有顶表面和侧表面。然后将顶表面和侧表面暴露于氧化物沉积浴中，从而在这些表面上沉积氧化物。顶部表面上的氧化物的沉积导致盖层在垂直方向上的生长，并且在侧面上的氧化物的沉积导致盖层在水平方向上的生长，从而形成豆瓣结构。

35. 发明申请

US20060103830A1 METHOD AND APPARATUS FOR IMMERSION LITHOGRAPHY 失效
标题翻译：用于倾斜图的方法和装置
公开(公告)号：US20060103830A1
公开(公告)日：2006-05-18
申请号：US10904599
申请日：2004-11-18
申请人： Steven Holmes , Toshiharu Furukawa , Mark Hakey , Daniel Corliss , David Horak , Charles Koburger
发明人： Steven Holmes , Toshiharu Furukawa , Mark Hakey , Daniel Corliss , David Horak , Charles Koburger
IPC分类号： G03B27/58
CPC分类号： G03F7/707 , G03F7/70341 , G03F7/70808
摘要： An apparatus for holding a wafer and a method for immersion lithography. The apparatus, including a wafer chuck having a central circular vacuum platen, an outer region, and a circular groove centered on the vacuum platen, a top surface of the vacuum platen recessed below a top surface of the outer region and a bottom surface of the groove recessed below the top surface of the vacuum platen; one or more suction ports in the bottom surface of the groove; and a hollow toroidal inflatable and deflatable bladder positioned within the groove.
摘要翻译：一种用于保持晶片的装置和浸没式光刻方法。该装置包括具有中心圆形真空压板的圆盘卡盘，外部区域和以真空压板为中心的圆形槽，真空压板的顶表面凹入到外部区域的顶表面之下，底部表面凹槽凹陷在真空压板的顶表面下方; 在槽的底表面中的一个或多个吸入口; 以及定位在槽内的空心环形充气和可放气的囊。

36. 发明申请

US20080117671A1 MEMORY DEVICES USING CARBON NANOTUBE (CNT) TECHNOLOGIES 有权
标题翻译：使用碳纳米管（CNT）技术的存储器件
公开(公告)号：US20080117671A1
公开(公告)日：2008-05-22
申请号：US12018915
申请日：2008-01-24
申请人： Toshiharu Furukawa , Mark Hakey , Steven Holmes , David Horak , Charles Koburger
发明人： Toshiharu Furukawa , Mark Hakey , Steven Holmes , David Horak , Charles Koburger
IPC分类号： G11C11/34 , G11C7/00
CPC分类号： G11C13/025 , B82Y10/00 , H01L51/0048 , H01L51/0512
摘要： Structures for memory devices. The structure includes (a) a substrate; (b) a first and second electrode regions on the substrate; and (c) a third electrode region disposed between the first and second electrode regions. In response to a first write voltage potential applied between the first and third electrode regions, the third electrode region changes its own shape, such that in response to a pre-specified read voltage potential subsequently applied between the first and third electrode regions, a sensing current flows between the first and third electrode regions. In addition, in response to a second write voltage potential being applied between the second and third electrode regions, the third electrode region changes its own shape such that in response to the pre-specified read voltage potential applied between the first and third electrode regions, said sensing current does not flow between the first and third electrode regions.
摘要翻译：存储器件结构。该结构包括（a）基底; （b）基板上的第一和第二电极区域; 和（c）设置在第一和第二电极区之间的第三电极区。响应于施加在第一和第三电极区域之间的第一写入电压电位，第三电极区域改变其自身形状，使得响应于随后施加在第一和第三电极区域之间的预先指定的读取电压电势，感测电流在第一和第三电极区域之间流动。此外，响应于施加在第二和第三电极区域之间的第二写入电压电位，第三电极区域改变其自身形状，使得响应于施加在第一和第三电极区域之间的预先设定的读取电压电位，所述感测电流不在第一和第三电极区域之间流动。

37. 发明申请

US20070228429A1 METHOD OF DOPING A GATE ELECTRODE OF A FIELD EFFECT TRANSISTOR 失效
标题翻译：电场效应晶体管的栅极电极的方法
公开(公告)号：US20070228429A1
公开(公告)日：2007-10-04
申请号：US11757660
申请日：2007-06-04
申请人： Toshiharu Furukawa , Mark Hakey , Steven Holmes , David Horak , Charles Koburger
发明人： Toshiharu Furukawa , Mark Hakey , Steven Holmes , David Horak , Charles Koburger
IPC分类号： H01L29/78
CPC分类号： H01L29/4983 , H01L29/4908 , H01L29/6656 , H01L29/6659 , H01L29/66772 , H01L29/7833 , H01L29/78621 , Y10S977/742 , Y10S977/847
摘要： A method of fabricating a structure and fabricating related semiconductor transistors and novel semiconductor transistor structures. The method of fabricating the structure includes: providing a substrate having a top surface; forming an island on the top surface of the substrate, a top surface of the island parallel to the top surface of the substrate, a sidewall of the island extending between the top surface of the island and the top surface of the substrate; forming a plurality of carbon nanotubes on the sidewall of the island; and performing an ion implantation, the ion implantation penetrating into the island and blocked from penetrating into the substrate in regions of the substrate masked by the island and the carbon nanotubes.
摘要翻译：一种制造结构并制造相关半导体晶体管和新型半导体晶体管结构的方法。制造该结构的方法包括：提供具有顶表面的基底; 在所述基板的顶表面上形成岛，所述岛的顶表面平行于所述基底的顶表面，所述岛的侧壁在所述岛的顶表面和所述基底的顶表面之间延伸; 在岛的侧壁上形成多个碳纳米管; 并且进行离子注入，所述离子注入在所述岛状体和所述碳纳米管所掩盖的基板的区域中贯穿所述岛并阻止其侵入所述基板。

38. 发明申请

US20070215224A1 MICRO-ELECTRO-MECHANICAL VALVES AND PUMPS AND METHODS OF FABRICATING SAME 有权
标题翻译：微机电阀和泵及其制造方法
公开(公告)号：US20070215224A1
公开(公告)日：2007-09-20
申请号：US11276772
申请日：2006-03-14
申请人： Toshiharu Furukawa , Mark Hakey , Steven Holmes , David Horak , Charles Koburger
发明人： Toshiharu Furukawa , Mark Hakey , Steven Holmes , David Horak , Charles Koburger
IPC分类号： F15C1/06
CPC分类号： F15C1/06 , F04B43/043 , F15C5/00 , F16K99/0001 , F16K99/0015 , F16K99/0051 , F16K2099/0074 , F16K2099/0094 , Y10T29/49236 , Y10T29/49412 , Y10T137/2224
摘要： Micro-valves and micro-pumps and methods of fabricating micro-valves and micro-pumps. The micro-valves and micro-pumps include electrically conductive diaphragms fabricated from electrically conductive nano-fibers. Fluid flow through the micro-valves and pumping action of the micro-pumps is accomplished by applying electrostatic forces to the electrically conductive diaphragms.
摘要翻译：微型阀门和微型泵以及制造微型阀门和微型泵的方法。微型阀和微型泵包括由导电纳米纤维制成的导电隔膜。通过微型阀的流体流动和微型泵的泵送作用是通过将静电力施加到导电隔膜来实现的。

39. 发明申请

US20070207604A1 WIRING PATERNS FORMED BY SELECTIVE METAL PLATING 失效
标题翻译：通过选择性金属镀层形成的接线
公开(公告)号：US20070207604A1
公开(公告)日：2007-09-06
申请号：US11745610
申请日：2007-05-08
申请人： Toshiharu Furukawa , Mark Hakey , Steven Holmes , David Horak , Charles Koburger
发明人： Toshiharu Furukawa , Mark Hakey , Steven Holmes , David Horak , Charles Koburger
IPC分类号： H01L21/3205
CPC分类号： H01L21/76885 , H01L21/76816 , H01L21/7682 , H01L21/76837 , H01L21/76852 , H01L21/76862 , H01L21/76871 , H01L21/76874 , H01L23/5283 , H01L23/53209 , H01L2221/1089 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： Conductive sidewall spacer structures are formed using a method that patterns structures (mandrels) and activates the sidewalls of the structures. Metal ions are attached to the sidewalls of the structures and these metal ions are reduced to form seed material. The structures are then trimmed and the seed material is plated to form wiring on the sidewalls of the structures.
摘要翻译：使用图案结构（心轴）并激活结构的侧壁的方法形成导电侧壁间隔结构。金属离子附着在结构的侧壁上，这些金属离子被还原成晶种。然后对结构进行修整，并且种子材料被电镀以在结构的侧壁上形成布线。

40. 发明申请

US20070123028A1 METHODS OF FORMING LOW-K DIELECTRIC LAYERS CONTAINING CARBON NANOSTRUCTURES 有权
标题翻译：形成含有碳纳米结构的低K电介质层的方法
公开(公告)号：US20070123028A1
公开(公告)日：2007-05-31
申请号：US11670778
申请日：2007-02-02
申请人： Toshiharu Furukawa , Mark Hakey , Steven Holmes , David Horak , Charles Koburger
发明人： Toshiharu Furukawa , Mark Hakey , Steven Holmes , David Horak , Charles Koburger
IPC分类号： H01L21/4763
CPC分类号： H01L21/02115 , B82Y10/00 , H01L21/02282 , H01L21/3146 , H01L21/3185 , H01L21/76814 , H01L21/7682 , H01L21/76826 , H01L21/76831 , H01L21/76888 , H01L2221/1047
摘要： Methods of forming low-k dielectric layers for use in the manufacture of semiconductor devices and fabricating semiconductor structures using the low-k dielectric material. The low-k dielectric material comprises carbon nanostructures, like carbon nanotubes or carbon buckyballs, that are characterized by an insulating electronic state. The carbon nanostructures may be converted to the insulating electronic state either before or after a layer containing the carbon nanostructures is formed on a substrate. One approach for converting the carbon nanostructures to the insulating electronic state is fluorination.
摘要翻译：形成用于制造半导体器件的低k电介质层并使用低k电介质材料制造半导体结构的方法。低k介电材料包括碳纳米结构，如碳纳米管或碳棒球，其特征在于绝缘电子状态。碳纳米结构可以在包含碳纳米结构的层在基底上形成之前或之后转变为绝缘电子状态。将碳纳米结构转化为绝缘电子态的一种方法是氟化。

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