专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

31. 发明授权

US08086108B2 Optical transmission/reception device and optical communication system using the same 有权
标题翻译：光传输/接收设备和使用其的光通信系统
公开(公告)号：US08086108B2
公开(公告)日：2011-12-27
申请号：US12180094
申请日：2008-07-25
申请人： Tatsuya Tanigawa , Tetsuzo Ueda , Daisuke Ueda
发明人： Tatsuya Tanigawa , Tetsuzo Ueda , Daisuke Ueda
IPC分类号： H04B10/00
CPC分类号： H04J14/06 , H01L27/15 , H04J14/02
摘要： An optical transmission/reception device includes at least one light emitting portion and at least one light receiving portion on the same substrate. The light emitting portion includes at least a lower multilayer reflector and an active layer provided on the lower multilayer reflector. A metal layer including a plurality of opening portions is provided in an upper portion of the light emitting portion. Each of the opening portions has a size smaller than a light emission wavelength of the light emitting portion.
摘要翻译：光发送/接收装置包括至少一个发光部分和在同一基板上的至少一个光接收部分。发光部分至少包括下多层反射器和设置在下多层反射器上的有源层。在发光部的上部设置有包含多个开口部的金属层。每个开口部分的尺寸都小于发光部分的发光波长。

32. 发明授权

US08013320B2 Nitride semiconductor device and method for fabricating the same 有权
标题翻译：氮化物半导体器件及其制造方法
公开(公告)号：US08013320B2
公开(公告)日：2011-09-06
申请号：US11712482
申请日：2007-03-01
申请人： Hisayoshi Matsuo , Tatsuo Morita , Tetsuzo Ueda , Daisuke Ueda
发明人： Hisayoshi Matsuo , Tatsuo Morita , Tetsuzo Ueda , Daisuke Ueda
IPC分类号： H01L31/00
CPC分类号： H01L29/045 , H01L29/1029 , H01L29/2003 , H01L29/7787 , H01L33/007 , H01L33/0079 , H01L33/04 , H01L33/12
摘要： A nitride semiconductor device includes a semiconductor stacked structure which is formed of a nitride semiconductor having a first principal surface and a second principal surface opposed to the first principal surface and which includes an active layer. The first principal surface of the semiconductor stacked structure is formed with a plurality of indentations whose plane orientations are the {0001} plane, and the plane orientation of the second principal surface is the {1-101} plane. The active layer is formed along the {1-101} plane.
摘要翻译：氮化物半导体器件包括半导体层叠结构，其由具有第一主表面和与第一主表面相对并包括有源层的第二主表面的氮化物半导体形成。半导体堆叠结构的第一主表面形成有多个平面取向为{0001}面并且第二主面的平面取向为{1-101}面的凹陷。有源层沿{1-101}面形成。

33. 发明申请

US20110012173A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110012173A1
公开(公告)日：2011-01-20
申请号：US12867427
申请日：2009-01-23
申请人： Hidekazu Umeda , Masahiro Hikita , Tetsuzo Ueda , Tsuyoshi Tanaka , Daisuke Ueda
发明人： Hidekazu Umeda , Masahiro Hikita , Tetsuzo Ueda , Tsuyoshi Tanaka , Daisuke Ueda
IPC分类号： H01L29/12
CPC分类号： H01L29/7786 , H01L29/2003 , H01L29/41766 , H01L29/4236 , H01L29/432 , H01L29/66462
摘要： A semiconductor device includes an undoped GaN layer (103) formed on a substrate (101), an undoped AlGaN layer (104) formed on the undoped GaN layer (103) and having a band gap energy larger than that of the undoped GaN layer (103), a p-type AlGaN layer (105) and a high-concentration p-type GaN layer (106) formed on the undoped AlGaN layer (104), and an n-type AlGaN layer (107) formed on the high-concentration p-type GaN layer (106). A gate electrode (112) which makes ohmic contact with the high-concentration p-type GaN layer (106) is formed on the high-concentration p-type GaN layer (106) in a region thereof exposed through an opening (107a) formed in the n-type AlGaN layer (107).
摘要翻译：半导体器件包括形成在衬底（101）上的未掺杂的GaN层（103），形成在未掺杂的GaN层（103）上并且具有比未掺杂的GaN层的带隙能量大的带隙能量的未掺杂的AlGaN层（104） 103），形成在未掺杂的AlGaN层（104）上的p型AlGaN层（105）和高浓度p型GaN层（106）以及形成在高掺杂AlGaN层上的n型AlGaN层（107）浓度p型GaN层（106）。在高浓度p型GaN层（106）上形成与高浓度p型GaN层（106）欧姆接触的栅电极（112），其形成在通过形成的开口（107a）的部分露出的区域在n型AlGaN层（107）中。

34. 发明授权

US07664151B2 Nitride semiconductor laser diode 有权
标题翻译：氮化物半导体激光二极管
公开(公告)号：US07664151B2
公开(公告)日：2010-02-16
申请号：US11979877
申请日：2007-11-09
申请人： Tetsuzo Ueda , Daisuke Ueda
发明人： Tetsuzo Ueda , Daisuke Ueda
IPC分类号： H01S5/00
CPC分类号： H01S5/32341 , H01S5/021 , H01S5/2201
摘要： A nitride semiconductor laser diode includes: a substrate made of silicon in which a plane orientation of a principal surface is a {100} plane; and a semiconductor that includes a plurality of semiconductor layers formed on the substrate and including an active layer, each of the plurality of semiconductor layers being made of group III nitride. The semiconductor has a plane parallel to a {011} plane which is a plane orientation of silicon as a cleaved facet, the cleaved facet forming a facet mirror.
摘要翻译：氮化物半导体激光二极管包括：由主表面的平面取向为{100}面的由硅制成的衬底; 以及半导体，其包括形成在所述基板上并包括有源层的多个半导体层，所述多个半导体层中的每一个由III族氮化物制成。半导体具有平行于{011}平面的平面，该平面是作为切割面的硅的平面取向，切割面形成小平面镜。

35. 发明授权

US07528423B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07528423B2
公开(公告)日：2009-05-05
申请号：US11681408
申请日：2007-03-02
申请人： Hiroaki Ueno , Tetsuzo Ueda , Yasuhiro Uemoto , Daisuke Ueda , Tsuyoshi Tanaka , Manabu Yanagihara , Yutaka Hirose , Masahiro Hikita
发明人： Hiroaki Ueno , Tetsuzo Ueda , Yasuhiro Uemoto , Daisuke Ueda , Tsuyoshi Tanaka , Manabu Yanagihara , Yutaka Hirose , Masahiro Hikita
IPC分类号： H01L31/072 , H01L31/109
CPC分类号： H01L29/7786 , H01L29/2003
摘要： It is an object of the present invention to provide a semiconductor device, which can simultaneously achieve a normally-off mode of HFET and an improvement in Imax, and further achieve an improvement in gm and a reduction in gate leakage current. In order to keep a thin barrier layer 13 on an operation layer 12 of a substrate 11 directly under a gate electrode for mostly contributing to achieve the normally-off mode and also implement the high Imax, it is configured in such a way that a thickness of the barrier layer 13 can be increased by the semiconductor layer 17 between gate and source regions and between gate and drain regions. It is therefore possible to achieve the normally-off mode and an improvement in Imax as compared with an FET in which a thickness of the barrier layer is designed so as to be uniform. An insulating film 18 with a dielectric constant higher than that of the barrier layer is further inserted between a gate electrode 16 and the barrier layers 13, so that an improvement in gm and a reduction in gate leakage current can be achieved.
摘要翻译：本发明的一个目的是提供一种可以同时实现HFET的常闭模式和改进Imax的半导体器件，并进一步实现gm的改善和栅极漏电流的减小。为了在栅电极正下方的基板11的操作层12上保持薄的阻挡层13，主要用于实现常关模式并且还实现了高的Imax，它被配置成使得厚度可以通过栅极和源极区域之间以及栅极和漏极区域之间的半导体层17来增加阻挡层13。因此，与设置阻挡层的厚度均匀的FET相比，可以实现常闭模式和Imax的改善。介电常数高于阻挡层的绝缘膜18进一步插入在栅电极16和阻挡层13之间，从而可以实现gm的改善和栅极漏电流的减小。

36. 发明申请

US20090028563A1 OPTICAL TRANSMISSION/RECEPTION DEVICE AND OPTICAL COMMUNICATION SYSTEM USING THE SAME 有权
标题翻译：光传输/接收设备和使用该传输/接收设备的光通信系统
公开(公告)号：US20090028563A1
公开(公告)日：2009-01-29
申请号：US12180094
申请日：2008-07-25
申请人： Tatsuya TANIGAWA , Tetsuzo Ueda , Daisuke Ueda
发明人： Tatsuya TANIGAWA , Tetsuzo Ueda , Daisuke Ueda
IPC分类号： H04J14/06 , H01L33/00 , H01L31/12
CPC分类号： H04J14/06 , H01L27/15 , H04J14/02
摘要： An optical transmission/reception device includes at least one light emitting portion and at least one light receiving portion on the same substrate. The light emitting portion includes at least a lower multilayer reflector and an active layer provided on the lower multilayer reflector. A metal layer including a plurality of opening portions is provided in an upper portion of the light emitting portion. Each of the opening portions has a size smaller than a light emission wavelength of the light emitting portion.
摘要翻译：光发送/接收装置包括至少一个发光部分和在同一基板上的至少一个光接收部分。发光部分至少包括下多层反射器和设置在下多层反射器上的有源层。在发光部的上部设置有包含多个开口部的金属层。每个开口部分的尺寸都小于发光部分的发光波长。

37. 发明授权

US07459377B2 Method for dividing substrate 失效
标题翻译：基板分割方法
公开(公告)号：US07459377B2
公开(公告)日：2008-12-02
申请号：US11146020
申请日：2005-06-07
申请人： Tetsuzo Ueda , Daisuke Ueda
发明人： Tetsuzo Ueda , Daisuke Ueda
IPC分类号： H01L21/44
CPC分类号： H01L21/3043 , B82Y20/00 , H01L21/78 , H01L33/0095 , H01S5/0201 , H01S5/0213 , H01S5/34333
摘要： The present invention aims at providing a method for dividing a substrate that is capable of dividing each substrate into chips in the same square-like form without causing chip breaking and capable of forming all cleaved facets flat. In the method for dividing a substrate of the present invention, an electron beam 1 with the intensity that causes a dislocation inside the substrate is irradiated to a substrate surface 2 to generate a crack starting from such dislocation, and a cleaved facet 5 is formed to divide the substrate.
摘要翻译：本发明的目的在于提供一种分割基板的方法，该方法能够将每个基板分成相同方形的芯片，而不会造成断屑并且能够形成所有的切割面平面。在本发明的基板分割方法中，将具有导致基板内的位错的强度的电子束1照射到基板表面2，以从该位错开始产生裂纹，并且形成切割面5 划分基板。

38. 发明申请

US20080179605A1 NITRIDE SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译：氮化物半导体发光器件及其制造方法
公开(公告)号：US20080179605A1
公开(公告)日：2008-07-31
申请号：US11937234
申请日：2007-11-08
申请人： Yuji TAKASE , Tetsuzo Ueda , Tsuyoshi Tanaka , Daisuke Ueda
发明人： Yuji TAKASE , Tetsuzo Ueda , Tsuyoshi Tanaka , Daisuke Ueda
IPC分类号： H01L33/00
CPC分类号： H01L33/32 , H01L33/007 , H01L33/0079 , H01L33/105 , H01L33/145 , H01L33/465
摘要： A nitride semiconductor light emitting device includes: a dielectric layered film over a substrate, the dielectric layered film being formed by stacking a plurality of dielectric films having different compositions; a semiconductor thin film formed of a single crystal over the dielectric layered film; and a pn junction diode structure over the semiconductor thin film, the pn junction diode structure being formed of a nitride semiconductor.
摘要翻译：氮化物半导体发光器件包括：在衬底上的电介质层压膜，所述电介质层叠膜通过堆叠多个具有不同组成的电介质膜形成; 由介电层叠膜上的单晶形成的半导体薄膜; 以及在半导体薄膜上的pn结二极管结构，pn结二极管结构由氮化物半导体形成。

39. 发明申请

US20070210332A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20070210332A1
公开(公告)日：2007-09-13
申请号：US11681408
申请日：2007-03-02
申请人： Hiroaki UENO , Tetsuzo Ueda , Yasuhiro Uemoto , Daisuke Ueda , Tsuyoshi Tanaka , Manabu Yanagihara , Yutaka Hirose , Masahiro Hikita
发明人： Hiroaki UENO , Tetsuzo Ueda , Yasuhiro Uemoto , Daisuke Ueda , Tsuyoshi Tanaka , Manabu Yanagihara , Yutaka Hirose , Masahiro Hikita
IPC分类号： H01L31/00
CPC分类号： H01L29/7786 , H01L29/2003
摘要： It is an object of the present invention to provide a semiconductor device, which can simultaneously achieve a normally-off mode of HFET and an improvement in Imax, and further achieve an improvement in gm and a reduction in gate leakage current. In order to keep a thin barrier layer 13 on an operation layer 12 of a substrate 11 directly under a gate electrode for mostly contributing to achieve the normally-off mode and also implement the high Imax, it is configured in such a way that a thickness of the barrier layer 13 can be increased by the semiconductor layer 17 between gate and source regions and between gate and drain regions. It is therefore possible to achieve the normally-off mode and an improvement in Imax as compared with an FET in which a thickness of the barrier layer is designed so as to be uniform. An insulating film 18 with a dielectric constant higher than that of the barrier layer is further inserted between a gate electrode 16 and the barrier layers 13, so that an improvement in gm and a reduction in gate leakage current can be achieved.
摘要翻译：本发明的一个目的是提供一种半导体器件，其可以同时实现HFET的常闭模式和改进的最大值，并进一步实现gm的改善和栅极漏电流的减小。为了在栅电极正下方的基板11的操作层12上保持薄势垒层13，主要用于实现常关模式并且还实现高I max，配置成使得栅极和源极区域之间以及栅极和漏极区域之间的半导体层17可以增加阻挡层13的厚度。因此与阻挡层的厚度被设计为均匀的FET相比，可以实现常关模式和I 的改善。介电常数高于阻挡层的绝缘膜18进一步插入在栅电极16和阻挡层13之间，从而改善gm和栅极漏电流的减小可以实现。

40. 发明申请

US20060157729A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20060157729A1
公开(公告)日：2006-07-20
申请号：US11325340
申请日：2006-01-05
申请人： Hiroaki Ueno , Tetsuzo Ueda , Yasuhiro Uemoto , Daisuke Ueda , Tsuyoshi Tanaka , Manabu Yanagihara , Yutaka Hirose , Masahiro Hikita
发明人： Hiroaki Ueno , Tetsuzo Ueda , Yasuhiro Uemoto , Daisuke Ueda , Tsuyoshi Tanaka , Manabu Yanagihara , Yutaka Hirose , Masahiro Hikita
IPC分类号： H01L33/00
CPC分类号： H01L29/7786 , H01L29/2003
摘要： It is an object of the present invention to provide a semiconductor device, which can simultaneously achieve a normally-off mode of HFET and an improvement in Imax, and further achieve an improvement in gm and a reduction in gate leakage current. In order to keep a thin barrier layer 13 on an operation layer 12 of a substrate 11 directly under a gate electrode for mostly contributing to achieve the normally-off mode and also implement the high Imax, it is configured in such a way that a thickness of the barrier layer 13 can be increased by the semiconductor layer 17 between gate and source regions and between gate and drain regions. It is therefore possible to achieve the normally-off mode and an improvement in Imax as compared with an FET in which a thickness of the barrier layer is designed so as to be uniform. An insulating film 18 with a dielectric constant higher than that of the barrier layer is further inserted between a gate electrode 16 and the barrier layers 13, so that an improvement in gm and a reduction in gate leakage current can be achieved.
摘要翻译：本发明的一个目的是提供一种半导体器件，其可以同时实现HFET的常闭模式和改进的最大值，并进一步实现gm的改善和栅极漏电流的减小。为了在栅电极正下方的基板11的操作层12上保持薄势垒层13，主要用于实现常关模式并且还实现高I max，配置成使得栅极和源极区域之间以及栅极和漏极区域之间的半导体层17可以增加阻挡层13的厚度。因此与阻挡层的厚度被设计为均匀的FET相比，可以实现常关模式和I 的改善。介电常数高于阻挡层的绝缘膜18进一步插入在栅电极16和阻挡层13之间，从而改善gm和栅泄漏电流的降低可以实现。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式