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    • 32. 发明申请
    • RADIO LSI DEVICE AND INTERFERING WAVE DETECTING CIRCUIT
    • 无线LSI设备和干扰波检测电路
    • US20100123835A1
    • 2010-05-20
    • US12619705
    • 2009-11-17
    • Takeshi Ichikawa
    • Takeshi Ichikawa
    • H04N5/44H04B15/00H04B1/38
    • H04N5/4403H04B1/1027H04B1/202H04N21/42207H04N21/42221H04N2005/4407H04N2005/4426
    • A radio LSI device includes an interfering wave detecting circuit that receives an RSSI signal for a current transmit/receive channel. The interfering wave detecting circuit includes a field intensity determiner that determines whether or not the value of the RSSI signal is greater than a predetermined threshold value. The interfering wave detecting circuit also includes a duration counter that counts the duration of an interfering wave whose RSSI value is greater than the predetermined threshold value. The interfering wave detecting circuit also includes a duration comparator that, if the duration exceeds a duration comparative value, generates an interrupt signal. The radio LSI device changes the setting of the current transmit/receive channel in response to the interrupt signal.
    • 无线电LSI装置包括干扰波检测电路,其接收当前发送/接收信道的RSSI信号。 干扰波检测电路包括确定RSSI信号的值是否大于预定阈值的场强确定器。 干扰波检测电路还包括对RSSI值大于预定阈值的干扰波的持续时间进行计数的持续时间计数器。 干扰波检测电路还包括持续时间比较器,如果持续时间超过持续时间比较值,则产生中断信号。 无线电LSI装置响应于中断信号改变当前发送/接收信道的设置。
    • 33. 发明授权
    • Semiconductor apparatus, solid state image pickup device using the same, and method of manufacturing them
    • 半导体装置,使用该半导体装置的固体摄像装置及其制造方法
    • US07687299B2
    • 2010-03-30
    • US10585733
    • 2005-03-24
    • Takeshi Ichikawa
    • Takeshi Ichikawa
    • H01L21/00
    • H01L27/14609H01L27/14806
    • The invention provides a semiconductor apparatus provided with at least one set of buried channel type first conductive type MOS transistor and surface channel type first conductive type MOS transistor on the same substrate, in which a first conductive type impurity region is provided below a gate electrode of the buried channel type and surface channel type MOS transistors and between source drain regions. Further, the invention provides a solid state image pickup device having a photoelectric conversion portion and a pixel including a plurality of transistors formed in correspondence to the photoelectric conversion portion, in a substrate, wherein the plurality of transistors includes a buried channel type first conductive type MOS transistor and a surface channel type first conductive type MOS transistor, and a first conductive type impurity region is provided below a gate electrode of the buried channel type and surface channel type MOS transistors and between source drain regions.
    • 本发明提供了一种半导体装置,该半导体装置在同一基板上设置有至少一组掩埋沟道型第一导电型MOS晶体管和表面沟道型第一导电型MOS晶体管,其中,第一导电型杂质区设置在 掩埋沟道型和表面沟道型MOS晶体管和源极漏极区之间。 此外,本发明提供了一种固体摄像装置,其具有光电转换部分和在基板中包括与光电转换部分相对应地形成的多个晶体管的像素,其中多个晶体管包括掩埋沟道型第一导电型 MOS晶体管和表面沟道型第一导电型MOS晶体管,并且第一导电型杂质区设置在掩埋沟道型和表面沟道型MOS晶体管的栅电极的下方以及源极漏极区之间。
    • 34. 发明授权
    • Reflection type liquid crystal display apparatus and liquid crystal projector system
    • 反射式液晶显示装置和液晶投影系统
    • US07671365B2
    • 2010-03-02
    • US11736139
    • 2007-04-17
    • Takeshi Ichikawa
    • Takeshi Ichikawa
    • H01L27/14H01L31/00G02F1/133
    • G02F1/136277G02F1/136209G02F2203/02
    • In order to suppress the effect due to electrons (holes) generated by incident light that cannot be prevented from entering only by means of light shielding, rather than the drain region 34 of a transistor, with respect to a majority carrier, a region 36 whose voltage is set to a value lower than the reference value of product of the voltage of a drain region and Q (unit electric charge) is provided, or a potential barrier is provided around the drain region. In such a configuration, by controlling the voltage of the periphery of the drain region 34 connected to a reflection electrode 30 to be in a floating state, photo carriers generated in the semiconductor substrate are caused to be hardly guided in the drain region 34.
    • 为了抑制由于不能通过遮光而不能防止入射光产生的电子(空穴)而不是晶体管的漏极区域34相对于多数载流子的区域36,区域36 电压被设定为低于漏极区域的电压和Q(单位电荷)的乘积的参考值的值,或者在漏极区域周围设置势垒。 在这种结构中,通过将连接到反射电极30的漏区34的周边的电压控制为浮置状态,使得在半导体衬底中产生的载流子在漏区34中几乎不被引导。
    • 35. 发明申请
    • REFLECTION TYPE LIQUID CRYSTAL DISPLAY APPARATUS AND LIQUID CRYSTAL PROJECTOR SYSTEM
    • 反射型液晶显示器和液晶投影仪系统
    • US20090303425A1
    • 2009-12-10
    • US12540486
    • 2009-08-13
    • Takeshi Ichikawa
    • Takeshi Ichikawa
    • G02F1/1343
    • G02F1/136277G02F1/136209G02F2203/02
    • In order to suppress the effect due to electrons (holes) generated by incident light that cannot be prevented from entering only by means of light shielding, rather than the drain region 34 of a transistor, with respect to a majority carrier, a region 36 whose voltage is set to a value lower than the reference value of product of the voltage of a drain region and Q (unit electric charge) is provided, or a potential barrier is provided around the drain region. In such a configuration, by controlling the voltage of the periphery of the drain region 34 connected to a reflection electrode 30 to be in a floating state, photo carriers generated in the semiconductor substrate are caused to be hardly guided in the drain region 34.
    • 为了抑制由于不能通过遮光而不能防止入射光产生的电子(空穴)而不是晶体管的漏极区域34相对于多数载流子的区域36,区域36 电压被设定为低于漏极区域的电压和Q(单位电荷)的乘积的参考值的值,或者在漏极区域周围设置势垒。 在这种结构中,通过将连接到反射电极30的漏区34的周边的电压控制为浮置状态,使得在半导体衬底中产生的载流子在漏区34中几乎不被引导。
    • 37. 发明授权
    • Reset circuit having synchronous and/or asynchronous modules
    • 具有同步和/或异步模块的复位电路
    • US07026849B2
    • 2006-04-11
    • US10812923
    • 2004-03-31
    • Takeshi Ichikawa
    • Takeshi Ichikawa
    • H03L7/00
    • G06F1/24
    • There is provided a reset circuit for reducing current consumption during resetting. A reset circuit 20 is constituted in such a manner that a pulse generation circuit 22 for generating a reset pulse signal (PRSTN) 50 from a reset signal input to an input terminal (RSTN) is connected to a plurality modules 10, 12, 14, a register 40 arranged in the module 10 is initialized based on the reset pulse signal (PRSTN) 50, a register 42 arranged in the module 12 of a next stage is initialized based on a module reset signal (MRSTN) 60 output from a control circuit 30 arranged in the module 10 of a previous stage, and a register 44 arranged in each of modules of stages thereafter, e.g., the module 14, is initialized based on a module reset signal (MRSTN) output from a control circuit 32 arranged in the module 12 of a previous stage.
    • 提供了一种用于在复位期间减少电流消耗的复位电路。 复位电路20被构成为用于从输入到输入端子(RSTN)的复位信号产生复位脉冲信号(PRSTN)50的脉冲发生电路22连接到多个模块10,12,14, 基于复位脉冲信号(PRSTN)50初始化配置在模块10中的寄存器40,基于从控制电路输出的模块复位信号(MRSTN)60来初始化布置在下一级的模块12中的寄存器42 30,布置在前一级的模块10中的寄存器44以及其后的模块(例如模块14)中的每个模块中的寄存器44基于从布置在模块14中的控制电路32输出的模块复位信号(MRSTN)被初始化 前一阶段的模块12。
    • 38. 发明申请
    • Synchronization establishment circuit and synchronization establishment method
    • 同步建立电路和同步建立方法
    • US20050220234A1
    • 2005-10-06
    • US10944896
    • 2004-09-21
    • Takeshi Ichikawa
    • Takeshi Ichikawa
    • H04L7/00H04B7/26H04J3/06
    • H04J3/0685H04J3/0602
    • A terminal is wirelessly connected to a base station. The terminal has a timer and a controller. The timer has a register for storing a beacon interval as a comparison value. The timer also includes a beacon counter for counting timer clocks. The timer also includes a comparator for generating an interrupt signal when an output value of the register and a count value of the counter match. The controller causes the counter to start counting when it receives a beacon for the first time. The controller causes the register to store the count value of the beacon counter when it receives a beacon next time. Since the beacon interval is measured using the timer clock in the terminal, instead of using the beacon interval information included in the beacon, it is unnecessary to strictly match the clock precision of the base station and the terminal, and therefore the cost of the system decreases.
    • 终端与基站无线连接。 终端有定时器和控制器。 定时器具有用于存储信标间隔作为比较值的寄存器。 定时器还包括用于计数定时器时钟的信标计数器。 定时器还包括一个比较器,用于当寄存器的输出值和计数器的计数值相匹配时产生一个中断信号。 当控制器首次收到信标时,计数器开始计数。 当下一次收到信标时,控制器使寄存器存储信标计数器的计数值。 由于使用终端中的定时器时钟来测量信标间隔,而不是使用信标中包含的信标间隔信息,所以不必严格地匹配基站和终端的时钟精度,因此不需要系统的成本 减少