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    • 31. 发明授权
    • Distortion compensating apparatus
    • 失真补偿装置
    • US07012969B2
    • 2006-03-14
    • US09737196
    • 2000-12-14
    • Takayoshi OdeYasuyuki OishiTokuro KuboKazuo NagataniHajime HamadaHiroyoshi Ishikawa
    • Takayoshi OdeYasuyuki OishiTokuro KuboKazuo NagataniHajime HamadaHiroyoshi Ishikawa
    • H04L25/03
    • H03F1/3247H03F2201/3233
    • Disclosed is a distortion compensating apparatus for correcting the size of a distortion compensation coefficient in such a manner that a transmit signal that has undergone distortion compensation will not exceed the dynamic range of a DA converter. Specifically, before a distortion compensation coefficient hn+1(p) that has been calculated by a calculation unit is stored in a coefficient memory, an assumption is made that distortion compensation will be performed using the distortion compensation coefficient hn+1(p). Then it is determined beforehand whether a signal x(t)*hn+1(p) that will be obtained by this distortion compensation will exceed the limit of a DA converter. If the limit will be exceeded, the size of the distortion compensation coefficient is reduced by a correction unit, the corrected distortion compensation coefficient is stored in the memory and the transmit signal is corrected using the stored distortion compensation coefficient.
    • 公开了一种失真补偿装置,用于以经过失真补偿的发送信号不会超过DA转换器的动态范围的方式校正失真补偿系数的大小。 具体地说,在由计算单元计算出的失真补偿系数h N + 1(p)被存储在系数存储器中之前,假定将使用失真补偿执行失真补偿 系数h n + 1(p)。 然后,预先确定将通过该失真补偿获得的信号x(t)* h N + 1(p)将超过DA转换器的极限。 如果超过极限,则通过校正单元来减小失真补偿系数的大小,将校正的失真补偿系数存储在存储器中,并使用所存储的失真补偿系数校正发送信号。
    • 32. 发明授权
    • Distortion compensating apparatus
    • 失真补偿装置
    • US06836517B2
    • 2004-12-28
    • US09745948
    • 2000-12-22
    • Kazuo NagataniTokuro KuboTakayoshi OdeYasuyuki Oishi
    • Kazuo NagataniTokuro KuboTakayoshi OdeYasuyuki Oishi
    • H04K102
    • H04L27/368H03F1/3247H03F1/3288
    • A distortion compensating apparatus for compensating for a distortion of a transmission power amplifier. A delay time decision unit calculates the correlation between a transmission signal and a feedback signal fed back from the output side of the transmission power amplifier while varying phase difference between both signals, and decides the total delay time caused in the transmission power amplifier and a feedback loop on the basis of the phase difference in which the correlation is the maximum. A delay unit delays the transmission signal before a distortion compensation processing by the total delay time, and inputs the delayed signal into a distortion compensating apparatus arithmetic unit, which calculates and stores a distortion compensation coefficient on the basis of the transmission signal and the feedback signal fed back from the output side of the transmission power amplifier. A pre-distortion unit applies a distortion compensation processing to the transmission signal by using the distortion compensation coefficient.
    • 一种用于补偿发射功率放大器的失真的失真补偿装置。 延迟时间决定单元计算发送信号与从发送功率放大器的输出侧反馈的反馈信号之间的相关性,同时改变两个信号之间的相位差,并且确定在发送功率放大器中引起的总延迟时间和反馈 基于相关性最大的相位差进行循环。 延迟单元将失真补偿处理之前的发送信号延迟总延迟时间,并将延迟信号输入失真补偿装置运算单元,该运算单元基于发送信号和反馈信号计算并存储失真补偿系数 从发射功率放大器的输出侧反馈。 预失真单元通过使用失真补偿系数对发送信号应用失真补偿处理。
    • 33. 发明授权
    • Correlator and delay lock loop circuit
    • 相关器和延迟锁环电路
    • US06650689B1
    • 2003-11-18
    • US09318446
    • 1999-05-25
    • Yasuyuki OishiKazuo NagataniHajime HamadaYoshihiko Asano
    • Yasuyuki OishiKazuo NagataniHajime HamadaYoshihiko Asano
    • H04B1500
    • H04B1/7075H04B1/7085H04B1/709H04B1/7095H04B2201/70707
    • The present invention reduces the scale of circuitry and shortens the code phase detection time needed to achieve initial synchronization. In a correlator for calculating correlation between a received spreading code contained in a received spread-spectrum signal and a reference spreading code, a combined code generator is included. The combined code generator outputs a combined spreading code by weighting and combining a plurality of phase-shifted reference spreading codes A1-AM. Further, an arithmetic circuit calculates correlation between the received spreading code and the plurality of phase-shifted reference spreading codes simultaneously. A phase detection circuit detects the phase difference between the received spreading code and a reference spreading code, namely the phase of the received spreading code from the results of the arithmetic operation.
    • 本发明减小了电路规模,缩短了实现初始同步所需的码相位检测时间。 在用于计算包含在接收扩展频谱信号中的接收扩展码与参考扩展码之间的相关性的相关器中,包括组合码发生器。 组合码发生器通过加权和组合多个相移参考扩展码A1-AM来输出组合扩展码。 此外,算术电路同时计算接收的扩展码与多个相移参考扩展码之间的相关性。 相位检测电路从算术运算结果检测接收到的扩展码与参考扩展码之间的相位差,即接收到的扩展码的相位。
    • 38. 发明授权
    • Spread spectrum communication system
    • 扩频通信系统
    • US6041034A
    • 2000-03-21
    • US940479
    • 1997-09-30
    • Hidenobu FukumasaYasuyuki OishiKazuo NagataniHajime Hamada
    • Hidenobu FukumasaYasuyuki OishiKazuo NagataniHajime Hamada
    • H04B1/69H04B7/26H04J11/00H04J13/12H04W88/00H04B7/216H04B7/212H04B1/38
    • H04J13/102H04J13/0025
    • Co-channel interference may be prevented even if data having different transmission rates are concurrently multiplied to a same frequency band width with a different spreading factors. A method for generating code division multiple access data from data having different rates by a direct spread spectrum includes the steps of combining an orthogonal code and a reversed orthogonal code obtained by inverting the orthogonal code, for each of orthogonal code sequence structured by an m-sequence thereby to generate a first sequence of orthogonal codes, combing two of the orthogonal code for each of orthogonal code sequences structured by the m-sequence thereby to generate a second sequence of orthogonal codes, combining two of the reversed orthogonal code for each of orthogonal code sequences structured by the m-sequence thereby to generate a third sequence of orthogonal codes, and generating another orthogonal code having twice a code length of the orthogonal code from the first, second and third sequence of orthogonal codes; and multiplying the generated orthogonal code and a different m-sequence, together.
    • 即使具有不同传播速率的数据被同时乘以具有不同扩频因子的相同频带宽度,也可以防止同信道干扰。 一种用于通过直接扩展频谱从具有不同速率的数据产生码分多址数据的方法,包括以下步骤:对由正交码构成的正交码序列中的每一个组合正交码和反相正交码, 从而产生正交码的第一序列,对由m序列构成的每个正交码序列组合正交码中的两个,从而产生正交码的第二序列,将正交码中的每一个合成两个正交码 由m序列构成的码序列,从而产生正交码的第三序列,并且从正交码的第一,第二和第三序列生成具有正交码的码长的两倍的另一个正交码; 并将所生成的正交码与不同的m序列相乘。
    • 40. 发明授权
    • Spread-signal multiplexing circuit
    • 扩频信号复用电路
    • US07519097B2
    • 2009-04-14
    • US10279394
    • 2002-10-24
    • Yasuyuki OishiTokuro KuboKazuo Nagatani
    • Yasuyuki OishiTokuro KuboKazuo Nagatani
    • H04B7/216
    • H04L5/06
    • The invention relates to a spread-signal multiplexing circuit for frequency-multiplexing a plurality of spread signals that were generated in parallel according to the SSMA scheme. An object of the invention is to adapt to various degrees of multiplicity and to keep the SN ratio and the power efficiency high. To this end, a spread-signal multiplexing circuit of the invention comprises an amplitude monitoring part for multiplexing a plurality of spread signals and determining amplitude of a resulting signal in time-series order; a delaying part for delaying the spread signals in parallel by a time that is equal to a propagation delay time of the amplitude monitoring part; and a multiplexing part for generating a multiplexed signal by multiplexing the delayed spread signals while weighting the delayed spread signals in parallel using weights that are smaller as an average value of the determined amplitude is larger.
    • 本发明涉及一种用于对根据SSMA方案并行生成的多个扩展信号进行频率复用的扩展信号复用电路。 本发明的一个目的是适应不同程度的多重性,并保持SN比和功率效率。 为此,本发明的扩展信号复用电路包括用于多路复用多个扩展信号并且以时间顺序确定所得信号的幅度的幅度监视部分; 延迟部分,用于将扩展信号并行延迟等于振幅监测部分的传播延迟时间的时间; 以及复用部分,用于通过多路复用延迟的扩展信号来产生多路复用信号,同时使用作为所确定的幅度的平均值较小的权重来并行加权延迟的扩展信号。