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31. 发明授权

US06943447B2 Thin film multi-layer wiring substrate having a coaxial wiring structure in at least one layer 有权
标题翻译：在至少一层中具有同轴布线结构的薄膜多层布线基板
公开(公告)号：US06943447B2
公开(公告)日：2005-09-13
申请号：US10338646
申请日：2003-01-09
申请人： Yoshikatsu Ishizuki , Nobuyuki Hayashi , Masataka Mizukoshi , Yasuo Yamagishi
发明人： Yoshikatsu Ishizuki , Nobuyuki Hayashi , Masataka Mizukoshi , Yasuo Yamagishi
IPC分类号： H05K1/02 , H05K3/46 , H01L21/31
CPC分类号： H05K1/0221 , H01L2223/6622 , H05K3/4647 , H05K3/467 , H05K2201/09809 , H05K2203/0733 , Y10T428/24917 , Y10T428/24926
摘要： A thin film multi-layer wiring substrate comprising a plurality of wiring layers, each adjacent pair of wiring layers being separated by an insulating layer, wherein at least one of the wiring layers includes wiring formed by an inner conductor member and a conductor layer surrounding the periphery thereof through an insulating material.
摘要翻译：一种薄膜多层布线基板，包括多个布线层，每个相邻的一对布线层被绝缘层隔开，其中至少一个布线层包括由内部导体构件形成的布线和围绕该布线层的导体层其周边通过绝缘材料。

32. 发明申请

US20070287282A1 Semiconductor device, wiring substrate forming method, and substrate processing apparatus 有权
标题翻译：半导体装置，布线基板的形成方法以及基板处理装置
公开(公告)号：US20070287282A1
公开(公告)日：2007-12-13
申请号：US11727004
申请日：2007-03-23
申请人： Kanae Nakagawa , Masataka Mizukoshi , Kazuo Teshirogi
发明人： Kanae Nakagawa , Masataka Mizukoshi , Kazuo Teshirogi
IPC分类号： H01L21/4763
CPC分类号： H01L21/4857 , H01L21/31058 , H01L21/32115 , H01L21/4846 , H01L21/6835 , H01L21/7684
摘要： A substrate support (201) having a flat supporting surface (201a) is prepared, and a semiconductor substrate (1) is fixed to the substrate supporting surface (201) by attaching a wiring forming surface (1a) to the supporting surface (201a) by suction, for example, by vacuum suction. On this occasion, the wiring forming surface (1a) is forcibly flattened by being attached to the supporting surface (201a) by suction, and therefore the wiring forming surface (1a) becomes a reference plane for planarization of a back surface (1b). In this state, planarization processing is performed by mechanically grinding the back surface (1b) to grind away projecting portions (12) of the back surface (1b). Hence, variations in the thickness of the substrate (especially, semiconductor substrate) are made uniform, and high-speed planarization is realized easily and inexpensively without disadvantages such as dishing and without any limitation on a wiring design.
摘要翻译：准备具有平坦支撑面（201a）的基板支撑体（201），通过将布线形成面（1a）安装在支撑面（13a）上而将半导体基板（1）固定在基板支撑面（201） 201a）通过抽吸，例如通过真空抽吸。在这种情况下，布线形成表面（1a）通过抽吸附接到支撑表面（201a）被强制地平坦化，因此布线形成表面（1a）成为用于平面化背面的参考平面（ 1 b）。在这种状态下，通过机械研磨后表面（1b）以研磨后表面（1b）的凸出部分（12）来进行平面化处理。因此，基板（特别是半导体基板）的厚度的变化是均匀的，并且容易且廉价地实现高速平坦化，而没有诸如凹陷的缺点，并且对布线设计没有任何限制。

33. 发明申请

US20070184646A1 Semiconductor device, wiring substrate forming method, and substrate processing apparatus 有权
公开(公告)号：US20070184646A1
公开(公告)日：2007-08-09
申请号：US11727003
申请日：2007-03-23
申请人： Kanae Nakagawa , Masataka Mizukoshi , Kazuo Teshirogi
发明人： Kanae Nakagawa , Masataka Mizukoshi , Kazuo Teshirogi
IPC分类号： H01L21/4763
CPC分类号： H01L21/4857 , H01L21/31058 , H01L21/32115 , H01L21/4846 , H01L21/6835 , H01L21/7684
摘要： A substrate support (201) having a flat supporting surface (201a) is prepared, and a semiconductor substrate (1) is fixed to the substrate supporting surface (201) by attaching a wiring forming surface (1a) to the supporting surface (201a) by suction, for example, by vacuum suction. On this occasion, the wiring forming surface (1a) is forcibly flattened by being attached to the supporting surface (201a) by suction, and therefore the wiring forming surface (1a) becomes a reference plane for planarization of a back surface (1b). In this state, planarization processing is performed by mechanically grinding the back surface (1b) to grind away projecting portions (12) of the back surface (1b). Hence, variations in the thickness of the substrate (especially, semiconductor substrate) are made uniform, and high-speed planarization is realized easily and inexpensively without disadvantages such as dishing and without any limitation on a wiring design.

34. 发明授权

US07704856B2 Semiconductor device, wiring substrate forming method, and substrate processing apparatus 有权
公开(公告)号：US07704856B2
公开(公告)日：2010-04-27
申请号：US11727003
申请日：2007-03-23
申请人： Kanae Nakagawa , Masataka Mizukoshi , Kazuo Teshirogi
发明人： Kanae Nakagawa , Masataka Mizukoshi , Kazuo Teshirogi
IPC分类号： H01L21/30
CPC分类号： H01L21/4857 , H01L21/31058 , H01L21/32115 , H01L21/4846 , H01L21/6835 , H01L21/7684
摘要： A substrate support (201) having a flat supporting surface (201a) is prepared, and a semiconductor substrate (1) is fixed to the substrate supporting surface (201) by attaching a wiring forming surface (1a) to the supporting surface (201a) by suction, for example, by vacuum suction. On this occasion, the wiring forming surface (1a) is forcibly flattened by being attached to the supporting surface (201a) by suction, and therefore the wiring forming surface (1a) becomes a reference plane for planarization of a back surface (1b). In this state, planarization processing is performed by mechanically grinding the back surface (1b) to grind away projecting portions (12) of the back surface (1b). Hence, variations in the thickness of the substrate (especially, semiconductor substrate) are made uniform, and high-speed planarization is realized easily and inexpensively without disadvantages such as dishing and without any limitation on a wiring design.

35. 发明授权

US07648907B2 Semiconductor device, wiring substrate forming method, and substrate processing apparatus 有权
标题翻译：半导体装置，布线基板的形成方法以及基板处理装置
公开(公告)号：US07648907B2
公开(公告)日：2010-01-19
申请号：US11727004
申请日：2007-03-23
申请人： Kanae Nakagawa , Masataka Mizukoshi , Kazuo Teshirogi
发明人： Kanae Nakagawa , Masataka Mizukoshi , Kazuo Teshirogi
IPC分类号： H01L23/48
CPC分类号： H01L21/4857 , H01L21/31058 , H01L21/32115 , H01L21/4846 , H01L21/6835 , H01L21/7684
摘要： A substrate support (201) having a flat supporting surface (201a) is prepared, and a semiconductor substrate (1) is fixed to the substrate supporting surface (201) by attaching a wiring forming surface (1a) to the supporting surface (201a) by suction, for example, by vacuum suction. On this occasion, the wiring forming surface (1a) is forcibly flattened by being attached to the supporting surface (201a) by suction, and therefore the wiring forming surface (1a) becomes a reference plane for planarization of a back surface (1b). In this state, planarization processing is performed by mechanically grinding the back surface (1b) to grind away projecting portions (12) of the back surface (1b). Hence, variations in the thickness of the substrate (especially, semiconductor substrate) are made uniform, and high-speed planarization is realized easily and inexpensively without disadvantages such as dishing and without any limitation on a wiring design.
摘要翻译：制备具有平坦支撑面（201a）的基板支撑体（201），通过将布线形成面（1a）安装在支撑面（201a）上而将半导体基板（1）固定在基板支撑面（201）通过抽吸，例如通过真空抽吸。在这种情况下，布线形成表面（1a）通过抽吸附接到支撑表面（201a）而被强制地平坦化，因此布线形成表面（1a）成为用于平面化背面（1b）的参考平面。在这种状态下，通过机械研磨后表面（1b）以去除后表面（1b）的突出部分（12）来进行平面化处理。因此，基板（特别是半导体基板）的厚度的变化是均匀的，并且容易且廉价地实现高速平坦化，而没有诸如凹陷的缺点，并且对布线设计没有任何限制。

36. 发明授权

US07485962B2 Semiconductor device, wiring substrate forming method, and substrate processing apparatus 有权
标题翻译：半导体装置，布线基板的形成方法以及基板处理装置
公开(公告)号：US07485962B2
公开(公告)日：2009-02-03
申请号：US11097937
申请日：2005-04-01
申请人： Kanae Nakagawa , Masataka Mizukoshi , Kazuo Teshirogi
发明人： Kanae Nakagawa , Masataka Mizukoshi , Kazuo Teshirogi
IPC分类号： H01L23/48
CPC分类号： H01L21/4857 , H01L21/31058 , H01L21/32115 , H01L21/4846 , H01L21/6835 , H01L21/7684
摘要： A substrate support (201) having a flat supporting surface (201a) is prepared, and a semiconductor substrate (1) is fixed to the substrate supporting surface (201) by attaching a wiring forming surface (1a) to the supporting surface (201a) by suction, for example, by vacuum suction. On this occasion, the wiring forming surface (1a) is forcibly flattened by being attached to the supporting surface (201a) by suction, and therefore the wiring forming surface (1a) becomes a reference plane for planarization of a back surface (1b). In this state, planarization processing is performed by mechanically grinding the back surface (1b) to grind away projecting portions (12) of the back surface (1b). Hence, variations in the thickness of the substrate (especially, semiconductor substrate) are made uniform, and high-speed planarization is realized easily and inexpensively without disadvantages such as dishing and without any limitation on a wiring design.
摘要翻译：制备具有平坦支撑面（201a）的基板支撑体（201），通过将布线形成面（1a）安装在支撑面（201a）上而将半导体基板（1）固定在基板支撑面（201）通过抽吸，例如通过真空抽吸。在这种情况下，布线形成表面（1a）通过抽吸附接到支撑表面（201a）而被强制地平坦化，因此布线形成表面（1a）成为用于平面化背面（1b）的参考平面。在这种状态下，通过机械研磨后表面（1b）以去除后表面（1b）的突出部分（12）来进行平面化处理。因此，基板（特别是半导体基板）的厚度的变化是均匀的，并且容易且廉价地实现高速平坦化，而没有诸如凹陷的缺点，并且对布线设计没有任何限制。

37. 发明申请

US20060220220A1 Electronic device and method for fabricating the same 审中-公开
标题翻译：电子器件及其制造方法
公开(公告)号：US20060220220A1
公开(公告)日：2006-10-05
申请号：US11182009
申请日：2005-07-15
申请人： Kanae Nakagawa , Masataka Mizukoshi
发明人： Kanae Nakagawa , Masataka Mizukoshi
IPC分类号： H01L23/12
CPC分类号： H01L21/4853 , H01L21/4846 , H01L21/563 , H01L23/49811 , H01L23/49827 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/81 , H01L24/83 , H01L24/90 , H01L2224/05001 , H01L2224/05022 , H01L2224/05147 , H01L2224/05572 , H01L2224/05647 , H01L2224/05666 , H01L2224/1147 , H01L2224/1184 , H01L2224/13099 , H01L2224/13147 , H01L2224/16225 , H01L2224/16235 , H01L2224/2784 , H01L2224/2919 , H01L2224/32225 , H01L2224/73104 , H01L2224/73203 , H01L2224/73204 , H01L2224/81894 , H01L2224/83192 , H01L2224/83194 , H01L2224/83855 , H01L2224/83856 , H01L2224/9202 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/0665 , H01L2924/14 , H01L2924/15174 , H01L2924/15311 , H01L2924/19041 , H01L2924/00 , H01L2924/00014
摘要： The electronic device comprises a first substrate 10; a first electrode 22 formed on one primary surface of the first substrate 10; a first resin layer 32 of a thermosetting resin formed on said one primary surface of the first substrate 10, burying the first electrode 22; a second substrate 12 opposed to said one primary surface of the first substrate 10; a second electrode 24 formed on one primary surface of the second substrate 12 opposed to the first substrate 10, corresponding to the first electrode 22 and jointed to the first electrode 22; and a second thermosetting resin layer 42 formed of a thermosetting resin formed on one primary surface of the second substrate 12, burying the second electrode 24, and adhered to the first resin layer 32. The fist electrodes 22 and the second electrodes 24 can be caused to joint to each other by the shrinkage of the first resin layer 32 and the second resin layer 42. The present invention can provide an electronic device having the first electrodes 22 and the second electrodes 24 surely jointed to each other without deteriorating the reliability.
摘要翻译：电子装置包括第一基板10; 形成在第一基板10的一个主表面上的第一电极22; 形成在第一基板10的一个主表面上的热固性树脂的第一树脂层32，掩埋第一电极22; 与第一基板10的所述一个主表面相对的第二基板12; 第二电极24，形成在第二基板12的与第一基板10相对的一个主表面上，对应于第一电极22并且接合到第一电极22; 以及由形成在第二基板12的一个主表面上的热固性树脂形成的第二热固性树脂层42，掩埋第二电极24并粘附到第一树脂层32。可以通过第一树脂层32和第二树脂层42的收缩使第一电极22和第二电极24彼此接合。本发明可以提供一种电子装置，其具有彼此可靠地连接的第一电极22和第二电极24，而不会降低其可靠性。

38. 发明申请

US20050170640A1 Semiconductor device, wiring substrate forming method, and substrate processing apparatus 有权
标题翻译：半导体装置，布线基板的形成方法以及基板处理装置
公开(公告)号：US20050170640A1
公开(公告)日：2005-08-04
申请号：US11097937
申请日：2005-04-01
申请人： Kanae Nakagawa , Masataka Mizukoshi , Kazuo Teshirogi
发明人： Kanae Nakagawa , Masataka Mizukoshi , Kazuo Teshirogi
IPC分类号： H01L21/3105 , H01L21/321 , H01L21/44 , H01L21/4763 , H01L21/48 , H01L21/68 , H01L21/768
CPC分类号： H01L21/4857 , H01L21/31058 , H01L21/32115 , H01L21/4846 , H01L21/6835 , H01L21/7684
摘要： A substrate support (201) having a flat supporting surface (201a) is prepared, and a semiconductor substrate (1) is fixed to the substrate supporting surface (201) by attaching a wiring forming surface (1a) to the supporting surface (201a) by suction, for example, by vacuum suction. On this occasion, the wiring forming surface (1a) is forcibly flattened by being attached to the supporting surface (201a) by suction, and therefore the wiring forming surface (1a) becomes a reference plane for planarization of a back surface (1b). In this state, planarization processing is performed by mechanically grinding the back surface (1b) to grind away projecting portions (12) of the back surface (1b). Hence, variations in the thickness of the substrate (especially, semiconductor substrate) are made uniform, and high-speed planarization is realized easily and inexpensively without disadvantages such as dishing and without any limitation on a wiring design.
摘要翻译：准备具有平坦支撑面（201a）的基板支撑体（201），通过将布线形成面（1a）安装在支撑面（13a）上而将半导体基板（1）固定在基板支撑面（201） 201a）通过抽吸，例如通过真空抽吸。在这种情况下，布线形成表面（1a）通过抽吸附接到支撑表面（201a）被强制地平坦化，因此布线形成表面（1a）成为用于平面化背面的参考平面（ 1 b）。在这种状态下，通过机械研磨后表面（1b）以研磨后表面（1b）的凸出部分（12）来进行平面化处理。因此，基板（特别是半导体基板）的厚度的变化是均匀的，并且容易且廉价地实现高速平坦化，而没有诸如凹陷的缺点，并且对布线设计没有任何限制。

39. 发明授权

US06893681B2 Surface conductive resin, a coaxial cable, a wiring board, and process for manufacturing the same 有权
标题翻译：表面导电树脂，同轴电缆，布线板及其制造方法
公开(公告)号：US06893681B2
公开(公告)日：2005-05-17
申请号：US10256208
申请日：2002-09-27
申请人： Nawalage Florence Cooray , Kanae Nakagawa , Masataka Mizukoshi
发明人： Nawalage Florence Cooray , Kanae Nakagawa , Masataka Mizukoshi
IPC分类号： C23C18/16 , C23C18/20 , H01B1/12 , H01B11/18 , H01B13/00 , H01B13/22 , H05K3/18 , B05D3/00 , B05D1/36 , B05D1/38 , H01B7/17
CPC分类号： H01B11/1808 , C23C18/1605 , C23C18/2086 , H01B1/122 , H01B13/0026 , H01B13/225 , H05K3/181 , H05K3/185
摘要： A process to manufacture a surface-conductive resin in a short time at a low cost without damaging the main chain of a polymer is provided. The process for manufacturing surface-conductive resin comprises partially substituting a reactive group in at least one of a resin precursor and a semi-cured resin having at least one reactive group partially substitutable under alkaline condition by an alkali metal ion solution, exchanging the substituted alkali metal ion with the ion of a conductive material in the ionic solution, reducing the ion of the conductive material to deposit the conductive layer, then curing the resin, to get surface-conductive polymer/resin.
摘要翻译：提供了一种以低成本在短时间内制造表面导电树脂而不损害聚合物主链的方法。制造表面导电树脂的方法包括在至少一种树脂前体和至少一种具有至少一个在碱性条件下可被碱金属离子溶液取代的活性基团的半固化树脂中的反应性基团部分取代，交换取代的碱金属离子与离子溶液中导电材料的离子，减少导电材料的离子沉积导电层，然后固化树脂，得到表面导电聚合物/树脂。

40. 发明授权

US07402461B2 Method of connecting base materials 有权
标题翻译：连接基材的方法
公开(公告)号：US07402461B2
公开(公告)日：2008-07-22
申请号：US11019157
申请日：2004-12-23
申请人： Masataka Mizukoshi , Nobuhiro Imaizumi , Taiji Sakai
发明人： Masataka Mizukoshi , Nobuhiro Imaizumi , Taiji Sakai
IPC分类号： H01L21/44
CPC分类号： H01L24/12 , H01L21/563 , H01L23/3157 , H01L24/11 , H01L24/16 , H01L24/17 , H01L24/27 , H01L24/29 , H01L24/81 , H01L2224/05001 , H01L2224/05022 , H01L2224/05124 , H01L2224/05572 , H01L2224/05664 , H01L2224/05666 , H01L2224/05671 , H01L2224/1134 , H01L2224/1148 , H01L2224/13099 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/16225 , H01L2224/29111 , H01L2224/2919 , H01L2224/32225 , H01L2224/73104 , H01L2224/73203 , H01L2224/73204 , H01L2224/81801 , H01L2224/81894 , H01L2224/83191 , H01L2224/83856 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/07802 , H01L2924/13091 , H01L2924/15311 , H01L2924/1579 , H01L2924/00 , H01L2924/00012 , H01L2924/00015 , H01L2924/00014 , H01L2924/0665 , H01L2224/29099
摘要： The present invention is aimed at providing a method of connecting base materials capable of forming metal terminals having a uniform height and smooth surface with a low cost, and of realizing a low-damage mounting, in which a work is planarized while keeping the temperature of the insulating film, possibly elevated due to frictional heat generated during cutting using a cutting tool, lower than 80° C., and keeping the temperature range lower than 80° C. throughout the entire period of the cutting, the electrodes and electrodes are opposed and brought into contact at a temperature of 80° C. or above but lower than the curing temperature of the insulating film, the insulating film is liquefied and a space between the electrodes and electrodes is filled with an insulating resin composing the insulating film, and the insulating resin is cured at the curing temperature or above.
摘要翻译：本发明旨在提供一种能够以低成本形成具有均匀高度和平滑表面的金属端子的基材的方法，并且实现了低损伤安装，其中工件平坦化同时保持温度绝缘膜由于在使用切割工具的切割期间产生的摩擦热可能升高，低于80℃，并且在切割的整个整个周期内保持温度范围低于80℃，电极和电极相对并在80℃以上且低于绝缘膜的固化温度的温度下接触，使绝缘膜液化，并且用构成绝缘膜的绝缘树脂填充电极和电极之间的空间，以及绝缘树脂在固化温度以上固化。

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