专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

31. 发明申请

US20090309117A1 PROTECTION CIRCUIT, AND SEMICONDUCTOR DEVICE AND LIGHT EMITTING DEVICE USING SUCH PROTECTION CIRCUIT 失效
标题翻译：保护电路和半导体器件以及使用这种保护电路的发光器件
公开(公告)号：US20090309117A1
公开(公告)日：2009-12-17
申请号：US11915921
申请日：2006-05-29
申请人： Mitsuru Okazaki , Naoki Takahashi , Akira Shimizu , Kenichi Nakata
发明人： Mitsuru Okazaki , Naoki Takahashi , Akira Shimizu , Kenichi Nakata
IPC分类号： H01L33/00 , H01L29/73 , H02H9/00
CPC分类号： H05B33/0884 , H01L27/0248 , H01L2224/48227 , H01L2224/49113 , H01L2924/1305 , H01L2924/30107 , Y02B20/341 , H01L2924/00
摘要： In a protection circuit connected, via lines including an inductance component, to a circuit to be protected, a first transistor is arranged on a path to ground from a connection point of the protection circuit and the line. A second transistor is arranged on a path to ground from a connection point of the circuit to be protected and the line, and extracts, from a connection point, a current corresponding to a current flowing in the first transistor. The first and the second transistors are NPN bipolar transistors having a base and an emitter are commonly connected. A resistor is connected between the base and the emitter of the first transistor, and a diode is connected between the base and a collector.
摘要翻译：在通过包括电感分量的线路连接到保护电路的保护电路中，第一晶体管被布置在从保护电路和线路的连接点到达的路径上。第二晶体管被布置在从被保护电路的连接点到线路的路径上，并从连接点提取与流过第一晶体管的电流相对应的电流。第一和第二晶体管是具有基极和发射极共同连接的NPN双极晶体管。电阻器连接在第一晶体管的基极和发射极之间，二极管连接在基极和集电极之间。

32. 发明授权

US07617265B2 Indexing method of database management system 失效
标题翻译：数据库管理系统索引方法
公开(公告)号：US07617265B2
公开(公告)日：2009-11-10
申请号：US11483548
申请日：2006-07-11
申请人： Daisuke Ito , Kazutomo Ushijima , Akira Shimizu
发明人： Daisuke Ito , Kazutomo Ushijima , Akira Shimizu
IPC分类号： G06F17/30
CPC分类号： G06F17/30321 , Y10S707/955 , Y10S707/956 , Y10S707/968 , Y10S707/99943 , Y10S707/99952 , Y10S707/99957
摘要： When operating a database management system that consists of a plurality of database servers and enables the database servers to transfer data between them by partitioning a data area into small areas and altering allocation of the small areas to the database servers, after altering the configuration, there occurs degradation in processing speed that accompanies re-creation of the index. If this problem is solved by using the conventional technique, noticeable degradation in processing speed will occur to a specific query at the time of a steady state operation. When operating the database management system that consists of the plurality of database servers and enables the database servers to transfer data between them by partitioning the database area into small areas and altering the allocation of the small areas to the database server, an index created for each of the small areas and an index to all the small areas allocated to the database server are used in combination.
摘要翻译：当操作由多个数据库服务器组成的数据库管理系统并且使数据库服务器能够通过将数据区域划分成小区域并且将小区域的分配改变到数据库服务器来在其间传输数据时，在更改配置之后，伴随重新创建索引的处理速度发生降级。如果通过使用传统技术解决了这个问题，则在稳定状态操作时，特定查询将发生处理速度明显的下降。当操作由多个数据库服务器组成的数据库管理系统并且使数据库服务器能够通过将数据库区域分割成小区域并且将小区域的分配改变为数据库服务器来传输数据时，为每个数据库服务器创建一个索引的小区域和分配给数据库服务器的所有小区域的索引组合使用。

33. 发明申请

US20090219065A1 Semiconductor Device and Electronic Apparatus 审中-公开
标题翻译：半导体器件和电子设备
公开(公告)号：US20090219065A1
公开(公告)日：2009-09-03
申请号：US11720910
申请日：2005-12-21
申请人： Akira Shimizu
发明人： Akira Shimizu
IPC分类号： H03L7/00
CPC分类号： H04L12/40 , H04L12/40039
摘要： A read-start-timing set circuit is connected to a timing terminal (CT1) of a semiconductor device. By comparing an internal signal of this semiconductor device with an external signal on a bus line, the read timing immediately after power is turned on is modified. Since data transmission onto the bus line from another semiconductor device is inhibited, adjustment is effected to avoid data collision between the semiconductor devices. Therefore, automatic reading after power is turned on can be conducted while avoiding data collision between the semiconductor devices on the bus line to which a plurality of semiconductor devices are connected. Furthermore, a relevant semiconductor device can be readily attached onto the bus line.
摘要翻译：读取启动时序设置电路连接到半导体器件的定时端子（CT1）。通过将该半导体器件的内部信号与总线上的外部信号进行比较，电源接通之后的读取时序被修改。由于抑制了从另一个半导体器件到总线上的数据传输，所以进行调整以避免半导体器件之间的数据冲突。因此，可以在避免与多个半导体器件连接的总线上的半导体器件之间的数据冲突的同时进行电源接通之后的自动读取。此外，相关的半导体器件可以容易地附接到总线上。

34. 发明授权

US07462245B2 Single-wafer-processing type CVD apparatus 有权
标题翻译：单晶片加工型CVD装置
公开(公告)号：US07462245B2
公开(公告)日：2008-12-09
申请号：US10618900
申请日：2003-07-14
申请人： Akira Shimizu , Hideaki Fukuda , Hiroki Kanayama
发明人： Akira Shimizu , Hideaki Fukuda , Hiroki Kanayama
IPC分类号： C23C16/448 , C23C16/44 , C23C16/06
CPC分类号： C23C16/45565 , C23C16/4481 , C23C16/4557 , C23C16/52
摘要： A single-wafer-processing type CVD apparatus for forming a thin film on an object to be processed includes a reaction chamber, a susceptor for placing the object thereon, a shower plate for emitting a jet of reaction gas to the object, which is set up in parallel and opposing to the susceptor, an orifice for bringing a liquid raw material and a carrier gas into the reaction chamber, which is formed through the ceiling of the reaction chamber, an evaporation plate means for vaporizing the liquid raw material, which is set up in a space between the ceiling of the reaction chamber and the shower plate, and a temperature controlling mechanism for controlling the shower plate and the evaporation plate means at respective given temperatures.
摘要翻译：用于在待处理物体上形成薄膜的单晶片加工型CVD装置包括反应室，用于放置物体的基座，用于向物体喷射反应气体喷射的喷淋板，其被设定平行且相对于基座的孔，用于将液体原料和载气引入通过反应室顶部形成的反应室的孔，用于使液态原料蒸发的蒸发板装置设置在反应室的顶板和喷淋板之间的空间中，以及用于在各自的给定温度下控制喷淋板和蒸发板装置的温度控制机构。

35. 发明申请

US20080054340A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE INCLUDING IMPROVED GATE ELECTRODE 失效
标题翻译：非线性半导体存储器件，包括改进的栅极电极
公开(公告)号：US20080054340A1
公开(公告)日：2008-03-06
申请号：US11877075
申请日：2007-10-23
申请人： Fumitaka Arai , Yasuhiko Matsunaga , Makoto Sakuma , Riichiro Shirota , Akira Shimizu
发明人： Fumitaka Arai , Yasuhiko Matsunaga , Makoto Sakuma , Riichiro Shirota , Akira Shimizu
IPC分类号： H01L29/788
CPC分类号： H01L27/115 , G11C16/0483 , G11C16/10 , H01L21/28273 , H01L27/11521 , H01L29/42324 , H01L29/42336 , H01L29/7883
摘要： A floating gate is formed on a semiconductor substrate via a gate insulating film. Diffused layers are formed as sources or drain regions on opposite sides of the floating gate in the semiconductor substrate. First and second control gates are formed opposite to both of the diffused layers on the opposite sides of the floating gate via an inter-gate insulating film to drive the floating gate.
摘要翻译：通过栅极绝缘膜在半导体衬底上形成浮栅。扩散层在半导体衬底中的浮置栅极的相对侧上形成为源区或漏极区。第一和第二控制栅极通过栅极间绝缘膜与浮动栅极的相对侧上的两个扩散层相对形成，以驱动浮置栅极。

36. 发明申请

US20070218701A1 Semiconductor-processing apparatus with rotating susceptor 审中-公开
标题翻译：具有旋转基座的半导体处理装置
公开(公告)号：US20070218701A1
公开(公告)日：2007-09-20
申请号：US11376048
申请日：2006-03-15
申请人： Akira Shimizu , Wonyong Koh , Hyung-Sang Park , Young-Duck Tak
发明人： Akira Shimizu , Wonyong Koh , Hyung-Sang Park , Young-Duck Tak
IPC分类号： C23C16/00 , H01L21/31
CPC分类号： C23C16/45551 , C23C16/06 , C23C16/36 , H01L21/67161 , H01L21/67748 , H01L21/68764
摘要： An apparatus for depositing thin film on a processing target includes: a reaction space; a susceptor movable up and down and rotatable around its center axis; and isolation walls that divide the reaction space into multiple compartments including source gas compartments and purge gas compartments, wherein when the susceptor is raised for film deposition, a small gap is created between the susceptor and the isolation walls, thereby establishing gaseous separation between the respective compartments, wherein each source gas compartment and each purge gas compartment are provided alternately in a susceptor-rotating direction of the susceptor.
摘要翻译：一种用于在处理目标上沉积薄膜的设备包括：反应空间; 感受器可上下移动并围绕其中心轴线旋转; 以及隔离壁，其将反应空间分成多个隔室，包括源气体室和净化气体室，其中当基座升高以进行薄膜沉积时，在基座和隔离壁之间产生小的间隙，从而在相应的隔室，其中每个源气体隔室和每个吹扫气室交替地设置在基座的基座转动方向上。

37. 发明申请

US20070215036A1 Method and apparatus of time and space co-divided atomic layer deposition 审中-公开
标题翻译：时空分离原理层沉积的方法与装置
公开(公告)号：US20070215036A1
公开(公告)日：2007-09-20
申请号：US11376817
申请日：2006-03-15
申请人： Hyung-Sang Park , Young-Duck Tak , Wonyong Koh , Akira Shimizu
发明人： Hyung-Sang Park , Young-Duck Tak , Wonyong Koh , Akira Shimizu
IPC分类号： C30B23/00 , C23C16/00
CPC分类号： C23C16/45551
摘要： Space and time co-divided atomic layer deposition (ALD) apparatuses and methods are provided. Substrates are moved (e.g., rotated) among multiple reaction zones, each of which is exposed to only one ALD reactant. At the same time, reactants are pulsed in each reaction zone, with purging or other gas removal methods between pulses. Separate exhaust passages for each reactant and purging during wafer movement minimizes particle contamination. Additionally, preferred embodiments permit different pulsing times in each reaction space, thus permitting flexibility in pulsing.
摘要翻译：提供空间和时间共分离原子层沉积（ALD）装置和方法。衬底在多个反应区域中移动（例如旋转），每个反应区域仅暴露于一个ALD反应物。同时，反应物在每个反应区域被脉冲，在脉冲之间进行吹扫或其它气体去除方法。每个反应物的分离排气通道和晶片移动过程中的清洗使颗粒污染最小化。此外，优选实施例允许在每个反应空间中不同的脉冲时间，从而允许脉冲的灵活性。

38. 发明申请

US20070018235A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE INCLUDING IMPROVED GATE ELECTRODE 有权
标题翻译：非线性半导体存储器件，包括改进的栅极电极
公开(公告)号：US20070018235A1
公开(公告)日：2007-01-25
申请号：US11535514
申请日：2006-09-27
申请人： Fumitaka ARAI , Yasuhiko Matsunaga , Makoto Sakuma , Riichiro Shirota , Akira Shimizu
发明人： Fumitaka ARAI , Yasuhiko Matsunaga , Makoto Sakuma , Riichiro Shirota , Akira Shimizu
IPC分类号： H01L29/788
CPC分类号： H01L27/115 , G11C16/0483 , G11C16/10 , H01L21/28273 , H01L27/11521 , H01L29/42324 , H01L29/42336 , H01L29/7883
摘要： A floating gate is formed on a semiconductor substrate via a gate insulating film. Diffused layers are formed as sources or drain regions on opposite sides of the floating gate in the semiconductor substrate. First and second control gates are formed opposite to both of the diffused layers on the opposite sides of the floating gate via an inter-gate insulating film to drive the floating gate.
摘要翻译：通过栅极绝缘膜在半导体衬底上形成浮栅。扩散层在半导体衬底中的浮置栅极的相对侧上形成为源区或漏极区。第一和第二控制栅极通过栅极间绝缘膜与浮动栅极的相对侧上的两个扩散层相对形成，以驱动浮置栅极。

39. 发明授权

US06986672B2 Electric contact structure, process for producing the same and electronic instrument having the same 失效
标题翻译：电接触结构，其制造方法和具有该电接触结构的电子仪器
公开(公告)号：US06986672B2
公开(公告)日：2006-01-17
申请号：US10792577
申请日：2004-03-04
申请人： Takahiro Sasaki , Yasuharu Nakamura , Akira Shimizu
发明人： Takahiro Sasaki , Yasuharu Nakamura , Akira Shimizu
IPC分类号： H01R4/66
CPC分类号： H01R4/64 , H01R12/592 , H01R13/6582 , H01R13/6596
摘要： A multifunctional electronic instrument includes a body of the electronic instrument, an operation display unit movably provided on the body of the electronic instrument, and a ground structure as an electric contact structure, which includes a parallel part and a contact spring piece. The parallel part includes an electrically conductive base material and an electrically insulating surface layer formed on surfaces of both sides of the base material, and is attached to a movable member that moves together with the operation display unit. The parallel part is provided with a projection. At an end of the projection, the base material is exposed in a ruptured part where the surface layer is ruptured. The ruptured part is provided with an electric contact. The contact spring piece comes in contact with the electric contact. The base material of the parallel part and the contact spring piece are electrically connected to each other.
摘要翻译：多功能电子仪器包括电子仪器的主体，可移动地设置在电子仪器的主体上的操作显示单元和作为电接触结构的接地结构，其包括平行部分和接触弹簧片。平行部分包括导电基材和形成在基材两面的表面上的电绝缘表面层，并且附接到与操作显示单元一起移动的可移动部件。平行部分设置有突起。在突起的末端，基材在表面层破裂的破裂部分中露出。破裂部分设有电接点。触点弹簧片与电触点接触。平行部件和接触弹簧片的基材彼此电连接。

40. 发明授权

US06921556B2 Method of film deposition using single-wafer-processing type CVD 有权
标题翻译：使用单晶片处理型CVD的薄膜沉积方法
公开(公告)号：US06921556B2
公开(公告)日：2005-07-26
申请号：US10403179
申请日：2003-03-28
申请人： Akira Shimizu , Hideaki Fukuda , Baiei Kawano , Kazuo Sato
发明人： Akira Shimizu , Hideaki Fukuda , Baiei Kawano , Kazuo Sato
IPC分类号： C23C16/44 , C23C16/455 , C23C16/458 , C23C16/54 , H01L21/285 , H01L21/3065 , C23C16/00
CPC分类号： C23C16/45521 , C23C16/4409 , C23C16/4412 , C23C16/4557 , C23C16/45572 , C23C16/4585 , C23C16/54
摘要： A method of film deposition using a single-wafer-processing type CVD apparatus includes: (a) sealing a periphery of a susceptor to separate a reaction chamber from a wafer-handling chamber when the susceptor rises; and (b) flowing a gas from the wafer-handling chamber into the reaction chamber through at least one discharge hole formed through the susceptor via a back side and a periphery of a wafer placed on the susceptor during film deposition.
摘要翻译：使用单晶片处理型CVD装置的成膜方法包括：（a）当基座升高时，密封基座的周边以将反应室与晶片处理室分离; 和（b）通过在膜沉积期间通过基座上的晶片的背侧和周边形成的至少一个排出孔，将气体从晶片处理室流入反应室。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式