专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

31. 发明申请

US20090134274A1 ACCELERATING DEVICE 有权
标题翻译：加速装置
公开(公告)号：US20090134274A1
公开(公告)日：2009-05-28
申请号：US12089996
申请日：2006-10-06
申请人： Shiro Hosaka , Masatada Yamamoto , Satoshi Matsuda , Akio Yamanaka , Toshihiko Takeo
发明人： Shiro Hosaka , Masatada Yamamoto , Satoshi Matsuda , Akio Yamanaka , Toshihiko Takeo
IPC分类号： B64F1/04
CPC分类号： B64F1/10 , Y02T50/82
摘要： [PROBLEMS] Providing an accelerating device capable of safely and efficiently accelerating an aircraft even if the aircraft is a high-speed and heavyweight one.[MEANS FOR SOLVING PROBLEMS] The accelerating device has a support base for supporting an aircraft so that it does not go backward or levitate and does not pitch; a guide way placed along a predetermined route; guide means for guiding the support base along the guide way; and drive means for driving the support base along the guide way.
摘要翻译： [问题]提供能够安全有效地加速飞机的加速装置，即使飞机是高速和重量级的。解决问题的手段加速装置具有用于支撑飞行器的支撑基座，使得其不会向后或悬浮并且不俯仰; 沿着预定路线放置的引导方式; 引导装置，用于沿着引导方向引导支撑基座; 以及用于沿着引导方向驱动支撑基座的驱动装置。

32. 发明申请

US20070259507A1 Manufacturing method of semiconductor device 审中-公开
标题翻译：半导体器件的制造方法
公开(公告)号：US20070259507A1
公开(公告)日：2007-11-08
申请号：US11725561
申请日：2007-03-20
申请人： Satoshi Matsuda
发明人： Satoshi Matsuda
IPC分类号： H01L21/76 , H01L21/00
CPC分类号： H01L21/3247 , H01L21/28123 , H01L21/76224 , H01L21/823481 , H01L27/0207 , H01L29/1033
摘要： In a manufacturing method of semiconductor device, initially, a trench pattern is laid out along a direction of a (100) silicon substrate. Next, a trench is formed in the silicon substrate based on the laid-out trench pattern. Further, the silicon substrate with the trench formed therein is annealed in a low-pressure reducing atmosphere to cause silicon migration. This reduces the radius of curvature of a corner portion of the formed trench pattern. Consequently, changes of the contact area with an electrode and a contact can be suppressed in an active area isolated by the trench pattern, and characteristic deterioration caused by changes of the contact area can be suppressed.
摘要翻译：在半导体器件的制造方法中，首先沿（100）硅衬底的<100>方向布置沟槽图案。接下来，基于所布置的沟槽图案在硅衬底中形成沟槽。此外，其中形成有沟槽的硅衬底在低压还原气氛中退火以引起硅迁移。这减小了形成的沟槽图案的角部的曲率半径。因此，可以在通过沟槽图案隔离的有源区域中抑制与电极和接触部的接触面积的变化，并且可以抑制由接触面积的变化引起的特性劣化。

33. 发明申请

US20070069267A1 Semiconductor device and manufacturing method thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070069267A1
公开(公告)日：2007-03-29
申请号：US11519050
申请日：2006-09-12
申请人： Satoshi Matsuda
发明人： Satoshi Matsuda
IPC分类号： H01L29/94
CPC分类号： H01L27/1104
摘要： A semiconductor device comprises static random access memory (SRAM) cells formed in a semiconductor substrate, first deep trenches isolating each boundary of an n-well and a p-well of the SRAM cells, second deep trenches isolating the SRAM cells into each unit bit cell, and at least one or more contacts taking substance voltage potentials in regions isolated by the first and second deep trenches. Then, the device becomes possible to improve a soft error resistance without increasing the device in size.
摘要翻译：半导体器件包括形成在半导体衬底中的静态随机存取存储器（SRAM）单元，隔离SRAM单元的n阱和p阱的每个边界的第一深沟槽，将SRAM单元隔离成每个单元位的第二深沟槽电池，以及至少一个或多个触点，在由第一和第二深沟槽隔离的区域中获取物质电压电位。然后，该装置可以在不增加设备尺寸的情况下提高柔软的抗错误性。

34. 发明授权

US07009273B2 Semiconductor device with a cavity therein and a method of manufacturing the same 失效
公开(公告)号：US07009273B2
公开(公告)日：2006-03-07
申请号：US10665614
申请日：2003-09-19
申请人： Kazumi Inoh , Hidemi Ishiuchi , Satoshi Matsuda , Ichiro Mizushima , Tsutomu Sato
发明人： Kazumi Inoh , Hidemi Ishiuchi , Satoshi Matsuda , Ichiro Mizushima , Tsutomu Sato
IPC分类号： H01L29/00
CPC分类号： H01L27/10894 , H01L21/76283 , H01L21/76289 , H01L21/764 , H01L21/84 , H01L27/0218 , H01L27/105 , H01L27/10829 , H01L27/1087 , H01L27/10885 , H01L27/10897 , H01L27/11 , H01L27/115 , H01L27/11502 , H01L27/1203 , H01L29/0649 , H01L29/66181 , H01L29/7841
摘要： A semiconductor device includes a semiconductor substrate, cavities, and an element isolating region. The cavities, which are each shaped like a flat plate, are made in the semiconductor substrate. The element isolating region is formed in the surface of the semiconductor substrate and located at the sides of the cavities.

35. 发明授权

US5903027A MOSFET with solid phase diffusion source 失效
标题翻译：具有固相扩散源的MOSFET
公开(公告)号：US5903027A
公开(公告)日：1999-05-11
申请号：US910222
申请日：1997-08-13
申请人： Takashi Yoshitomi , Masanobu Saito , Hisayo Momose , Hiroshi Iwai , Yukihiro Ushiku , Mizuki Ono , Yasushi Akasaka , Hideaki Nii , Satoshi Matsuda , Yasuhiro Katsumata , Tatsuya Ooguro , Claudio Fiegna
发明人： Takashi Yoshitomi , Masanobu Saito , Hisayo Momose , Hiroshi Iwai , Yukihiro Ushiku , Mizuki Ono , Yasushi Akasaka , Hideaki Nii , Satoshi Matsuda , Yasuhiro Katsumata , Tatsuya Ooguro , Claudio Fiegna
IPC分类号： H01L21/033 , H01L21/225 , H01L21/28 , H01L21/336 , H01L21/8238 , H01L27/092 , H01L29/08 , H01L29/423 , H01L29/76
CPC分类号： H01L29/6659 , H01L21/0338 , H01L21/2255 , H01L21/28035 , H01L21/28123 , H01L21/823814 , H01L27/0928 , H01L29/0847 , H01L29/42376 , H01L29/66628
摘要： A MOS type semiconductor device has a gate whose length is 170 nm (0.17 .mu.m) or less, a junction depth of source and drain diffusion layers in the vicinity of a channel is 22 nm or less, and a concentration of impurities at the surface in the source and drain diffusion layers is made to 10.sup.20 cm.sup.-3 or more. Such structure is obtained using solid phase diffusion using heat range from 950.degree. C. to 1050.degree. C. and/or narrowing gate width by ashing or etching. The other MOS type semiconductor device is characterized in that the relationship between the junction depth x.sub.j �nm! in the source and drain diffusion layer regions and the effective channel length L.sub.eff �nm! is determined by L.sub.eff >0.69 x.sub.j -6.17.
摘要翻译： MOS型半导体器件具有长度为170nm（0.17μm）以下的栅极，沟道附近的源极和漏极扩散层的结深度为22nm以下，表面上的杂质浓度在源极和漏极扩散层中形成1020cm-3以上。这种结构使用从950℃到1050℃的热范围的固相扩散和/或通过灰化或蚀刻使栅极宽度变窄来获得。其他MOS型半导体器件的特征在于源极和漏极扩散层区域中的结深度xj [nm]与有效沟道长度Leff [nm]之间的关系由Leff> 0.69×j-6.17确定。

36. 发明授权

US08529318B2 Sharpener 有权
标题翻译：磨刀器
公开(公告)号：US08529318B2
公开(公告)日：2013-09-10
申请号：US12732090
申请日：2010-03-25
申请人： Satoshi Matsuda
发明人： Satoshi Matsuda
IPC分类号： B24B23/04
CPC分类号： B24B3/546 , B24B23/04
摘要： A sharpening device operable to maintain a stable angle of a cutting edge during sharpening is disclosed. A sharpening member reciprocates parallel to a first direction. The sharpening member comprises a sharpening surface comprising at least one groove along the first direction. Reciprocation can reduce a presence of a sharpening residue on the sharpening surface while maintaining a stable sharpening angle of a cutting edge.
摘要翻译：公开了一种可操作以在磨削期间保持切削刃的稳定角度的磨削装置。磨削构件平行于第一方向往复运动。磨削构件包括沿着第一方向包括至少一个凹槽的磨削表面。往复可以减少锐化表面磨损残留物的存在，同时保持切削刃的稳定的锐化角度。

37. 发明授权

US08460125B2 Colored golf ball 有权
标题翻译：彩色高尔夫球
公开(公告)号：US08460125B2
公开(公告)日：2013-06-11
申请号：US12535831
申请日：2009-08-05
申请人： Hiroyuki Nagasawa , Satoshi Matsuda
发明人： Hiroyuki Nagasawa , Satoshi Matsuda
IPC分类号： A63B37/06
CPC分类号： A63B43/008 , A63B37/0022 , A63B37/0023
摘要： The invention provides a golf ball having a core, a cover of at least one layer encasing the core, and a layer of paint applied to a surface of an outermost layer of the cover. At least one layer from among the outermost cover layer and the paint layer is a colored layer containing a base polymer, a pigment and a lubricant. The ball has a color tone, at a measurement area diameter of 5 mm in a method of measuring the color of a reflecting object according to JIS Z-8722, which, expressed in the Lab color system, satisfies the conditions 30≦L, −40≦a≦60, and −20≦b≦60. The colored golf ball of the invention has an excellent spin performance and durability, an appearance characterized by outstanding visibility, stylishness and luxury, and an excellent weather resistance and paint film adhesion.
摘要翻译：本发明提供了一种高尔夫球，其具有芯，包围芯的至少一层的盖和涂覆在该盖的最外层表面上的涂料层。最外层和涂层之间的至少一层是含有基础聚合物，颜料和润滑剂的着色层。在根据JIS Z-8722测定反射物体的颜色的方法中，测定面积直径为5mm的球具有色调，其在Lab颜色体系中表达满足条件30 @ L， - 40 @ a @ 60和-20 @ b @ 60。本发明的彩色高尔夫球具有优异的旋转性能和耐久性，其特征在于具有优异的可视性，时尚性和豪华性，以及优异的耐候性和漆膜附着力。

38. 发明申请

US20120016837A1 MERGING APPARATUS, MERGING METHOD, AND MERGING PROGRAM 有权
标题翻译：合并设备，合并方法和合并程序
公开(公告)号：US20120016837A1
公开(公告)日：2012-01-19
申请号：US13240316
申请日：2011-09-22
申请人： Satoshi Matsuda , Kenichi Shimazaki , Kazunao Muramoto
发明人： Satoshi Matsuda , Kenichi Shimazaki , Kazunao Muramoto
IPC分类号： G06F17/30
CPC分类号： G06F17/30498 , G06F17/30566
摘要： A merging apparatus includes a first database in which a plurality of attributes including a key attribute that is set in advance as a key for merging is set and a second database in which one or a plurality of attributes excluding the key attribute is set. Furthermore, the merging apparatus checks an attribute that is set in the first database against an attribute that is set in the second database and extracts a common attribute that is set in common in both the first database and the second database. Then, the merging apparatus merges the first database with the second database by determining whether attribute values classified under the extracted common attribute match.
摘要翻译：合并装置包括：第一数据库，其中设置包括预先设置为用于合并的键的密钥属性的多个属性，以及第二数据库，其中设置除了密钥属性之外的一个或多个属性。此外，合并装置根据在第二数据库中设置的属性来检查在第一数据库中设置的属性，并提取在第一数据库和第二数据库中共同设置的公共属性。然后，合并装置通过确定分类在所提取的公共属性下的属性值是否匹配，将第一数据库与第二数据库合并。

39. 发明授权

US08043912B2 Manufacturing method of a semiconductor device having polycide wiring layer 失效
标题翻译：具有多晶硅布线层的半导体器件的制造方法
公开(公告)号：US08043912B2
公开(公告)日：2011-10-25
申请号：US11976515
申请日：2007-10-25
申请人： Satoshi Matsuda
发明人： Satoshi Matsuda
IPC分类号： C23C16/42 , H01L21/8242
CPC分类号： H01L27/10891 , H01L21/76838 , H01L21/76889 , H01L23/53271 , H01L27/0207 , H01L27/10861 , H01L27/10894 , H01L29/945 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device is provided with a semiconductor substrate comprising element isolation regions and an element region surrounded by the element isolation regions, a first polysilicon layer formed in the element region of the semiconductor substrate, an element-isolating insulation film formed in the element isolation region of the semiconductor substrate, a second polysilicon layer formed on the element-isolating insulation film, a first silicide layer formed on the first polysilicon layer. And the device further comprising a second silicide layer formed on the second polysilicon layer and being thicker than the first silicide layer.
摘要翻译：半导体器件设置有包括元件隔离区域和由元件隔离区域包围的元件区域的半导体衬底，形成在半导体衬底的元件区域中的第一多晶硅层，形成在元件隔离区域中的元件隔离绝缘膜形成在所述元件隔离绝缘膜上的第二多晶硅层，形成在所述第一多晶硅层上的第一硅化物层。并且该器件还包括形成在第二多晶硅层上并且比第一硅化物层厚的第二硅化物层。

40. 发明申请

US20100261550A1 COLORED GOLF BALL 有权
标题翻译：彩色高尔夫球
公开(公告)号：US20100261550A1
公开(公告)日：2010-10-14
申请号：US12487096
申请日：2009-06-18
申请人： Hiroyuki Nagasawa , Satoshi Matsuda
发明人： Hiroyuki Nagasawa , Satoshi Matsuda
IPC分类号： A63B37/12 , A63B43/00
CPC分类号： A63B37/12 , A63B37/0022 , A63B37/0024 , A63B37/0033 , A63B37/0075 , A63B43/008
摘要： In a golf ball composed of a core, a cover of at least one layer encasing the core, and a coat of paint applied to a surface of an outermost layer of the cover, the outermost layer of the cover or the coat of paint is colored with a fluorescent pigment. The ball has a color tone, at a measurement area diameter of 5 mm in a method of measuring the color of a reflecting object according to JIS Z-8722, which satisfies specific conditions in the Lab color system. The ball is endowed with an excellent spin performance and durability, an appearance characterized by outstanding visibility, stylishness and luxury, and an excellent weather resistance.
摘要翻译：在由芯构成的高尔夫球中，至少包含芯的一层的覆盖物和涂覆在该盖的最外层的表面上的涂层涂层，该涂层的最外层或涂层涂层着色与荧光颜料。根据JIS Z-8722的测定反射物体的颜色的方法，测定区域直径为5mm的球体，其满足Lab色彩系统的特定条件。该球具有优异的旋转性能和耐久性，外观以出众的可见性，时尚性和豪华性而闻名，具有优异的耐候性。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式