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    • 37. 发明申请
    • INFORMATION LEAKAGE PREVENTION APPARATUS AND METHOD
    • 信息泄漏防护装置和方法
    • US20120163417A1
    • 2012-06-28
    • US13393537
    • 2010-07-16
    • Toshinori MoriRyo IshikawaHitoshi NabataYasunao Suzuki
    • Toshinori MoriRyo IshikawaHitoshi NabataYasunao Suzuki
    • H04B1/713
    • H04K3/825H04K3/42H04K2203/14
    • A spread spectrum modulation unit (12) performs spread spectrum clocking processing for a basic clock signal (BC) synchronized with the carrier frequency or its harmonic frequency of image information leaked from an unwanted electromagnetic wave. A modulation pattern generation unit (13) generates and outputs, as a modulation pattern signal (MP), a PN code having sign bit data synchronized with each pulse of the obtained spread spectrum clock signal SC. In addition, the modulation pattern generation unit (13) resets the repetition period of the PN code based on a horizontal sync signal (H). A modulated clock generation unit (14) modulates the spread spectrum clock signal (SC) in accordance with the modulation pattern signal (MP). The obtained modulated clock signal (MC) is amplified, generating a leakage prevention signal (JC). A leakage prevention signal containing a sideband component of a satisfactory level can be generated, obtaining a useful leakage prevention effect.
    • 扩展频谱调制单元(12)对与从不需要的电磁波泄漏的图像信息的载波频率或其谐波频率同步的基本时钟信号(BC)进行扩频时钟处理。 调制图案生成单元(13)生成并输出与获得的扩频时钟信号SC的每个脉冲同步的符号位数据作为调制模式信号(MP)。 此外,调制模式生成单元(13)基于水平同步信号(H)来重置PN码的重复周期。 调制时钟生成单元(14)根据调制模式信号(MP)对扩频时钟信号(SC)进行调制。 获得的调制时钟信号(MC)被放大,产生防漏信号(JC)。 可以生成包含令人满意的边带分量的防漏信号,从而获得有用的防漏效果。
    • 38. 发明授权
    • Harmonic processing circuit and amplifying circuit using the same
    • 谐波处理电路和使用其的放大电路
    • US08164396B2
    • 2012-04-24
    • US12376556
    • 2007-08-01
    • Ryo IshikawaKazuhiko Honjo
    • Ryo IshikawaKazuhiko Honjo
    • H03F3/60H03H7/38
    • H03F3/601H01P1/212H01P5/028H03F1/56H03F3/191H03F3/245H03F2200/108H03F2200/222H03F2200/255H03F2200/387H03F2200/423H03F2200/451H03F2200/75
    • The present invention provides a harmonic processing circuit capable of miniaturizing a circuit, and an amplifier circuit using this harmonic processing circuit.A first impedance adjustment section and a second impedance adjustment section are provided. The first impedance adjustment section is provided with a coupled distributed constant line CT. The coupled distributed constant line CT receive as input the output of an amplification transistor S, and have a length of ¼ the wavelength (λ) of the fundamental wave at the output of the amplification transistor S. Further, the first impedance adjusting section is configured to adjust input impedance with respect to the even harmonics to one of effectively infinity or zero. The first impedance adjusting section and the second impedance adjustment section are configured to adjust input impedance with respect to the odd harmonics to the other of effectively infinity or zero.
    • 本发明提供能够使电路小型化的谐波处理电路和使用该谐波处理电路的放大电路。 提供第一阻抗调整部和第二阻抗调整部。 第一阻抗调整部分设有耦合的分布常数线CT。 耦合分布常数线CT作为输入端接收放大晶体管S的输出,并且具有1/4的长度,在放大晶体管S的输出处的基波的波长(λ)。此外,第一阻抗调整部分被配置 将相对于偶次谐波的输入阻抗调整为有效无穷大或零之一。 第一阻抗调整部分和第二阻抗调节部分被配置为相对于奇次谐波将有效无穷大或零的另一个的输入阻抗调整。
    • 39. 发明申请
    • AMPLIFIER CIRCUIT
    • 放大器电路
    • US20110050350A1
    • 2011-03-03
    • US12872589
    • 2010-08-31
    • Kazuhiko HonjoYoichiro TakayamaRyo Ishikawa
    • Kazuhiko HonjoYoichiro TakayamaRyo Ishikawa
    • H03F1/00
    • H03F3/60H03F1/56H03F3/66H03F2200/387H03F2200/391H03F2200/402
    • An amplifier circuit operating at a fundamental angular frequency •0, includes: a transistor which is represented by an equivalent circuit which includes: an equivalent output current source, a drain-source capacitor as a parallel parasitic capacitor to an output node of the equivalent output current source, and a drain inductor as serial parasitic inductor connected between the equivalent output current source and a drain output node; a harmonic frequency processing circuit which includes an input node connected with the drain output node and an output node; a resonant circuit section provided between the output node of the harmonic frequency processing circuit and a ground node and comprising (2n+1) resonators which have resonance frequencies different from each other; and a load resistance provided in a back stage of the harmonic frequency processing circuit. The resonance frequencies of the (2n+1) resonators are coincident with frequencies of (n+1) poles and n zeros formed between the drain output node and the ground node in the transistor when the output node of the harmonic frequency processing circuit is short-circuited to the ground node.
    • 以基角角频率工作的放大器电路,包括:由等效电路表示的晶体管,该等效电路包括:等效输出电流源,作为并联寄生电容器的漏源电容器到等效输出的输出节点 电流源和漏极电感,作为连接在等效输出电流源和漏极输出节点之间的串联寄生电感; 谐波频率处理电路,其包括与所述漏极输出节点连接的输入节点和输出节点; 谐振电路部分,设置在谐波频率处理电路的输出节点和接地节点之间,并且包括具有彼此不同谐振频率的(2n + 1)个谐振器; 以及设置在谐波频率处理电路的后级中的负载电阻。 当谐波频率处理电路的输出节点短路时,(2n + 1)谐振器的谐振频率与晶体管中的漏极输出节点和接地节点之间形成的(n + 1)极和n个零点的频率一致 - 通向地面节点。