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31. 发明授权

US5805507A Voltage reference generator for EPROM memory array 失效
标题翻译： EPROM存储器阵列的参考电压源
公开(公告)号：US5805507A
公开(公告)日：1998-09-08
申请号：US723924
申请日：1996-10-01
申请人： Richard Hull , Randy L. Yach
发明人： Richard Hull , Randy L. Yach
IPC分类号： G11C16/06 , G11C5/14 , G11C16/30 , G11C7/00
CPC分类号： G11C16/30 , G11C5/147
摘要： A technique is disclosed for reading a memory element of an EPROM array embedded in a microcontroller chip which has been scaled down from a previous design by virtue of reduced line widths of a process technology used for fabricating the chip. The microcontroller chip has a predetermined supply voltage, and the array comprises rows and columns of addressable memory elements which may be selectively accessed to read data content therefrom in a low voltage mode in which the supply voltage initially rises and ultimately reaches substantially its maximum voltage during a read cycle. A regulated reference voltage is used to exercise row and column control in the low voltage read mode by tracking the level of the supply voltage up to a certain preselected level below the maximum supply voltage, and by clamping the row and column control voltage at substantially the preselected level despite increases in the level of the supply voltage above the preselected level.
摘要翻译：公开了一种用于读取嵌入在微控制器芯片中的EPROM阵列的存储元件的技术，其已经通过用于制造芯片的工艺技术的减小的线宽从先前的设计缩小。微控制器芯片具有预定的电源电压，并且阵列包括可寻址存储器元件的行和列，其可以被选择性地访问以在低电压模式下从其读取数据内容，其中电源电压最初上升并且最终在其中最终达到其最大电压读周期。通过将电源电压的电平跟踪到最大电源电压以下的某个预选电平，并通过将行和列控制电压钳位在基本上为尽管电源电压水平高于预先选择的水平，但预选电平。

32. 发明授权

US5793684A Memory device having selectable redundancy for high endurance and reliability and method therefor 失效
标题翻译：具有用于高耐久性和可靠性的可选冗余的存储器件及其方法
公开(公告)号：US5793684A
公开(公告)日：1998-08-11
申请号：US891348
申请日：1997-07-10
申请人： Randy L. Yach
发明人： Randy L. Yach
IPC分类号： G11C29/00 , G11C7/00
CPC分类号： G11C29/70
摘要： A memory device having selectable redundancy for maintaining high endurance and high reliability. The memory device has two memory arrays wherein both memory arrays have a plurality of address locations for storing data. A switching unit is used to removeably connect the address locations of the first memory array means to corresponding address locations of second memory array in order to produce a first memory array having redundant address locations. If high reliability and redundancy is not required, a signal may be sent to the switching unit to disconnect the address locations of the first memory array from the corresponding address locations of the second memory array means to produce a memory device having an increased amount of address locations for storing data as compared to the first memory array having redundant address locations.
摘要翻译：具有用于维持高耐久性和高可靠性的可选冗余的存储器件。存储器件具有两个存储器阵列，其中两个存储器阵列具有用于存储数据的多个地址位置。切换单元用于将第一存储器阵列装置的地址位置可移除地连接到第二存储器阵列的相应地址位置，以便产生具有冗余地址位置的第一存储器阵列。如果不需要高可靠性和冗余度，则可以将信号发送到切换单元，以将第一存储器阵列的地址位置与第二存储器阵列装置的对应地址位置断开，以产生具有增加的地址量的存储器件与具有冗余地址位置的第一存储器阵列相比存储数据的位置。

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